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1. 发明专利

JP2005175479A Line level air gap 有权
标题翻译： LINE LEVEL AIR GAP
公开(公告)号：JP2005175479A
公开(公告)日：2005-06-30
申请号：JP2004353505
申请日：2004-12-07
申请人： Internatl Business Mach Corp , インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation
发明人： CHEN SHYNG-TSONG , CHIRAS STEFANIE R , COLBURN MATTHEW EARL , DALTON TIMOTHY JOSEPH , HEDRICK JEFFREY CURTIS , HUANG ELBERT EMIN , KUMAR KAUSHIK A , LANE MICHAEL WAYNE , MALONE KELLY , NARAYAN CHANDRASEKHAR , NITTA SATYANARAYANA V , PURUSHOTHAMAN SAMPATH , ROSENBERG ROBERT , TYBERG CHRISTY S , YU ROY RONGQING
IPC分类号： H01L21/768 , H01L23/522 , H01L23/532
CPC分类号： H01L21/7682 , H01L21/76829 , H01L23/5222 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a structure which reduces the dielectric constant between conductive lines by providing an air dielectric. SOLUTION: In a multilevel microelectronic integrated circuit, air comprises a permanent line level dielectric, and an ultra-low-k material constitutes a via level dielectric. In the IC structure, air is supplied to the line level after removal of a sacrificial material by clean thermal decomposition and auxiliary diffusion of byproducts through porosities. Optionally, air is also included within porosities in the via level dielectric. By incorporating air into the extension produced in the invention, intralevel and interlevel dielectric values are minimized. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供通过提供空气电介质来降低导线之间的介电常数的结构。解决方案：在多电平微电子集成电路中，空气包括永久线路电平介质，超低k材料构成通孔级电介质。在IC结构中，通过清洁的热分解和副产物通过孔隙的辅助扩散除去牺牲材料之后，空气被提供给线路层。任选地，空气也包括在通孔级电介质中的孔隙中。通过将空气并入本发明中生产的延伸中，使层内和层间介电值最小化。版权所有（C）2005，JPO＆NCIPI

2. 发明专利

JP2004214648A Mutually connected structure of firm ultra-low dielectric constant using metallization forming procedure after bridging 有权
公开(公告)号：JP2004214648A
公开(公告)日：2004-07-29
申请号：JP2003421653
申请日：2003-12-18
申请人： Internatl Business Mach Corp , インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation
发明人： COLBURN MATTHEW E , HUANG ELBERT E , NITTA SATYANARAYANA V , PURUSHOTHAMAN SAMPATH , SAENGER KATHERINE L
IPC分类号： H01L23/12 , H01L21/768 , H01L23/522 , H01L23/532
CPC分类号： H01L21/76808 , H01L21/76801 , H01L21/76807 , H01L21/76813 , H01L21/7682 , H01L23/5222 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a method of forming in-layer and interlayer air bridge structures, in a large scale integrated circuit (VLSI) device, a very large scale integrated circuit (ULSI) device, and a high-performance package. SOLUTION: The method of forming low k (dielectric constant) and ultra-low k multilayer mutual connections on a substrate is provided with a process to form a pair of mutual connection, separated along a side face by an air gap and a support layer in a via level of a dual damascene structure which exists only under a metal wiring, a process to remove a sacrificial dielectric through a holed bridge layer to connect an upper surface of the mutual connection along the side face, a process of executing a multilayer level extraction of the sacrificial layer, a process of sealing the bridge by a controlled method, and a process of reducing the effective dielectric constant of a film holed by using a patterning technology of a quasi-optical lithography. COPYRIGHT: (C)2004,JPO&NCIPI

3. 发明专利

JP2005217420A Semiconductor device having low effective dielectric constant and manufacturing method of the same 有权
标题翻译：具有低有效介电常数的半导体器件及其制造方法
公开(公告)号：JP2005217420A
公开(公告)日：2005-08-11
申请号：JP2005021358
申请日：2005-01-28
申请人： Internatl Business Mach Corp , インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation
发明人： EDELSTEIN DANIEL C , COLBURN MATTHEW E , COONEY EDWARD C III , DALTON TIMOTHY J , FITZSIMMONS JOHN A , GAMBINO JEFFREY P , HUANG ELBERT E , LANE MICHAEL W , MCGAHAY VINCENT J , NICHOLSON LEE M , NITTA SATYANARAYANA V , PURUSHOTHAMAN SAMPATH , SANKARAN SUJATHA , SHAW THOMAS M , SIMON ANDREW H , STAMPER ANTHONY K
IPC分类号： H01L21/033 , H01L21/302 , H01L21/311 , H01L21/4763 , H01L21/768 , H01L23/48 , H01L23/522 , H01L23/532 , H01L29/40
CPC分类号： B82Y30/00 , H01L21/0332 , H01L21/31111 , H01L21/31144 , H01L21/7682 , H01L21/76829 , H01L23/5222 , H01L23/53295 , H01L2924/0002 , Y10S438/947 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device of high strength that lowers an effective dielectric constant k eff , maintains an inter-level vertical capacity in an interconnection at a low level and a manufacturing method of the same. SOLUTION: The method of manufacturing the device comprises a step for providing a structure having an insulating layer 120 of at least one interconnection 130 and a step for forming a sublithographic template mask 150 on the insulating layer. A sublithographic feature 135a is formed in the vicinity of at least one intereconnection by performing etching on the insulating layer through the sublithographic template mask using a selective etching step. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了提供一种降低有效介电常数k eff 的高强度半导体器件，将互连中的级间垂直容量保持在低水平，并且制造方法一样的。解决方案：制造该器件的方法包括提供具有至少一个互连130的绝缘层120和在绝缘层上形成亚光刻模板掩模150的步骤的结构的步骤。通过使用选择性蚀刻步骤，通过通过亚光刻模板掩模对绝缘层进行蚀刻，在至少一个相互连接附近形成亚光刻部件135a。版权所有（C）2005，JPO＆NCIPI

4. 发明专利

JP2004146800A Manufacturing method and structure of interconnection structure 有权
公开(公告)号：JP2004146800A
公开(公告)日：2004-05-20
申请号：JP2003313299
申请日：2003-09-04
申请人： Internatl Business Mach Corp , インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation
发明人： CANAPERI DONALD F , DALTON TIMOTHY J , GATES STEPHEN M , KRISHNAN MAHADEVAIYER , PURUSHOTHAMAN SAMPATH , SMITH SEAN P E , NITTA SATYA
IPC分类号： H01L21/768
CPC分类号： H01L21/76807 , H01L21/76834 , H01L21/76835 , H01L21/76885 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a structure which realizes high performance interconnection including copper wiring and an insulator having an extremely low dielectric constant (k). SOLUTION: In this structure, wiring is supported by a low-k dielectric material having relatively high durability, such as SiLk(R) or SiO 2 , and then the remaining spaces in the structure are filled with a gap filling dielectric material that has an extremely low-k and a small hardness. Accordingly, in the structure, durable layers for obtaining the strength are bonded with an extremely low-k dielectric material for achieving electric performance of the interconnection. As a result, damages to and an increase in dielectric constant of the extremely low-k dielectric material caused during the manufacturing process are avoided, and delamination in the structure during the metal chemical mechanical polishing processes is prevented. Further, photoresist poisoning troubles caused by interaction with the extremely low-k dielectric material can be removed. COPYRIGHT: (C)2004,JPO

5. 发明专利

JP2003273158A High-density microjoining system 有权
标题翻译：高密度微观系统
公开(公告)号：JP2003273158A
公开(公告)日：2003-09-26
申请号：JP2003003619
申请日：2003-01-09
申请人： Internatl Business Mach Corp , インターナショナル・ビジネス・マシーンズ・コーポレーション
发明人： FURMAN BRUCE KENNETH , SURENDRA MAHESWARAN , GOMA SHERIF A , KARECKI ANNA , KARECKI SIMON M , MAGERLEIN JOHN HAROLD , PETRARCA KEVIN SHAWN , PURUSHOTHAMAN SAMPATH , SAMBUCETTI CARLOS JUAN , VOLANT RICHARD PAUL , WALKER GEORGE FREDERICK
IPC分类号： H01L23/52 , H01L21/288 , H01L21/3205 , H01L21/60 , H05K1/03 , H05K1/11 , H05K3/38
CPC分类号： H01L24/12 , H01L21/288 , H01L21/2885 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/16 , H01L2224/0401 , H01L2224/05571 , H01L2224/05599 , H01L2224/1146 , H01L2224/1147 , H01L2224/11849 , H01L2224/13022 , H01L2224/1308 , H01L2224/13083 , H01L2224/13116 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13157 , H01L2224/13164 , H01L2224/13169 , H01L2224/13582 , H01L2224/13616 , H01L2224/13644 , H01L2224/13655 , H01L2924/00013 , H01L2924/00014 , H01L2924/0002 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01076 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/10253 , H01L2924/14 , H01L2924/15787 , H01L2924/30105 , H05K1/0306 , H05K1/112 , H05K3/388 , H05K2201/0317 , H05K2201/09472 , H05K2201/09509 , H05K2201/10674 , H01L2224/45111 , H01L2224/13099 , H01L2924/00 , H01L2224/05552
摘要： PROBLEM TO BE SOLVED: To provide a system making an interconnection with a quite high density by connecting device chips and a chip carrier by using a microjoint interconnect structure.
SOLUTION: In the system, a pair of device chips is mounted on a microjoint interconnect chip carrier by using a microjoint interconnect structure. The microjoint interconnect chip carrier comprises a multilayer substrate having a plurality of receptacles on its surface. A pair of microjoint interconnect pads corresponding to the receptacles is provided on the device chips. Interconnecting wiring enabling an interconnection between the device chips is provided between the receptacles.
COPYRIGHT: (C)2003,JPO
摘要翻译：要解决的问题：通过使用微型连接互连结构，通过连接器件芯片和芯片载体来提供使密度相当高的互连的系统。解决方案：在系统中，通过使用微型连接互连结构将一对器件芯片安装在微型连接互连芯片载体上。微型连接互连芯片载体包括其表面上具有多个插座的多层基板。在器件芯片上设置一对对应于插座的微接点互连焊盘。在插座之间设置能够实现器件芯片之间的互连的互连布线。版权所有（C）2003，JPO

6. 发明专利

JP2005268783A Method for forming self-aligned nanocolumnar airbridge, and structure produced thereby 有权
标题翻译：形成自对准纳米核弹体的方法及其生产的结构
公开(公告)号：JP2005268783A
公开(公告)日：2005-09-29
申请号：JP2005066836
申请日：2005-03-10
申请人： Internatl Business Mach Corp , インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation
发明人： COLBURN MATTHEW E , NITTA SATYANARAYANA V , PURUSHOTHAMAN SAMPATH
IPC分类号： H01J9/14 , H01L21/3205 , H01L21/4763 , H01L21/768 , H01L21/8242 , H01L23/48 , H01L23/52 , H01L23/522 , H01L23/532 , H01L29/06 , H01L29/40
CPC分类号： H01L21/7682 , H01L23/5222 , H01L23/5329 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a method for fabricating a nanocolumnar airbridge structure in a Very-Large Scale Integrated (VLSI) and Ultra-Large Scale Integrated (ULSI) devices, and also to provide high performance packaging. SOLUTION: A method for producing a low k, ultra-low k, and super ultra-low-k multilayer interconnect structures on a substrate, in which the interconnect line structure bodies are separated laterally by a dielectric with vertically oriented nanoscale voids, formed by perforating the voids using sub-optical lithography patterning and etching techniques and closing off the tops of the perforations by a dielectric deposition step. The lines are supported by either solid or patterned dielectric features underneath. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种在超大规模集成（VLSI）和超大规模集成（ULSI）装置中制造纳米柱式气桥结构的方法，并且还提供高性能包装。解决方案：一种用于在衬底上制造低k，超低k和超超低k多层互连结构的方法，其中互连线结构体由具有垂直取向的纳米尺度空隙的电介质横向分离通过使用亚光学光刻图案和蚀刻技术对空隙进行穿孔而形成，并通过介电沉积步骤封闭穿孔的顶部。这些线由下面的固体或图案化电介质特征支撑。版权所有（C）2005，JPO＆NCIPI

7. 发明专利

JP2004193614A Chip carrier 有权
公开(公告)号：JP2004193614A
公开(公告)日：2004-07-08
申请号：JP2003409522
申请日：2003-12-08
申请人： Internatl Business Mach Corp , インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation
发明人： CHUDZIK MICHAEL PATRICK , DENNARD ROBERT H , DIVAKARUNI RAMA , FURMAN BRUCE KENNETH , JAMMY RAJARAO , NARAYAN CHANDRASEKHAR , PURUSHOTHAMAN SAMPATH , SHEPARD JR JOSEPH F , TOPOL ANNA WANDA
IPC分类号： H01L23/12 , H01L23/50 , H01L25/04 , H01L25/18 , H01L29/40 , H05K1/16 , H05K3/46
CPC分类号： H05K1/162 , H01L23/147 , H01L23/481 , H01L23/49827 , H01L23/50 , H01L2224/16225 , H01L2924/01019 , H01L2924/01055 , H01L2924/01077 , H01L2924/01078 , H01L2924/15311 , H01L2924/157 , H01L2924/30105 , H05K1/167 , H05K3/4602 , H05K2201/09809
摘要： PROBLEM TO BE SOLVED: To provide a structure for an integrated carrier equipped with high frequency and high speed passive components for computing. SOLUTION: A carrier 200 for a semiconductor component 102 is provided, which has passive components 3010 integrated in its substrate. The passive components 3010 include decoupling components, such as capacitors and resistors. A set of connections 210 is integrated in a close electrical proximity to the supported components. COPYRIGHT: (C)2004,JPO&NCIPI

8. 发明专利

JPH11271773A Dry manufacture of liquid crystal display using particle beam alignment 有权
标题翻译：使用颗粒光束对准的液晶显示的干燥制造
公开(公告)号：JPH11271773A
公开(公告)日：1999-10-08
申请号：JP3831799
申请日：1999-02-17
申请人： Internatl Business Mach Corp , インターナショナル・ビジネス・マシーンズ・コーポレイション
发明人： ALESSANDRO CESARE CAREGARI , PRAVEEN CHAUDARI , DOYLE JAMES P , JAMES ANDREW LACEY , SHUI CHIN ALAN LIEN , PURUSHOTHAMAN SAMPATH , MAHESHU GOVIND SAMANT , JAMES L SPADEL , JOACHIM SUTOA
IPC分类号： G02F1/1337
CPC分类号： G02F1/13378 , G02F1/133734 , G02F2001/133765
摘要： PROBLEM TO BE SOLVED: To obtain a low-cost, reliable light crystal display which is manufactured in a small number of steps by depositing an amorphous alignment layer on a transparent substrate by using a dry machining method. SOLUTION: The amorphous alignment layer is deposited on the transparent substrate by using the dry machining method such as plasma-reinforced chemical vapor-phase deposition. Then the atomic structure of the dry-machined alignment layer is aligned to at least one desired direction by using a particle beam device 48. A plasma generation unit 52 operates to generate ions and a group of three electrodes 54, 56, and 58 takes ions out to irradiate the substrate 20. The substrate 20 is fixed to a plate fixation platform 62 so that an angle θ as an angle of incidence of accelerated particles to a line perpendicular to the substrate 20 is maintained. The angle θ is preferably in a range of about 20 to 80 deg.. The alignment layer may be formed by a nonaqueous gas environmental deposition method such as vapor deposition, sputter deposition, and ion beam deposition.
摘要翻译：要解决的问题：为了获得通过使用干式加工方法在透明基板上沉积非晶取向层而以少量步骤制造的低成本，可靠的光晶体显示器。解决方案：通过使用等离子体增强化学气相沉积等干式加工方法将非晶取向层沉积在透明基板上。然后通过使用粒子束装置48将干法加工的取向层的原子结构与至少一个所需的方向对准。等离子体产生单元52操作以产生离子，并且一组三个电极54,56和58取离子从而照射基板20.基板20被固定到板固定平台62上，从而保持作为加速颗粒到垂直于基板20的线的入射角的角度θ。角度θ优选在约20〜80度的范围内。取向层可以通过非水气体环境沉积方法形成，例如气相沉积，溅射沉积和离子束沉积。

9. 发明专利

JPH11271774A Method for forming liquid crystal alignment layer 有权
标题翻译：形成液晶对准层的方法
公开(公告)号：JPH11271774A
公开(公告)日：1999-10-08
申请号：JP3833699
申请日：1999-02-17
申请人： Internatl Business Mach Corp , インターナショナル・ビジネス・マシーンズ・コーポレイション
发明人： ALESSANDRO CESARE CAREGARI , PRAVEEN CHAUDARI , DOYLE JAMES P , JAMES ANDREW LACEY , SHUI CHIN ALAN LIEN , PURUSHOTHAMAN SAMPATH , MAHESHU GOVIND SAMANT , JAMES L SPADEL , JOACHIM SUTOA
IPC分类号： G02F1/1337
CPC分类号： G02F1/13378
摘要： PROBLEM TO BE SOLVED: To form the alignment layer which has its characteristics improved without any mechanical contact with a striking directional particle beam to impinge on a film surface and arranging at least one liquid crystal on the struck surface.
SOLUTION: High-cost excessive layers and machining steps, and mechanical contact with the surface of the alignment layer are avoided by depositing the alignment layer directly on the surface with directivity. A substrate 10 is exposed to an ion beam 12 at a certain angle 14 of incidence. When the surface 16 is deposited with an ion beam 12, a material is deposited directly or indirectly on the surface 16 or is injected into the surface to form the alignment layer used to align light crystal. The layer can be made homogeneous by bonds preferentially aligned on the substrate surface 16 and the liquid crystal can be controlled more precisely. The thickness and electron characteristics of the alignment layer can be adapted such that optical performance can be obtained. Further, this alignment is manufactured economically in terms of time and cost.
COPYRIGHT: (C)1999,JPO
摘要翻译：要解决的问题：为了形成具有改进的特性的取向层，而不会与击打的方向性粒子束机械接触以撞击在膜表面上并且在击打表面上布置至少一个液晶。解决方案：通过以方向性将对准层直接沉积在表面上，避免了高成本的过量层和加工步骤以及与取向层的表面的机械接触。衬底10以一定的入射角度14暴露于离子束12。当表面16沉积有离子束12时，材料直接或间接沉积在表面16上或被注入到表面中以形成用于对准光晶体的取向层。可以通过优先对准在基板表面16上的键而使该层均匀，并且可以更精确地控制液晶。可以适应取向层的厚度和电子特性，使得可以获得光学性能。此外，这种对准在时间和成本方面经济地制造。

10. 发明专利

JPH11271958A High resolution photomask and its production 审中-公开
标题翻译：高分辨光电及其生产
公开(公告)号：JPH11271958A
公开(公告)日：1999-10-08
申请号：JP2580699
申请日：1999-02-03
申请人： Internatl Business Mach Corp , インターナショナル・ビジネス・マシーンズ・コーポレイション
发明人： WILLIAM JOHN ADAIR , CATHERINE E BAYVICH , ALESSANDRO CESARE CAREGARI , WAREIS RAY CARPENTER , SCOTT MARSHALL MANSFIELD , PURUSHOTHAMAN SAMPATH
IPC分类号： G03F1/58 , H01L21/027 , G03F1/08
CPC分类号： G03F1/32
摘要： PROBLEM TO BE SOLVED: To provide a method for forming a high-resolution photomask by decreasing the fluctuations in the critical dimensions(CD). SOLUTION: The decrease of the fluctuations in the CD may be embodied by using a thin conductive transfer layer 13 which may be patterned by electron beam lithography and dry or wet etching. The patterns are transferred to a lower layer film 12 by reactive ion etching. The lower layer film may be made opaque or partially transparent at 365, 248 and 193 nm. The thin conductive transfer layer 13 is formed of, for example, a thin Cr film and the opaque or partially transparent material may be formed of a carbon film, silicide metal or silicide oxy-nitride film.
摘要翻译：要解决的问题：提供通过减小临界尺寸（CD）的波动来形成高分辨率光掩模的方法。解决方案：CD中的波动的减小可以通过使用可以通过电子束光刻和干法或湿蚀刻图案化的薄导电转移层13来体现。通过反应离子蚀刻将图案转移到下层膜12。下层膜可以在365,248和193nm下制成不透明或部分透明的。薄导电转印层13由例如薄的Cr膜形成，并且不透明或部分透明的材料可以由碳膜，硅化金属或硅化物氮化物膜形成。

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