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1. 发明专利

JP2012079395A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2012079395A
公开(公告)日：2012-04-19
申请号：JP2011054671
申请日：2011-03-11
申请人： Hynix Semiconductor Inc , ハイニックスセミコンダクターインク
发明人： LEE JAEEUN , AHN YEON BOK
IPC分类号： G11C29/12
CPC分类号： G11C7/22 , G11C29/022 , G11C29/025
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which directly transmits data input through a data input path via a data output path, and to provide a semiconductor device which verifies reliability of data paths.SOLUTION: The semiconductor device includes: a memory array which saves write data transmitted through a data transmission line and transmits the saved data as read data to the data transmission line; a data write part which drives the write data to the data transmission line in response to a data write command; a data read part which senses the read data transmitted through the data transmission line in response to a data read command when a data verification signal is inactivated, and senses the write data transmitted through the data transmission line in response to the data write command when the data verification signal is activated.
摘要翻译：要解决的问题：提供一种半导体器件，其通过数据输出路径直接传输通过数据输入路径输入的数据，并提供验证数据路径的可靠性的半导体器件。解决方案：半导体器件包括：存储器阵列，其保存通过数据传输线传输的写入数据，并将保存的数据作为读取数据发送到数据传输线; 数据写入部，其响应于数据写入命令将写入数据驱动到数据传输线; 数据读取部分，当数据验证信号失效时，响应于数据读取命令，感测通过数据传输线传输的读取数据，并且当数据读取命令响应于数据写入命令时，感测通过数据传输线传输的写入数据数据验证信号被激活。版权所有（C）2012，JPO＆INPIT

2. 发明专利

JP2011233218A Semiconductor memory device 审中-公开
标题翻译：半导体存储器件
公开(公告)号：JP2011233218A
公开(公告)日：2011-11-17
申请号：JP2011007856
申请日：2011-01-18
申请人： Hynix Semiconductor Inc , ハイニックスセミコンダクターインク
发明人： AHN YEON BOK
IPC分类号： G11C13/00
CPC分类号： G11C13/0004 , G11C13/0061 , G11C13/0069 , G11C2013/0078 , G11C2013/0092
摘要： PROBLEM TO BE SOLVED: To shorten a programming period and to adjust a supplying period of a programming current pulse.SOLUTION: The device includes: a section control signal generating part for creating a section control signal which is activated after a first setting period in response to a programming enable signal; a first writing control code generating part which creates a first writing control code to be updated periodically during a second setting period in response to the programming enable signal and activates the update of the first writing control code in response to the section control signal; a second writing control code generating part for creating a second writing control code to be activated during a predetermined period in response to the programming enable signal; and a data writing part for outputting a first programming current pulse having a size corresponding to a code combination of the first writing control code to be updated and a second programming current pulse having a size corresponding to the second writing control code.
摘要翻译：要解决的问题：缩短编程周期并调整编程电流脉冲的供给周期。解决方案：该装置包括：区段控制信号产生部分，用于产生在第一设定周期之后响应于编程使能信号被激活的区段控制信号; 第一写入控制代码生成部，其响应于所述编程使能信号，在第二设定周期内创建要周期性地更新的第一写入控制代码，并响应于所述部分控制信号而激活所述第一写入控制代码的更新; 第二写入控制代码产生部分，用于响应于所述编程使能信号，在预定周期内创建要激活的第二写入控制代码; 以及数据写入部分，用于输出具有对应于要更新的第一写入控制代码的代码组合的大小的第一编程电流脉冲和具有与第二写入控制代码对应的大小的第二编程电流脉冲。版权所有（C）2012，JPO＆INPIT

3. 发明专利

JP2012079396A Semiconductor memory apparatus 审中-公开
标题翻译：半导体存储器
公开(公告)号：JP2012079396A
公开(公告)日：2012-04-19
申请号：JP2011054672
申请日：2011-03-11
申请人： Hynix Semiconductor Inc , ハイニックスセミコンダクターインク
发明人： AHN YEON BOK
IPC分类号： G11C13/00
CPC分类号： G11C13/0064 , G11C8/18 , G11C13/0004 , G11C13/0061 , G11C13/0069 , G11C2013/0092
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor memory apparatus which allows stable programming of a plurality of memory cells having programming characteristics different from one another, and to provide a semiconductor memory apparatus which can drive a programming current pulse having a supply time specific to each of a plurality of sections.SOLUTION: The semiconductor memory apparatus includes: a first write control code generation unit and a data write unit. The first write control code generation unit is configured to generate a first write control code which is updated with a cycle specific to each of a plurality of sections during the section in response to a programming verification flag signal and a programming enable signal. The data write unit is configured to output a first programming current pulse having a magnitude corresponding to a code combination of the first write control code which is updated.
摘要翻译：解决的问题：提供一种半导体存储装置，其允许具有彼此不同的编程特性的多个存储单元的稳定编程，并且提供一种可驱动具有供给时间的编程电流脉冲的半导体存储装置特定于多个部分中的每一个。解决方案：半导体存储装置包括：第一写入控制代码生成单元和数据写入单元。第一写入控制代码生成单元被配置为响应于编程验证标志信号和编程使能信号而生成在该部分期间以特定于多个部分中的每个部分的周期来更新的第一写入控制代码。数据写入单元被配置为输出具有对应于被更新的第一写入控制代码的代码组合的幅度的第一编程电流脉冲。版权所有（C）2012，JPO＆INPIT

4. 发明专利

JP2012079394A Semiconductor memory apparatus 审中-公开
标题翻译：半导体存储器
公开(公告)号：JP2012079394A
公开(公告)日：2012-04-19
申请号：JP2011007857
申请日：2011-01-18
申请人： Hynix Semiconductor Inc , ハイニックスセミコンダクターインク
发明人： AHN YEON BOK
IPC分类号： G11C13/00
CPC分类号： G11C13/0038 , G11C8/18 , G11C13/0004 , G11C13/0061 , G11C13/0064 , G11C13/0069 , G11C2013/0092
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor memory apparatus in which: supply time of a programming current pulse or a form of supplying a programming current pulse can be adjusted; a plurality of memory cells having programming characteristics different from one another are stably programmed; and the number of sections is adjusted in which a programming current pulse is repeatedly supplied.SOLUTION: The semiconductor memory apparatus comprises: a first write control code generation unit and a data write unit. The first write control code generation unit is configured to generate first write control codes which are updated with a cycle specific to each of a plurality of sections during the section in response to a programming verification flag signal and a programming enable signal, and determines the number of the plurality of sections depending upon a code value of the repetition times setting codes and an update cycle of the first write control codes in an initial section among the plurality of sections depending upon a code value of initial setting codes. The data write unit is configured to output a first programming current pulse having a magnitude corresponding to a code combination of the first write control codes which are updated.
摘要翻译：解决的问题：提供一种半导体存储装置，其中可以调节编程电流脉冲的供给时间或提供编程电流脉冲的形式; 具有彼此不同的编程特性的多个存储单元被稳定编程; 并且调节其中重复提供编程电流脉冲的部分数量。解决方案：半导体存储装置包括：第一写入控制代码生成单元和数据写入单元。第一写入控制代码生成单元被配置为响应于编程验证标志信号和编程使能信号而产生在该部分期间以特定于多个部分中的每一个的周期来更新的第一写入控制代码，并且确定数字取决于重复次数设置代码的代码值和多个部分中的初始部分中的第一写入控制代码的更新周期，这取决于初始设置代码的代码值。数据写入单元被配置为输出具有对应于被更新的第一写入控制代码的代码组合的幅度的第一编程电流脉冲。版权所有（C）2012，JPO＆INPIT

5. 发明专利

JP2011233220A Semiconductor memory device and method for creating programming current pulse 审中-公开
标题翻译：半导体存储器件和创建编程电流脉冲的方法
公开(公告)号：JP2011233220A
公开(公告)日：2011-11-17
申请号：JP2011045360
申请日：2011-03-02
申请人： Hynix Semiconductor Inc , ハイニックスセミコンダクターインク
发明人： AHN YEON BOK
IPC分类号： G11C13/00 , H01L27/105
CPC分类号： G11C13/0004 , G11C8/08 , G11C8/18 , G11C13/0061 , G11C13/0069 , G11C2013/0078 , G11C2013/0092
摘要： PROBLEM TO BE SOLVED: To shorten a programming period and to progressively reduce a programming current pulse by adjusting a supplying period and a size of this programming current pulse.SOLUTION: The device includes: a section control signal generating part for creating a section control signal which is activated after a first setting period in response to a programming enable signal; a first control code generating part which creates a first writing control code to be updated periodically during a second setting period in response to the programming enable signal and activates the update of the first writing control code in response to the section control signal; a second writing control code generating part for creating a second writing control code to be activated during a predetermined period in response to the programming enable signal; and a data writing part for outputting a first programming current pulse having a size corresponding to a code combination of the first writing control code or a second programming current pulse having a size corresponding to the second writing control code.
摘要翻译：要解决的问题：通过调整编程电流脉冲的供应周期和大小，缩短编程周期并逐渐减小编程电流脉冲。解决方案：该装置包括：区段控制信号产生部分，用于产生在第一设定周期之后响应于编程使能信号被激活的区段控制信号; 第一控制代码产生部分，响应于所述编程使能信号，在第二设置周期期间产生要周期性地更新的第一写入控制代码，并响应于所述部分控制信号激活所述第一写入控制代码的更新; 第二写入控制代码产生部分，用于响应于所述编程使能信号，在预定周期内创建要激活的第二写入控制代码; 以及数据写入部分，用于输出具有与第一写入控制代码或具有与第二写入控制代码对应的大小的第二编程电流脉冲的代码组合对应的大小的第一编程电流脉冲。版权所有（C）2012，JPO＆INPIT

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