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1. 发明专利

JP2005236335A Manufacturing method of semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：JP2005236335A
公开(公告)日：2005-09-02
申请号：JP2005146966
申请日：2005-05-19
申请人： Hitachi Ltd , Hitachi Ulsi Systems Co Ltd , 株式会社日立製作所 , 株式会社日立超エル・エス・アイ・システムズ
发明人： MASUDA MASACHIKA , WADA TAMAKI , SUGIYAMA MICHIAKI , NISHIZAWA HIROTAKA , KANNO TOSHIO , TAKAHASHI YASUSHI , KAWAMURA MASAYASU
IPC分类号： H01L25/18 , H01L23/50 , H01L25/065 , H01L25/07
CPC分类号： H01L2224/45144 , H01L2224/48091 , H01L2224/4826 , H01L2924/01055 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To provide a method for reducing a thickness and for improving electronic properties of a semiconductor device in which two semiconductor chips are laminated, which are sealed with one resin seal. SOLUTION: The semiconductor device includes: a resin seal; two semiconductor chips which are positioned within the resin seal, and on which front face of their front and rear faces external terminals are formed; and a lead extending over the inner side and outer side of the resin seal, wherein the lead is branched into two leads at least inside the resin seal, one of the branched leads is fixed to the front face of one of the semiconductor chips and electrically connected to the external terminal of the front face, the other of the branched leads is fixed to the front face of the other of the semiconductor chips and electrically connected to the external terminal of the front face, wherein each of the two semiconductor chips is laminated with their rear faces facing each other. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种减小厚度并改善半导体器件的电子性能的方法，其中两个半导体芯片被层叠，半导体器件被一个树脂密封件密封。解决方案：半导体器件包括：树脂密封; 位于树脂密封件内的两个半导体芯片，其前后表面形成有外部端子; 以及在所述树脂密封件的内侧和外侧延伸的引线，其中所述引线至少在所述树脂密封件的内部分支成两个引线，所述分支引线中的一个固定到所述半导体芯片之一的前表面，并且电连接到前表面的外部端子，另一个分支导线固定到另一个半导体芯片的前表面并电连接到前表面的外部端子，其中两个半导体芯片中的每一个层压其后表面相互面对。版权所有（C）2005，JPO＆NCIPI

2. 发明专利

JP2004328010A Semiconductor device 审中-公开
公开(公告)号：JP2004328010A
公开(公告)日：2004-11-18
申请号：JP2004205614
申请日：2004-07-13
申请人： Hitachi Ltd , Hitachi Ulsi Systems Co Ltd , 株式会社日立製作所 , 株式会社日立超エル・エス・アイ・システムズ
发明人： SAKUMA KAZUKI , KAWAMURA MASAYASU , TAKAHASHI YASUSHI , MASUDA MASACHIKA , WADA TAMAKI , SUGIYAMA MICHIAKI , NISHIZAWA HIROTAKA , KANNO TOSHIO
IPC分类号： H01L25/18 , H01L23/50 , H01L25/065 , H01L25/07
CPC分类号： H01L2224/48091 , H01L2224/4826 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which is capable of thinning a resin-sealed semiconductor device by laminating two semiconductor chips, and also improving electrical properties by reducing stray capacitance arising between the semiconductor chips. SOLUTION: A TSOP semiconductor device 1 is formed by laminating the semiconductor chips 2 and 3 with both rear faces facing each other. Outer leads for clock enable into which a clock enable signal and a chip select signal are input individually are mounted on the semiconductor chips 2 and 3, respectively. When gaining an access to one of the semiconductor chips, the other semiconductor chip can be set in a low power consumption mode by setting the clock enable signal and the chip select signal to an inactive state. COPYRIGHT: (C)2005,JPO&NCIPI

3. 发明专利

JP2003050980A Memory card 有权
标题翻译：存储卡
公开(公告)号：JP2003050980A
公开(公告)日：2003-02-21
申请号：JP2001237334
申请日：2001-08-06
申请人： Hitachi Ltd , Hitachi Ulsi Systems Co Ltd , 株式会社日立製作所 , 株式会社日立超エル・エス・アイ・システムズ
发明人： WADA TAMAKI , NISHIZAWA HIROTAKA , MASUDA MASACHIKA
IPC分类号： B42D15/10 , G06K19/00
摘要： PROBLEM TO BE SOLVED: To facilitate insertion into and extraction from a slot and to suppress manufacture cost. SOLUTION: On one short-side of a memory card functioning as a multimedia card, a recess 7 for extracting the memory card 1 from the memory slot, etc., by hooking it with a finger, a nail, etc., is formed also on the reverse-surface side as well as the top-surface side. This recess 7 is formed in a rectangular shape which is about 22 mm long and about 1 mm wide. Directly above this recess 7 for card extraction, a label sticking area 8 is formed which is shallower than the recess 7 for card extraction and which is for sticking a label where various manufacture information on the manufacture number, item number, etc., of the memory card 1 are displayed. Consequently, the recess 7 for card extractions are formed on both surfaces of the memory card 1, and it becomes easy to take the card out of the memory slot and the usability can greatly be improved.
摘要翻译：要解决的问题：为了便于插入和从槽中取出并抑制制造成本。解决方案：在用作多媒体卡的存储卡的一个短边上，还形成有用于通过用手指，指甲等钩住存储卡1从存储器插槽等中提取存储卡1的凹槽7 在背面侧以及顶面侧。该凹部7形成长约22mm，宽约1mm的矩形。直接位于用于卡提取的凹槽7上方，形成标签粘贴区域8，其比用于卡片提取的凹部7浅，并且用于粘贴标签，其中关于制造数量，项目编号等的各种制造信息显示存储卡1。因此，用于卡提取的凹部7形成在存储卡1的两个表面上，并且容易将卡从存储槽中取出，并且可以大大提高可用性。

4. 发明专利

JP2004200728A Semiconductor device and lead frame used for manufacture thereof 有权
公开(公告)号：JP2004200728A
公开(公告)日：2004-07-15
申请号：JP2004110875
申请日：2004-04-05
申请人： Hitachi Ulsi Systems Co Ltd , Renesas Technology Corp , 株式会社ルネサステクノロジ , 株式会社日立超エル・エス・アイ・システムズ
发明人： WADA TAMAKI , IWATANI AKIHIKO , KIMURA MIKAKO , MIYAGI HIROYUKI , MASUDA MASACHIKA
IPC分类号： H01L23/50
CPC分类号： H01L2224/32245 , H01L2224/48091 , H01L2224/4826 , H01L2224/49171 , H01L2224/49175 , H01L2224/73215 , H01L2924/00014 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device capable of preventing the warping package and voids due to down-sizing of a semiconductor chip.
SOLUTION: This semiconductor device comprises a semiconductor chip, a plurality of leads, conductive wires connecting between the leads and corresponding electrodes of the semiconductor chip, respectively, and a resin-made package for covering the semiconductor chip, parts of the leads, and the wires. Further, balancing parts for resin-balancing of the package are formed in part of a specific lead that is disposed in a region where the semiconductor chip does not occupy though inside the package. Furthermore, parts of the leads are bonded on the upper surface of the semiconductor chip with an insulating tape sandwiched between them to form LOC construction. In addition, the balancing parts are formed with branch leads branched from one lateral side of the specific lead, and at the middle of the respective branch leads, are bent toward the underside where the semiconductor chip lies.
COPYRIGHT: (C)2004,JPO&NCIPI

5. 发明专利

JP2007058870A Method of manufacturing memory card 审中-公开
标题翻译：制造记忆卡的方法
公开(公告)号：JP2007058870A
公开(公告)日：2007-03-08
申请号：JP2006270489
申请日：2006-10-02
申请人： Hitachi Ulsi Systems Co Ltd , Renesas Technology Corp , 株式会社ルネサステクノロジ , 株式会社日立超エル・エス・アイ・システムズ
发明人： WADA TAMAKI , MASUDA MASACHIKA , OTA TOSHIHIKO
IPC分类号： G06K19/077
摘要： PROBLEM TO BE SOLVED: To improve attachment/detachment performance to a socket in a memory card. SOLUTION: This invention is constituted of a wiring board 2, having a surface 2a and a reverse surface 2b mounted with a semiconductor chip 3, a bonding terminal 2c arranged on the surface 2a of the wiring board 2 and forming soft gold plating 2g on a surface 2f, an external connecting terminal 2d, arranged on the reverse surface 2b of the wiring board 2 and forming hard gold plating 2h on the surface 2f, a gold wire 4 for connecting the bonding terminal 2c to an electrode pad 3b of the semiconductor chip 3 and a cap 5 covering a resin sealing part 6 for sealing the semiconductor chip 3 and a plurality of gold wires 4. Metal plating of the surface 2f, of the external connecting terminal 2d of the memory card 1, is formed harder than or equal to metal plating of a surface 7b of a terminal 7a of the socket 7, and contact resistance between the external connecting terminal 2d of the memory card 1 and the terminal 7a of the socket 7 is reduced, and attaching-detaching performance of the memory card 1 to the socket 7 is improved. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提高对存储卡中插座的附着/拆卸性能。解决方案：本发明由具有表面2a和安装有半导体芯片3的反面2b的布线板2，布线在布线板2的表面2a上的接合端子2c构成，并形成软金镀层 2g表面2f上的外部连接端子2d，布置在布线板2的背面2b上并在表面2f上形成硬金镀层2h的外部连接端子2d，用于将接合端子2c连接到电极焊盘3b的金线4 半导体芯片3和覆盖用于密封半导体芯片3的树脂密封部6和多个金线4的盖5.金属镀层形成为更硬的存储卡1的外部连接端子2d的表面2f 不止于插座7的端子7a的表面7b的金属电镀，并且存储卡1的外部连接端子2d和插座7的端子7a之间的接触电阻减小，并且连接剥离性能该存储卡1到插座7被改进。版权所有（C）2007，JPO＆INPIT

6. 发明专利

JP2004118511A Memory card and its manufacturing method 审中-公开
公开(公告)号：JP2004118511A
公开(公告)日：2004-04-15
申请号：JP2002280752
申请日：2002-09-26
申请人： Hitachi Ulsi Systems Co Ltd , Renesas Technology Corp , 株式会社ルネサステクノロジ , 株式会社日立超エル・エス・アイ・システムズ
发明人： TASHIRO YUKINORI , YUGAWA YOSUKE , OBATA KAZUHIKO , WADA TAMAKI
IPC分类号： B42D15/10 , G06K19/077 , H01L21/56 , H01L25/04 , H01L25/18
CPC分类号： H01L2224/48091 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To suppress warping of a memory card and the occurrence of entrainment void.
SOLUTION: The method of manufacturing the memory card has a process of preparing a molding die having an adjustor adjustable in the amount of projection projecting into a cavity, and a process of injecting resin into the cavity while projecting the adjustor into the cavity, to seal a semiconductor chip arranged on a substrate, with the resin.
COPYRIGHT: (C)2004,JPO

7. 发明专利

JP2004193628A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2004193628A
公开(公告)日：2004-07-08
申请号：JP2004060690
申请日：2004-03-04
申请人： Hitachi Ulsi Systems Co Ltd , Renesas Technology Corp , 株式会社ルネサステクノロジ , 株式会社日立超エル・エス・アイ・システムズ
发明人： MASUDA MASACHIKA , WADA TAMAKI , SUGIYAMA MICHIAKI , TONO TOMOKO , NISHIDA TAKAFUMI , ONO HIROSHI
IPC分类号： H01L25/18 , H01L25/065 , H01L25/07
CPC分类号： H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2225/06562 , H01L2924/01021 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which is thinned by laminating two semiconductor chips and sealing them together in resin. SOLUTION: The semiconductor chips (4), (5) are bonded and fixed with the back sides of the chips which face each other so as to allow the other long side (4A2) of the semiconductor chip (4) and one long side (5A1) of the semiconductor chip (5) to be directed to the side of a lead (10B), and a support lead (8) is bonded and fixed to the circuit formation surface (4A) of the semiconductor chip (4) or the circuit formation surface (5A) of the semiconductor chip (5). COPYRIGHT: (C)2004,JPO&NCIPI
摘要翻译：要解决的问题：提供通过层压两个半导体芯片并将它们密封在一起的树脂来减薄的半导体器件。解决方案：半导体芯片（4），（5）与彼此面对的芯片的背面接合固定，以便允许半导体芯片（4）的另一个长边（4A2）和一个半导体芯片（5）的长边（5A1）被引导到引线（10B）的一侧，并且支撑引线（8）被接合并固定到半导体芯片（4）的电路形成表面（4A））或半导体芯片（5）的电路形成面（5A）。版权所有（C）2004，JPO＆NCIPI

8. 发明专利

JP2007251217A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2007251217A
公开(公告)日：2007-09-27
申请号：JP2007177896
申请日：2007-07-06
申请人： Hitachi Ulsi Systems Co Ltd , Renesas Technology Corp , 株式会社ルネサステクノロジ , 株式会社日立超エル・エス・アイ・システムズ
发明人： WADA TAMAKI , IWATANI AKIHIKO , KIMURA MIKAKO , MIYAGI HIROYUKI , MASUDA MASACHIKA
IPC分类号： H01L23/50
CPC分类号： H01L2224/32245 , H01L2224/48091 , H01L2224/4826 , H01L2224/49175 , H01L2224/73215 , H01L2924/00014 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To prevent warping and occurrence of a void in a package due to decrease in chip size.
SOLUTION: A semiconductor device comprises: a semiconductor chip; a plurality of leads; a conductive wire for connecting the lead to the electrode of the semiconductor chip; and a package made of resin for covering the semiconductor chip, one portion of the lead, and the wire. In the semiconductor device, a balancing section for balancing the resin of a package is provided at a prescribed lead section of a region that is inside the package where no semiconductor chips are positioned. One portion of the lead is adhered to one surface of the semiconductor chip via an insulating tape in an LOC structure. The balancing section becomes a branch piece projecting from the side of the lead, and is bent halfway at the lower surface side where the semiconductor chip is positioned.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了防止由于芯片尺寸的减小而导致的封装中的翘曲和空隙的发生。解决方案：半导体器件包括：半导体芯片; 多个引线; 用于将引线连接到半导体芯片的电极的导线; 以及用于覆盖半导体芯片，引线的一部分和导线的由树脂制成的封装。在半导体装置中，在没有半导体芯片的封装内的区域的规定的引线部设置有用于平衡封装的树脂的平衡部。引线的一部分通过LOC结构中的绝缘带粘附到半导体芯片的一个表面。平衡部成为从引线侧突出的分支片，并且在半导体芯片的下表面侧中途弯曲。版权所有（C）2007，JPO＆INPIT

9. 发明专利

JP2005141769A Memory card 有权
标题翻译：存储卡
公开(公告)号：JP2005141769A
公开(公告)日：2005-06-02
申请号：JP2004375787
申请日：2004-12-27
申请人： Hitachi Ulsi Systems Co Ltd , Renesas Technology Corp , 株式会社ルネサステクノロジ , 株式会社日立超エル・エス・アイ・システムズ
发明人： WADA TAMAKI , NISHIZAWA HIROTAKA , MASUDA MASACHIKA , OSAWA KENJI , OSAKO JUNICHIRO , HATAKEYAMA SATOSHI , ISHIHARA HARUJI , YOSHIZAKI KAZUO , FURUSAWA KAZUNORI
IPC分类号： G06K19/077
摘要： PROBLEM TO BE SOLVED: To improve versatility of a memory card. SOLUTION: An adapter attachment part 3a having a projecting section is provided on a cap 3 of a reduced-sized memory card 1, and a recessed part of an adapter 2 is fitted to the adapter attachment part 3a to integrate the reduced-sized memory card 1 and the adapter 2 into one body in a freely detachable state, so that dimensional compatibility of the reduced-sized memory card 1 with a full-sized memory card is kept to make the reduced-sized memory card 1 available in apparatus adapted to full-sized memory cards. COPYRIGHT: (C)2005,JPO&NCIPI

10. 发明专利

JP2004158896A Semiconductor device 有权
公开(公告)号：JP2004158896A
公开(公告)日：2004-06-03
申请号：JP2004060689
申请日：2004-03-04
申请人： Hitachi Ulsi Systems Co Ltd , Renesas Technology Corp , 株式会社ルネサステクノロジ , 株式会社日立超エル・エス・アイ・システムズ
发明人： MASUDA MASACHIKA , WADA TAMAKI , SUGIYAMA MICHIAKI , TONO TOMOKO , NISHIDA TAKAFUMI , ONO HIROSHI
IPC分类号： H01L25/18 , H01L25/065 , H01L25/07
CPC分类号： H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2225/06562 , H01L2924/01021 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To provide a technology which can thin down a semiconductor device which laminates two semiconductor chips, and seals these two semiconductor chips with a resin sealant. SOLUTION: The respective chips of semiconductor chips 4, 5 are bonded each other for fixing while the respective backsides are made to face each other, such that another long side 4A2 of the semiconductor chip 4 and one long side 5A1 of the semiconductor chip 5 face reed 10B side. A support lead 8 are bonded to the circuit surface 4A of the semiconductor chip 4 or the circuit surface 5A of the semiconductor chip 5. COPYRIGHT: (C)2004,JPO

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