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1. 发明专利

JPS60157333A RANDOM ACCESS MEMORY 失效
公开(公告)号：JPS60157333A
公开(公告)日：1985-08-17
申请号：JP15290584
申请日：1984-07-25
申请人： HITACHI LTD
发明人： SATOU TAKASHI
IPC分类号： H03K19/096 , G11C11/407 , G11C11/41
摘要： PURPOSE:To obtain a random access memory which offers two different ways of application to a user by incorporating a timing logical circuit to select two types of writing timing. CONSTITUTION:The precharging action is through with the gate capacities of FETQ5 and Q6 when a precharging pulse signal phi1 is changed to 0 from 1. Based on this fall edge, a reference pulse signal phi10 is applied to an FETQ5 with a delay equivalent to a prescribed time T0. In this case, if a pulse signal phi2 is already set at 1, the FETQ5 is turned off since an FETQ1 is turned on. Thus it is improssible to turn on an FETQ3 although the signal phi10 is set at 1. Therefore an output pulse phi3 is set an inactive level. While the pulse phi3 is set at an active level in case the signal phi2 is set at 1 with a delay.

2. 发明专利

JPS59183699A Method and apparatus for determination of isocitric acid dehydrogenase 失效
标题翻译：用于测定异烟酸脱氢酶的方法和装置
公开(公告)号：JPS59183699A
公开(公告)日：1984-10-18
申请号：JP5503083
申请日：1983-04-01
申请人： Hitachi Ltd
发明人： OOTSU HISASHI , SATOU TAKASHI , SUGAWARA YASUSHI
IPC分类号： G01N27/416 , C12M1/34 , C12M1/40 , C12Q1/32
摘要： PURPOSE: To determine the concentration of isocitric acid dehydrogenase in a specimen, in high accuracy, in a short time, by inserting carbon dioxide electrodes in the flow-cell type determination cells placed before and after the enzymatic reaction tube, and measuring the difference of the carbon dioxide concentration before and after the enzymatic reaction.
CONSTITUTION: The carbon dioxide electrodes 15 and 18 are inserted in the flow- cell type determination cells 14 and 17, respectively. A manganese chloride solution 11 and an oxaloacetic acid solution 12 are introduced into the flow path by suction, and the specimen 13 is introduced into the path. The concentration of CO
2 in the solution is measured immediately after the introduction by the electrode 15 (the peak A), the solution is subjected to the enzymatic reaction in the enzymatic reaction tube 16 heated at 37°C to generate CO
2 , and the concentration of CO
2 in the solution is measured by the electrode 18 (the peak B). The output signals from the electrodes 15 and 18 are converted to the activities by the amplifier 19 and the arithmetic operator 20, and displayed on the display 21. The activity of isocitric acid dehydrogenase can be determined from the output difference between the peak B and the peak A, and the progress of the enzymatic reaction can be detected.
COPYRIGHT: (C)1984,JPO&Japio
摘要翻译：目的：为了准确测定样品中异柠檬酸脱氢酶的浓度，在短时间内，将二氧化碳电极插入酶反应管前后置入的流动细胞型测定细胞中，测定其差异酶反应前后的二氧化碳浓度。构成：二氧化碳电极15和18分别插入流通池型确定单元14和17中。通过抽吸将氯化锰溶液11和草酰乙酸溶液12引入流路，将试样13引入路径。在电极15（峰A）引入后立即测定溶液中的CO 2浓度，将溶液在加热至37℃的酶反应管16中进行酶反应，生成CO 2，浓度的溶液中的二氧化碳由电极18（峰B）测量。来自电极15和18的输出信号被放大器19和算术运算器20转换为活动，并显示在显示器21上。异柠檬酸脱氢酶的活性可以根据峰B和峰A，并且可以检测酶反应的进程。

3. 发明专利

JPS5845690A ADDRESS BUFFER CIRCUIT 失效
公开(公告)号：JPS5845690A
公开(公告)日：1983-03-16
申请号：JP13723682
申请日：1982-08-09
申请人： HITACHI LTD
发明人： SATOU TAKASHI
IPC分类号： G11C11/413 , G11C8/06
摘要： PURPOSE:To prevent an output from being floated and to easily revise an output level, by applying a complementary signal corresponding to an address input signal to a gate of a pair of cross-connected MISFETs. CONSTITUTION:An input signal Ai is applied to a gate of an insulation gate field effect transistor (MISFET)Q5. A complementary output A' of a flip-flop circuit is applied to a gate of a MISFETQ6 of an inverter circuit and an output A of a flip-flop circuit is applied to a gate of a MISFETQ8 of the inverter circuit. MISFETsQ7, Q9 at reference potential (ground level) constituting the inverter circuit are connected in parallel with MISFETs Q12, Q13 to the gate of which a signal CE' going to 1(high level) at chip non-selection is applied. Thus, outputs A, A' of the flip-flop circuit and outputs ai, ai' of the output circuit go both to 0 at chip non-selection.

4. 发明专利

JPS5817726A LATCH TYPE INVERTER CIRCUIT 失效
公开(公告)号：JPS5817726A
公开(公告)日：1983-02-02
申请号：JP11503281
申请日：1981-07-24
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： JIYOUKOU RIICHI , SATOU TAKASHI
IPC分类号： H03K3/356 , H03K19/096
摘要： PURPOSE:To obtain an output waveform at a desired delay time even with fluctuated power supply voltage, by providing a feedback circuit in which self- bias is changed in response to prechanrge level, to a connecting point of two MOSFETs constituting a delay section. CONSTITUTION:At waiting a terminal N7 is precharged to a level lower by one step than that of a power supply voltage and gm of a MOSFETQ15 has a large value with high gate voltage. Thus, when an input signal phiin is applied at the operation, the level of a terminal A determined with the ratio of gm of the MOSFETs Q15 and Q17 is high. Thus, a voltage at a terminal N6 which is determined with the ratio of gm of the MOSFETs Q16 and Q17 connected in series with the MOSFETQ14 also reaches a threshold level at earlier point and a MOSFETQ19 turns on earlier. Then, even if the power supply voltage is fluctuated, the FF is inverted with a specified delay time and the output waveform phiout of the driving section II can be turned on at the point of time. That is, useless delay of output waveform can be decreased.

5. 发明专利

JPS564217A LARGE CAPACITY THREEEPHASE TRANSFORMER 失效
公开(公告)号：JPS564217A
公开(公告)日：1981-01-17
申请号：JP7917179
申请日：1979-06-25
申请人： HITACHI LTD
发明人： HOSHI MINORU , MORI ETSUNORI , SATOU TAKASHI
IPC分类号： H01F27/04 , H01F27/14 , H01F30/12
摘要： PURPOSE:To make carrying in and out and checking of unit transformers easy by providing a space corresponding to one transformer between the transformers in transformer groups arranged in parallel, and arranging a plurality of conservators in a zigzag shape on the high voltage ducts arranged on the transformers. CONSTITUTION:Transformer groups 501 and 502 are formed by arranging a plurality of unit transformers 101-103 and 104-106 in one line, respectively. A space A corresponding to one transformer is formed between the transformer groups 501 and 502. The transformers 101-106 of the transformer groups 501 and 502 are electrically connected via low voltage ducts 109-115, a common low voltage duct 116, and high voltage ducts 112-114. A plurality of conservator 131-133 are arranged in a zigzag shape on said high voltage duct 112-114. Tubing 150-154 from the ducts 109-116 and 112-114 are connected to the conservator 131-133. The transformers 101-106 are connected to the inside of the ducts 109-116 and 112-114. Therefore, the transformers 101-106 can be readily carried in and out and checked.

6. 发明专利

JPS5479504A DATA HIGHWAY SYSTEM 失效
公开(公告)号：JPS5479504A
公开(公告)日：1979-06-25
申请号：JP14742077
申请日：1977-12-07
申请人： HITACHI LTD
发明人： TAMURA MASAMI , SATOU TAKASHI
IPC分类号： G06F13/00 , H04L12/437
摘要： PURPOSE:To reduce unaccountable transfer failures by informing a control station that its own circuit is not separated, by changing data on a detection frame. CONSTITUTION:The data highway system consists of stations 3, 4 and 5 connected to a ring transmission line, and control station 2 supervising this transmission line. In the intervals of an exchange of normal information, output control circuit 27 is controlled to output details of a detection frame, stored in output rigister 30, showing circuit separation states of stations 3, 4 and 5, and each station is informed of the response of a station to the detection frame. In this case, stations 3, 4 and 5 inform station 2, by changing data on the detection frame, that their own circuits are not separated at the time of the reception of the data. Consequently, unaccountable transfer failures can be reduced.

7. 发明专利

JPS5460531A SENSE AMPLIFIER CIRCUIT 失效
公开(公告)号：JPS5460531A
公开(公告)日：1979-05-16
申请号：JP12683477
申请日：1977-10-24
申请人： HITACHI LTD
发明人： SATOU TAKASHI
IPC分类号： G11C11/419 , G11C11/409 , G11C11/4091
摘要： PURPOSE:To realize the high speed and high sensitivity for the dynamic FF circuit by applying the defferential input signal also to driving MISFET of the FF circuit. CONSTITUTION:MISFET Q1, which is provided to MISFET Q2, Q3, and their common source receiving application of the differential input singal from the memory cell and controlled by clock pulse phi1, forms buffer amplifier BA. The output signals are applied to the gates of load Q13 and Q15 plue dirving Q16 and Q14 of the first inverter circuit (MISFETQ13 and Q14) and the second inverter circuit (MISFETQ15 and Q16) which form sense amplifier SA. Accordingly, the output of the in verter circuit is determined by the geometeical conductance between Q13/Q15 and Q16/Q14 caused by the level difference of the input signal, and the conductance difference becomes large between the both inverter circuits at the instant when clock phi2 features high livel. As a result, the level lowering of the storage charge can be prvented with no reduction of the conductance of load Q3 or Q15. Thus, the high- speed and assured charging is ensured for output capactiy C3 or c4 of SA.

8. 发明专利

JPS5325324A ADDRESS SELECTION SYSTEM 失效
公开(公告)号：JPS5325324A
公开(公告)日：1978-03-09
申请号：JP9968576
申请日：1976-08-23
申请人： HITACHI LTD
发明人： SATOU TAKASHI
IPC分类号： G11C11/41 , G11C11/408 , G11C11/413
摘要： PURPOSE:To decrease the number of the address buffer circuit and thus to reduce the power consumption with a stabilized operation by applying a set address input signal in common to the line and the row selection decoders and driving the both decoders in terms of time division.

9. 发明专利

JPS5314526A SEMICONDUCTOR MEMORY 失效
公开(公告)号：JPS5314526A
公开(公告)日：1978-02-09
申请号：JP8817776
申请日：1976-07-26
申请人： HITACHI LTD
发明人： YASUI TOKUMASA , ITOU TSUNEO , SATOU TAKASHI
IPC分类号： G11C11/419 , G11C11/409 , G11C11/4093
摘要： PURPOSE:To eliminate the signal transmission delay by connecting the data signal line directly to the level conversion interface as well as to prevent the disturbance of the output signal with connection of a circuit which ensures a lower output at the chip non-selection time and a higher output at the selection time respectively.

10. 发明专利

JPS60247387A MAGNETIC RECORDING AND REPRODUCING DEVICE 失效
公开(公告)号：JPS60247387A
公开(公告)日：1985-12-07
申请号：JP10260884
申请日：1984-05-23
申请人： HITACHI LTD , HITACHI VIDEO ENG
发明人： SATOU TAKASHI , SHIOMI MAKOTO , MIURA KUNIAKI
IPC分类号： G11B20/02 , G11B5/027 , G11B20/06 , H04N5/782 , H04N5/93
摘要： PURPOSE:To improve the capacity of a line correlating circuit to improve the quality of reproduced pictures by delaying a reproduced frequency modulation signal with a glass delay line by one period after converting it to a high band by the output signal from an oscillator and extending equivalently the signal pass band width of this glass delay line. CONSTITUTION:The frequency modulation signal (reproduced FM signal) reproduced by a video head 9 is amplified by a preamplifier 10 and is controlled to a certain level by an automatic gain control circuit 11. The reproduced FM signal subjected to band conversion is peaked by an SAW filter 14, whose group delay characteristic and amplitude characteristic can be selected independently, and passes an inversion preventing circuit consisting of a high band limiter 15, a low band amplifier 16, and a mixer 17 and passes a changeover switch 18 and is demodulated to a video signal A by an FM demodulator 1. Simultaneously, the reproduced FM signal delayed by a 1H delay line 19 is demodulated to a video signal B by an FM demodulator 2. In this embodiment, the wide-band glass delay line is used as the 1H delay line 19.

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