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1. 发明专利

JPS59214247A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：JPS59214247A
公开(公告)日：1984-12-04
申请号：JP8768583
申请日：1983-05-20
申请人： Hitachi Cable Ltd , Hitachi Ltd
发明人： OKIKAWA SUSUMU , SUZUKI HIROMICHI , SATOU HAJIME , YAMAGISHI RIYOUZOU
IPC分类号： H01L21/52 , H01L23/492 , H01L23/495 , H01L23/50 , H01L23/48 , H01L21/58
CPC分类号： H01L23/49582 , H01L23/4924 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/83 , H01L2224/32245 , H01L2224/48 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2224/83101 , H01L2224/83193 , H01L2224/83455 , H01L2224/83801 , H01L2224/92247 , H01L2924/01029 , H01L2924/0105 , H01L2924/01082 , H01L2924/014 , H01L2924/15747 , H01L2924/181 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
摘要： PURPOSE:To enhance reliability of pellet bonding through the reduction of cost thereof by forming a tin plated layer through a lower plated layer to the upper part of pellet fitting part of substrate. CONSTITUTION:A nickel-plated layer 17 which prevents diffusion of copper material of frame 11 to the direction of pellet is provided at a lower plated layer on a tab 16 which is a pellet fitting area of lead frame 11. A tin layer 18 which is well wetable with solder is formed on the plated layer 17. When a semiconductor pellet 12 is placed on a fusible tin layer 18 through a soluble solder foil 19 and is then caused to make scribe motion, the pellet 12 is securely welded on the tab 16.
摘要翻译：目的：通过将下镀层形成镀锡层到基板的芯片安装部的上部，通过降低成本来提高芯片接合的可靠性。构成：防止框架11的铜材料向颗粒方向扩散的镀镍层17设置在作为引线框11的芯片嵌合区域的突片16的下镀层上。锡层18是在电镀层17上形成可焊接的良好的润湿剂。当将半导体颗粒12通过可溶性焊锡箔19放置在易熔锡层18上，然后使其进行划线时，将颗粒12牢固地焊接在突片16上。

2. 发明专利

JPH04318961A LEAD FRAME, MANUFACTURE THEREOF AND SEMICONDUCTOR IC DEVICE USING THE SAME 失效
公开(公告)号：JPH04318961A
公开(公告)日：1992-11-10
申请号：JP8497191
申请日：1991-04-17
申请人： HITACHI LTD
发明人： WATANABE HIROSHI , OKIKAWA SUSUMU , MIKINO HIROSHI
IPC分类号： H01L21/60 , H01L23/50
摘要： PURPOSE:To improve junction strength between a coated wire and an inner lead and improve reliability from the view point of its junction. CONSTITUTION:A plated layer 7 having a rougher surface than in the past is formed on the surface of an inner lead 5b of a lead frame 1, with which a coated wire 8 where the surface of a metal wire 8a is coated with a coating insulating film 8b. Then, when the coated wire 8 is to be joined with the inner lead 5b, the coated insulating film 8b of the coated wire 8 can be broken by the unevenness of the surface of the plated layer 7.

3. 发明专利

JPH041504B2 失效
公开(公告)号：JPH041504B2
公开(公告)日：1992-01-13
申请号：JP11725586
申请日：1986-05-23
申请人： HITACHI LTD
发明人： OOTSUKI KEIZO , SHIMIZU KAZUO , INOE FUMIHITO , OKIKAWA SUSUMU
IPC分类号： H01L23/50 , H01L21/56 , H01L23/495

4. 发明专利

JPH02186650A SEMICONDUCTOR DEVICE AND WIRE BONDING THEREFOR 失效
公开(公告)号：JPH02186650A
公开(公告)日：1990-07-20
申请号：JP582889
申请日：1989-01-12
申请人： HITACHI LTD
发明人： WATANABE HIROSHI , OKIKAWA SUSUMU , MIKINO HIROSHI
IPC分类号： H01L21/60
摘要： PURPOSE:To reduce the size of a semiconductor device by a method wherein pad electrodes are formed in such a way that the pad electrodes are alternately arranged in a zigzag configuration at a prescribed pitch on the outer peripheral line along the respective peripheral edges of a semiconductor chip and at a prescribed pitch on the inner peripheral line of the chip and at the same time, the pitches between the respective pad electrodes become larger as they approach to the corner parts of the chip. CONSTITUTION:A semiconductor chip 6 has a square chip main surface and pad electrodes 7 are arranged on the outer peripheral line OL of the chip 6. These electrodes are arranged in such a way that the centers of two pieces of the adjacent electrodes 7 arranged on this line OL and the center of one piece of a pad electrode 7 arranged on an inner peripheral line IL, which is positioned more nearer to the direction of the center of the chip 6 than this line OL, form a triangle. In this case, in case an equilateral triangle is formed and the electrodes 7 are arranged in a regular zigzag configuration, the highest arrangement density can be realized. Accordingly, the electrodes 7 are arranged so that such each triangle as the inner angle, which is positioned on the side near some corner part of the chip, of the triangle is set as theta and the inner angle (alpha), which is constituted of the direction of a covered wire 8 and the base of the triangle, is always larger than the theta is specified and the center of the electrode 7 is positioned at the vertex of this triangle. Thereby, while the contact of a bonding tool with the already-disposed-in-tension wire is prevented, the number of the acquired pad electrodes can be secured.

5. 发明专利

JPH01235363A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH01235363A
公开(公告)日：1989-09-20
申请号：JP6390788
申请日：1988-03-16
申请人： HITACHI LTD
发明人： ANJO ICHIRO , NISHI KUNIHIKO , OKIKAWA SUSUMU , IIJIMA HAJIME
IPC分类号： H01L25/18 , H01L25/065 , H01L25/07
摘要： PURPOSE:To increase the mounting density per package by a method wherein one or more semiconductor chips are piled up on a semiconductor chip and these are pellet-bonded by using a nonconducting adhesive. CONSTITUTION:A lower-part semiconductor chip 1B is pellet-bonded to a tab 2 by using an adhesive 3 for pellet bonding use. An upper-part semiconductor chip 1A is pellet-bonded to the lower-part semiconductor chip 1B by using a nonconducting adhesive 4 for pellet bonding use. The upper-part and lower- part semiconductor chips 1A and 1B are connected individually to lead frames 6 by using bonding wires 5A, 5B, and sealed by using a resin 7 for mold sealing use such as a resin or the like. Individual pads on the upper-part and lower-part semiconductor chips 1A and 1B and the bonding wires 5A, 5B are connected by a wedge ball bonding method. The lead frames 6 and the bonding wires 5A, 5B are connected by a thermal pressure bonding method used together with an ultrasonic oscillation. By this setup, the mounting density per package can be increased by a portion where a semiconductor chip is piled up at the upper-part.

6. 发明专利

JPS63250828A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS63250828A
公开(公告)日：1988-10-18
申请号：JP8475887
申请日：1987-04-08
申请人： HITACHI LTD
发明人： ONUKI HITOSHI , KOIZUMI MASAHIRO , SUZUKI HITOSHI , ARAKI ISAO , OKIKAWA SUSUMU
IPC分类号： H01L21/60
摘要： PURPOSE:To make it possible to bond a Cu ball to a reliable IC or LSI by a method wherein the copper ball is deformed in such a way that one of crystal grains on the peripheral part of the copper ball right over the interface of a joint part makes an angle of 30 degrees or less with a semiconductor integrated circuit chip and is bonded to the IC or LSI. CONSTITUTION:In the joint part between a Cu ball and an Al electrode on an Si chip, the Cu ball is deformed in such a way that at least one of crystal grains 2 on the peripheral part of the Cu ball 1 right over the interface of the joint part makes an angle theta of 30 degrees or less with the Si chip and is bonded. After the texture of the Cu ball on the bonding interface of the Cu ball is polished in parallel to the chip, the crystal grains are contrived in such a way that their average crystal grain diameter becomes 15 mum or less. In such a way, when the ball is formed by short-circuit discharge using a Cu wire of a high purity of 99.999 % or more in the mixed inert gas of Ar and H2 gases, the rate of solidification is controlled. Thereby, the texture is controlled and the ball is softened to prevent a failure of bonding.

7. 发明专利

JPS63182828A BONDING METHOD AND DEVICE THEREFOR 失效
公开(公告)号：JPS63182828A
公开(公告)日：1988-07-28
申请号：JP1403587
申请日：1987-01-26
申请人： HITACHI LTD
发明人： OKIKAWA SUSUMU , TANIMOTO MICHIO
IPC分类号： H01L21/60
摘要： PURPOSE:To reduce the generation of defective bonding by a method wherein the surface of a metal wire is exposed by removing the insulating material on the bonding part of a covered wire using the flame of burning mixed gas, and the insulating material of the covered wire is removed completely. CONSTITUTION:The covered wire 2, consisting of a metal wire which is covered by an insulating material, is connected to a bonding part. At that time, the mixed gas of combustion gas and temperature controlling gas to be used to lower the burning temperature of the combustion gas is formed. The insulating material on the bonding part of the wire 2 is removed by jetting out the burning flame generated by burning the combustion gas from an insulating material removing torch 15, and the surface of the metal wire at the bonding part of the wire 2 is exposed. The metal wire of the exposed wire 2 is connected to the bonding part. As a result, the burning flame giving no damage or breakage can be engulfed substantially on the whole area of the bonding part of the wire 2. Consequently, the insulating material of the wire 2 can be removed completely, and the generation of unsatisfactory bonding can be reduced.

8. 发明专利

JPS6222456B2 失效
公开(公告)号：JPS6222456B2
公开(公告)日：1987-05-18
申请号：JP13765979
申请日：1979-10-26
申请人： HITACHI LTD
发明人： SUZUKI HIROMICHI , OKIKAWA SUSUMU
IPC分类号： H01L23/08 , H01L23/495 , H01L23/50

9. 发明专利

JPS6271252A LEAD FRAME AND SEMICONDUCTOR DEVICE USING THE SAME 失效
公开(公告)号：JPS6271252A
公开(公告)日：1987-04-01
申请号：JP20995185
申请日：1985-09-25
申请人： HITACHI LTD
发明人： OKIKAWA SUSUMU , MIYAIRI AKIRA
IPC分类号： H01L23/50 , H01L23/495
摘要： PURPOSE:To prevent the pellet of a semiconductor device from cracking by using a lead frame in which a stress alleviating portion is formed inside from a locking unit by forming the locking unit in a tab hanging lead. CONSTITUTION:Since through-holes 5 are formed in a tab 3 and a tab handing lead 4, resin 11 is fed into the holes 5 when a package is molded to completely stop moving the lead 4. Thus, the bonding of the lead 4 to the package resin 11 is extremely strengthened. A circular-arc portion 8 is formed at the connecting portion of the tab 3 to the lead 4 to increase the width of the connecting portion. Since the width of the connecting portion is thus wide, the stress can be that much dispersed with the result of effectively preventing a pellet from cracking due to the stress concentration.

10. 发明专利

JPS6220858A BONDING WIRE, ITS PRODUCTION AND SEMICONDUCTOR DEVICE USING SAID WIRE 失效
公开(公告)号：JPS6220858A
公开(公告)日：1987-01-29
申请号：JP15814185
申请日：1985-07-19
申请人： HITACHI LTD
发明人： OKIKAWA SUSUMU , SUZUKI HIROMICHI , MIKINO HIROSHI
IPC分类号： C22F1/08 , C22F1/00 , H01L21/60 , H01L23/48
摘要： PURPOSE:To connect highly strong bonding wires to a semiconductor pellet and a develop a semiconductor device having excellent reliability by using high-purity copper as stock and subjecting the stock to plural passes of drawing including intermediate annealing thereby producing the bonding wires to be used for the semiconductor device. CONSTITUTION:The copper strand which has high purity of >=99.999% and is adjusted by unidirectional solidification in the longitudinal direction is drawn by passing the same through plural dies. The wire is subjected to an annealing treatment consisting of heating for 30min at 250-300 deg.C in the mid-way of the drawing and is drawn to a prescribed diameter. The copper bonding wires 7 produced by the above-mentioned method contribute to the improvement of the wire strength at bonding necks 7a in the part right above the molten balls in the stage of bonding after ball bonding. A silicone gel 8 is coated atop the semiconductor pellet 4 to improve the moisture resistance of the bonding pads 5. The semiconductor device having excellent reliability is thus produced.

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