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    • 9. 发明专利
    • WIRE BONDING METHOD AND DEVICE
    • JPS5678132A
    • 1981-06-26
    • JP15433979
    • 1979-11-30
    • HITACHI LTDNITSUKAN DENSHI KK
    • USAMI TAMOTSUOOTSUKA KANJIARAKI TAKASHIFUDA MUTSUO
    • H01L21/60
    • PURPOSE:To accurately perform the line junction for the subject wire bonding by a method wherein the positions of a pad and an inner lead of a semiconductor are detected and memorized, a part of these positions is redetected and compared with the memorized ones, and a correct positioning is performed automatically. CONSTITUTION:A semiconductor device 7 is temporarily fixed on a rest 15, the position of the inner lead 6, whereon a line junction with the positions of the pads 5a and 5b on a pellet 2 will be performed, is detected and the value of a relative position is memorized. The device 7 is shifted to and fixed on a rest 23 of an automatic bonder 22 and the positions of the pads 5a and 5b or leads 6a and 6b, which can be easily ascertained in the lead 6, are detected 20. By comparing the detected value with the memory 19, the positions of all the pads and the inner leads can be relatively found on the basis of the positions of the pads 5a, 5b and leads 6a, 6b. Based on the compared results and by controlling and shifting the rest 23 and a tool 24, the line junction 22 can be accurately performed automatically with a high working efficiency.