专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JP2001274339A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND NONCONTACT TYPE ELECTRONIC DEVICE 失效
公开(公告)号：JP2001274339A
公开(公告)日：2001-10-05
申请号：JP2000088800
申请日：2000-03-28
申请人： HITACHI LTD , HITACHI ULSI SYS CO LTD
发明人： WATANABE KAZUKI , YOSHINO RYOZO , YAMAMOTO MOROHISA , KINOTA HAJIME , KAMEI KEIJI
IPC分类号： G05F1/56 , G06K19/07 , H01L21/822 , H01L27/04 , H02M7/12 , H04B5/02
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device and a noncontact type electronic device provided with a power circuit realizing formation of stable smoothing voltage with high efficiency and a stable behavior of the internal circuit. SOLUTION: Alternative voltage is applied to the first and the second input terminals, a drain (or a collector) is connected to the second input terminal, rectified current is applied between the first and the second input terminals by a rectifier transistor to which a gate (or a base) and a drain (or a collector) are connected through a resisting means, control voltage is formed so that the rectified voltage gained on the source (or emitter) side of the first rectifier transistor by the first voltage detecting means is matched to the predetermined reference voltage, and the current corresponding to the control voltage is formed by the first voltage control current source to apply the first resisting means. A power circuit so described is mounted on a noncontact type electronic device.

2. 发明专利

JP2001078461A RECTIFYING CIRCUIT FOR IC CARD 失效
公开(公告)号：JP2001078461A
公开(公告)日：2001-03-23
申请号：JP24995299
申请日：1999-09-03
申请人： HITACHI LTD
发明人： YOSHINO RYOZO
IPC分类号： G06K19/07 , H02M7/12 , H02M7/217
摘要： PROBLEM TO BE SOLVED: To provide a rectifying circuit with little power loss. SOLUTION: An AC voltage supplied from an antenna coil ANT is smoothed by a capacitor C via a switching device SW1 and supplied to load L. A control circuit CONT1 outputs control voltage to keep the switching device SW1 in an off state, when the bias across the switching device SW1 is in a back flow state.

3. 发明专利

JP2000099678A IC CARD AND ITS PRODUCTION 失效
公开(公告)号：JP2000099678A
公开(公告)日：2000-04-07
申请号：JP26430798
申请日：1998-09-18
申请人： HITACHI LTD
发明人： SASAKI KOJI , SAITO NAOTO , MIURA HIDEO , OTA HIROYUKI , MATSUMOTO KUNIO , YOSHINO RYOZO
IPC分类号： B42D15/10 , G06K19/077
摘要： PROBLEM TO BE SOLVED: To provide an IC card which is high in reliability even to the bending deformation by applying the etching treatment to the IC card containing an IC chip on its surface excluding the circuit forming surface of the IC chip. SOLUTION: The etching treatment is applied to an IC card containing an IC chip 9 on its surface excluding the circuit forming surface of the chip 9. For instance, the IC card has its thickness of about 0.46 mm and the card base materials 11 are stuck together by means of an adhesive 12 to hold the chip 9 and a circuit layer 13 between them. Both mirror and side faces of the chip 9 are etched and the sharp part of a chipping 7 that is caused when the chip 9 is diced is eliminated. Thus, the bending strength of the chip 9 is increased. As a result, the chip 9 is never easily broken against the deformation of the IC card that is caused by the external force when the card is carried and used, and accordingly the reliability of the card is improved.

4. 发明专利

JPH11203428A NON-CONTACT IC CARD COMMUNICATION SYSTEM AND IC CARD COMMUNICATION METHOD 失效
公开(公告)号：JPH11203428A
公开(公告)日：1999-07-30
申请号：JP423398
申请日：1998-01-12
申请人： DENSO CORP , NIPPON TELEGRAPH & TELEPHONE , HITACHI LTD , TOKIN CORP
发明人： TAKIGUCHI MASAHIRO , TAKAHASHI KIYOSHI , HIRATA TATSUYA , DATE SHIGERU , DOBASHI TOSHINORI , NISHIMURA SHINJI , ISHIDO TOMOAKI , YOSHINO RYOZO , SATO HIROMI , MIURA TORU
IPC分类号： B42D15/10 , G01S13/78 , G06K7/00 , G06K17/00
摘要： PROBLEM TO BE SOLVED: To provide a non-contact IC card communication method capable of identifying each IC card in each sort of anti-collision types prior to the execution of identification for the sort of each IC card based on its anti-collision type even when plural IC cards exist at the time of communication with a reader/writer. SOLUTION: When the reader/writer RW requests the identification of the anti-collision types of respective IC cards A to D, each IC card using each different anti-collision type returns its own anti-collision type as an answer at each different time. When the reader/writer RW receives the answer at each time and requests the identification of an IC card sort in each anti-collision type to be the answer, self-identification data are returned in each IC card using each different anti-collision type and the reader/writer RW receives the answer of the identification data in each IC card and identifies the sort of the IC card.

5. 发明专利

JPH09149636A SWITCHING POWER DEVICE 失效
公开(公告)号：JPH09149636A
公开(公告)日：1997-06-06
申请号：JP30164995
申请日：1995-11-20
申请人： HITACHI LTD
发明人： YOSHINO RYOZO
IPC分类号： H02M7/797 , H02M3/28 , H02M7/12 , H02M7/21
摘要： PROBLEM TO BE SOLVED: To reduce the loss at the time of rectification and current returning operation by turning a MOS transistor for rectification on and turning an inversion-side MOS transistors off at the time of rectification, and turning both MOS transistors on at the time other than this. SOLUTION: MOS transistors M1 -M4 are enhancement MOS transistors which are turned on by high levels and off by low levels, and constitute a full-bridge inverter. And M1 and M4 , and M2 and M3 form pairs, and the primary winding of a transformer T1 is driven through a capacitor C1 inserted for preventing the polarized magnetism of the transformer T1 . Besides, MOS transistors M5 , M6 being devices for synchronous rectification become on the inversion side, and are so controlled that they may be on in periods other than controlled-to-off periods. And rectifying operation is performed in the on-periods, and a current is supplied to a load RL through a smoothing circuit consisting of an inductance L1 and a capacitor C1 , and a return current is caused to flow after the rectifying operation. As the result, it becomes possible to reduce the loss of a power device.

6. 发明专利

JP2501173B2 失效
公开(公告)号：JP2501173B2
公开(公告)日：1996-05-29
申请号：JP14731793
申请日：1993-06-18
申请人： HITACHI LTD
发明人： YOSHINO RYOZO
IPC分类号： H04L7/033 , H04L25/52

7. 发明专利

JPH06243188A DELAY TIME CORRECTING SYSTEM 失效
公开(公告)号：JPH06243188A
公开(公告)日：1994-09-02
申请号：JP2560893
申请日：1993-02-15
申请人： HITACHI LTD , HITACHI COMPUTER ENG
发明人： IWATA HIDENOBU , MATSUMOTO TAKASHI , YOSHINO RYOZO , HIYAMA TORU , KAWASHIMA MASATOSHI
IPC分类号： G06F17/50 , G06F15/60
摘要： PURPOSE:To correct a path delay time after the end of layout and wiring of cells without changing already prepared wiring information at the time of LSI design. CONSTITUTION:Delay time correcting circuits DLY0 to DLY3 resolve the delay time differences brought about by inter-cell wiring length between FFs FF0 to FF3 and FFs FF4 to FF7. If it is necessary to correct the delay times of DLY0 to DLY3 after the end of layout and wiring of cells at the time of LSI design, cells for delay time correction which are preliminarily prepared and have the same size and pin arrangement as circuits DLY0 to DLY3 and are different by delay times are substituted for circuits DLY0 to DLY3 to correct the delay times.

8. 发明专利

JPS63204593A METHOD FOR ACCESSING DYNAMIC MEMORY 失效
公开(公告)号：JPS63204593A
公开(公告)日：1988-08-24
申请号：JP3462887
申请日：1987-02-19
申请人： HITACHI LTD , HITACHI COMPUTER ENG
发明人： YOSHINO RYOZO , OGAWA YOSHIYUKI , MATSUMOTO TAKASHI
IPC分类号： G11C11/406 , G11C11/34
摘要： PURPOSE:To remove a memory access queuing time due to refreshing operation by refreshing the final memory access cycle in a refresh available cycles set up to several times the bank period of a memory access cycle with priority and executing the memory access of other cycles with priority. CONSTITUTION:Dynamic memories 6, 7 are memory banks for respective memory devices and execute memory accessing operation or refreshing operation based on a refresh request signal from AND gates 14, 15 or a memory access request signal from AND gates 12, 13. The refreshing operation is executed with priority in the final memory access cycle out of the refresh available cycles and the memory accessing operation is executed with priority in the other cycles. Banks other than a bank executing the memory accessing operation is capable of executing the refreshing operation. Consequently, the probability of waiting can be reduced even at the time of memory access based on a random address or continuous addresses.

9. 发明专利

JPS62243449A MULTI-STAGE RECOVERY REPEATER 失效
公开(公告)号：JPS62243449A
公开(公告)日：1987-10-23
申请号：JP8590786
申请日：1986-04-16
申请人： HITACHI LTD
发明人： YOSHINO RYOZO
IPC分类号： H04B3/36 , H04L7/033 , H04L25/52
摘要： PURPOSE:To keep the stable communication state and to decrease the system leading time by selecting the time that the data delay time caused by the logic operation at relaying is not coincident with the operation reply time of a PLL. CONSTITUTION:Plural relay stages 10 are connected via a communication line 7 and each relay stage 10 inputs a reception data via the line 7. The reception data receives the band limit by the line 7 and then deformed. A recovery data is inputted to a PLL 5 and a logic delay 6. The delay 6 stores tentatively the recovered data and the data via the delay 6 is subject to re-clocking by using a clock recovered by a PLL 5 in a dats synchronizing section 9 to be transferred to the post-stage and sent to the line 7. The oepration reply time tau of the PLL in use is selected not to be coincident with the logic delay time (t) to suppress the accumulation of jitter to be smaller. Thus, the stable communication state is kept and the leading time of the system is decreased.

10. 发明专利

JPS62166622A DA CONVERTER 失效
公开(公告)号：JPS62166622A
公开(公告)日：1987-07-23
申请号：JP793986
申请日：1986-01-20
申请人： HITACHI LTD , HITACHI COMPUTER ENG
发明人： YOSHINO RYOZO , YAMAZAKI SHOJI , MATSUMOTO TAKASHI
IPC分类号： H03M1/74
摘要： PURPOSE:To form a DA converter and its control logic on the same LSI to reduce the mounting area of the device, by arranging the basic circuit of the DA converter in such a way that the switch of each digit is radially dispersed from the center of the mounting area of the DA converter and reducing the influence of the wiring resistance between each switch. CONSTITUTION:A DA converter is formed by using a basic circuit composed of two collector resistances 1, two transistors 2 and 3, and one current source 4 as a switching circuit. This basic circuit is used as the switching circuit which is turned on or turned off when a digital input signal is higher or lower in level than a reference voltage Vref. When this DA converter is constituted of 63 pieces of switching circuits and those which are simultaneously turned on of the switching circuits are arranged collectively, influences of wiring resistances are apt to be received when switches which are weighted by 2 only are turned on. Therefore, concentration of electric currents is prevented by radially arranging the switching circuits in the order of weighting from the smallest one.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式