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    • 5. 发明专利
    • Liquid crystal display device
    • 液晶显示装置
    • JP2006163426A
    • 2006-06-22
    • JP2005367414
    • 2005-12-21
    • Hitachi Device Eng Co LtdHitachi Ltd日立デバイスエンジニアリング株式会社株式会社日立製作所
    • FUJIOKA TAKAHIROITO SHIGERUGOTO MITSURUNAKAYASU YOZOSAITO YOSHIYUKI
    • G09G3/36G02F1/133G09G3/20
    • PROBLEM TO BE SOLVED: To input a video signal normally by compensating variation in duty ratio of a clock signal inputted to a liquid crystal driving circuit.
      SOLUTION: A clock compensating circuit 200 generates an internal clock signal of 50% in duty ratio based upon a latch clock signal for display data inputted from outside. Display data sent out of a data input/arithmetic circuit 133 are latched by a latch circuit 135 one after another and outputted to the outside through a data output circuit 134. The data input/arithmetic circuit 133 inputs 1st and 2nd data when the clock signal rises and falls, and sends out the 1st data out to one internal bus line and the 2nd data to the other internal bus line in response to an AC-converted signal. A positive-polarity side circuit which supplies a gradation voltage with the positive polarity is connected to the 1st internal bus line and a negative-polarity side circuit which supplies a gradation voltage with the negative polarity is connected to the 2nd bus line.
      COPYRIGHT: (C)2006,JPO&NCIPI
    • 要解决的问题:通过补偿输入到液晶驱动电路的时钟信号的占空比的变化来正常地输入视频信号。 解决方案:时钟补偿电路200基于从外部输入的显示数据的锁存时钟信号,产生占空比为50%的内部时钟信号。 从数据输入/运算电路133发出的显示数据由锁存电路135一个接一个锁存,并通过数据输出电路134输出到外部。数据输入/运算电路133当时钟信号 响应于AC转换信号,将第一数据发送到一条内部总线,将第二数据发送到另一条内部总线。 提供具有正极性的灰度电压的正极侧电路连接到第一内部总线,并且将负极性的灰度电压的负极侧电路连接到第二总线。 版权所有(C)2006,JPO&NCIPI