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1. 发明专利

JPH10250275A MEMORY CARD AND ITS MANUFACTURE 失效
公开(公告)号：JPH10250275A
公开(公告)日：1998-09-22
申请号：JP6498397
申请日：1997-03-18
申请人： HITACHI LTD , HITACHI CHIYOU LSI SYS KK
发明人： MIYAMOTO TOSHIO , SHIODA SHIGEMASA , INOUE KIYOSHI , ARIMA HIDEO , YAMAMOTO KENICHI , HASEBE AKIO , NAKAMURA TOSHIO , MATSUMOTO TETSUO
IPC分类号： B42D15/10 , G06K19/077 , H05K1/18 , H05K3/28
摘要： PROBLEM TO BE SOLVED: To largely improve impact resistance reliability by mounting electronic components in a high density. SOLUTION: This memory card 1 comprises chip components such as TCP memory 4, SOP memory 5, reset IC 7, resistors and capacitors mounted in two-stage on a surface of a printed circuit board 2 fixed by connecting a connector provided at one side to a memory case MK, and a microcomputer 10 and a gate array 11 COB outed on a rear surface. A package surface of the microcomputer 10 and the array 11 is adhered to an inner surface of the case MK opposed to its package surface via a double-sided tape 12, and the board 2 is effectively fixed.

2. 发明专利

JP2000235062A BURN-IN TEST DEVICE, AND MANUFACTURE OF SEMICONDUCTOR DEVICE USING THE DEVICE 失效
公开(公告)号：JP2000235062A
公开(公告)日：2000-08-29
申请号：JP3703499
申请日：1999-02-16
申请人： HITACHI LTD
发明人： YAMAMOTO KENICHI , ARIMA HIDEO , HASEBE AKIO , MORINAGA KENICHIRO , ANJO ICHIRO
IPC分类号： H01L21/60 , G01R1/073 , G01R31/26 , H01L21/66
摘要： PROBLEM TO BE SOLVED: To stably secure a contact resistance between a pad (electrode) of a socket substrate and a bump electrode in a burn-in test for a semiconductor device of which the external connection terminal is composed of the bump electrode. SOLUTION: Plural pads 4 formed integrally with a wiring 3 are formed in a main face of a socket substrate mounted on a socket of a burn-in test device, and plural protrusions 5 are provided on a surface of each pad 4. A height and a protrusion-to-protrusion distance of the protrusion 5 is specified not to bring a lower end of a soldering bump connected to the protrusion 5 into contact with the surface of the pad 4.

3. 发明专利

JPH10233399A MANUFACTURE OF SEMICONDUCTOR INTEGRATED-CIRCUIT DEVICE AND SEMICONDUCTOR INTEGRATED-CIRCUIT DEVICE 失效
公开(公告)号：JPH10233399A
公开(公告)日：1998-09-02
申请号：JP3650597
申请日：1997-02-20
申请人： HITACHI LTD
发明人： YAMAMOTO KENICHI , YOSHIDA TORU , ARIMA HIDEO , HARUTA AKIRA , HASEBE AKIO
IPC分类号： H01L21/60 , H01L21/321
摘要： PROBLEM TO BE SOLVED: To make it possible to enhance the connecting strength of a solder bump electrode by a method wherein a bump substrate conductor layer which comes into contact with the solder bump electrode is formed of a conductor layer which contains Pb. SOLUTION: An opening part 4 by which a part of a derivation electrode 3 is exposed is formed in a part of a lower-layer surface protective film 4a, and a bump electrode 7 is formed on an exposed region via respective bump substrate metal layers 6a, 6b. The bump substrate metal layer 6a is composed of Ti, and it has a function or the like which enhances the bonding property of the derivation electrode 3 to the bump electrode 7. The upper-layer substrate metal layer 6b is composed of a conductor layer composed of, e.g. Pd and of an alloy layer which is formed in such a way that Pd is diffused to the lower part of the bump electrode 7 and which contains Pd. The bump substrate metal layer 5b prevents the oxidation on the surface of the lower-layer bump substrate metal layer 6a which is composed of Ti or the like, it is diffused to the lower part of the bump electrode 7, and it has an action to enhance the connecting strength of the bump electrode 7.

4. 发明专利

JPH09219421A MANUFACTURE OF SEMICONDUCTOR ELECTRONIC COMPONENT AND WAFER 失效
公开(公告)号：JPH09219421A
公开(公告)日：1997-08-19
申请号：JP2643496
申请日：1996-02-14
申请人： HITACHI LTD
发明人： HASEBE AKIO , MIYAMOTO TOSHIO , ARIMA HIDEO , YAMAMOTO KENICHI , HARUTA AKIRA , TSUBOSAKI KUNIHIRO , MORINAGA KENICHIRO
IPC分类号： H01L21/60 , H01L21/301 , H01L21/321 , H01L23/12
摘要： PROBLEM TO BE SOLVED: To shorten a TAT and reduce the cost of the TAT by a method wherein stud bump electrodes made of solder are respectively formed again on the point parts of first-layer electrodes, second-layer electrodes of a shape uniformized by reflowing the stud bump electrodes are formed and a wafer is diced into chips to obtain chip-sized packages. SOLUTION: Solder stud bump electrodes 2 formed on a wafer 1 are subjected to leveling, electrodes 2a are formed and organic materials 3 and 4 are respectively provided on both surfaces of the surface and rear of the wafer 1 formed with the electrodes 2a making to interpose the wafer 1 between them by molding, coating or the like. A surface treatment, such as a polishing treatment, of these bump electrodes 2a and first electrodes 2b is performed, which respectively have a bump electrode upper part which is new and is easily wetted, are formed. Solder stud bump electrodes 2c are respectively formed again on the point parts of the electrodes 2b, the wafer 1 is reflowed to form second electrodes 2d obtainable by making even the electrodes 2c and the wafer 1 is diced into chips to obtain chip-sized packages.

5. 发明专利

JPH08274243A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH08274243A
公开(公告)日：1996-10-18
申请号：JP6397596
申请日：1996-03-21
申请人： HITACHI LTD
发明人： MURAKAMI HAJIME , TSUBOSAKI KUNIHIRO , ICHITANI MASAHIRO , NISHI KUNIHIKO , ANJO ICHIRO , NISHIMURA ASAO , KITANO MAKOTO , YAGUCHI AKIHIRO , KAWAI SUEO , OGATA MASAJI , EGUCHI KUNIYUKI , KOKADO HIROYOSHI , SEGAWA MASANORI , HOZOJI HIROYUKI , YOKOYAMA TAKASHI , KANESHIRO TOKUYUKI , KANEDA AIZO , SAEKI JUNICHI , NAKAMURA SHOZO , HASEBE AKIO , KIKUCHI HIROSHI , YOSHIDA ISAMU
IPC分类号： H01L21/60 , H01L21/312 , H01L23/50
摘要： PURPOSE: To shield α-ray to the whole part of a circuit forming region, and reduce the stray capacity between a semiconductor chip and inner leads. CONSTITUTION: A plurality of inner leads 3A are bonded on the circuit forming surface of a semiconductor chip 1 by using adhesive agent 7, interposing insulator 4B for electric insulation from the semiconductor chip. The inner leads 3A are electrically connected with the semiconductor chip 1 through bonding wires 5. These are sealed with resin. In this semiconductor device, a passivation film covering the circuit forming surface has a polyimide film 8 for shielding α-ray. An insulating film is partially formed in the part where at least the tips of the inner leads and/or suspension leads are bonded to the semiconductor chip. α-ray to the whole part of the circuit forming region can be shielded by the polyimide film 8 for shielding α-ray, and the semiconductor chip can be bonded and fixed by the insulating film.

6. 发明专利

JPH08241951A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH08241951A
公开(公告)日：1996-09-17
申请号：JP6397796
申请日：1996-03-21
申请人： HITACHI LTD
发明人： MURAKAMI HAJIME , TSUBOSAKI KUNIHIRO , ICHITANI MASAHIRO , NISHI KUNIHIKO , ANJO ICHIRO , NISHIMURA ASAO , KITANO MAKOTO , YAGUCHI AKIHIRO , KAWAI SUEO , OGATA MASAJI , EGUCHI KUNIYUKI , KOKADO HIROYOSHI , SEGAWA MASANORI , HOZOJI HIROYUKI , YOKOYAMA TAKASHI , KANESHIRO TOKUYUKI , KANEDA AIZO , SAEKI JUNICHI , NAKAMURA SHOZO , HASEBE AKIO , KIKUCHI HIROSHI , YOSHIDA ISAMU
IPC分类号： H01L21/60 , H01L23/50
摘要： PURPOSE: To obtain a semiconductor device which enhances a signal transmission rate and which reduces an electric noise by a method wherein an inner lead is formed to be a stepped structure in which the interval between a semiconductor chip on the side of an outer lead from a part bonded to an insulating film and the inner lead becomes wider than the interval between the semiconductor chip and the part bonded to the insulating film. CONSTITUTION: Twenty inner leads 3A1 for signals and two common inner leads 3A2 are installed at a lead frame 3. The inner leads 3A1 are formed to be a stepped structure in which the interval between parts on the side of outer leads 3B from parts bonded to insulating films 4 of the inner leads 3A1 for signals and a semiconductor chip 1 is made wider than the interval between the parts bonded to the insulating films 4 and the semiconductor chip 1. Thereby, since a stray capacitance between the semiconductor chip 1 and the inner leads 3A1 for signals becomes small as compared with that in conventional cases, it is possible to obtain a semiconductor device which enhances a signal transmission rate and which reduces an electric noise.

7. 发明专利

JPH08241937A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH08241937A
公开(公告)日：1996-09-17
申请号：JP6397696
申请日：1996-03-21
申请人： HITACHI LTD
发明人： MURAKAMI HAJIME , TSUBOSAKI KUNIHIRO , ICHITANI MASAHIRO , NISHI KUNIHIKO , ANJO ICHIRO , NISHIMURA ASAO , KITANO MAKOTO , YAGUCHI AKIHIRO , KAWAI SUEO , OGATA MASAJI , EGUCHI KUNIYUKI , KOKADO HIROYOSHI , SEGAWA MASANORI , HOZOJI HIROYUKI , YOKOYAMA TAKASHI , KANESHIRO TOKUYUKI , KANEDA AIZO , SAEKI JUNICHI , NAKAMURA SHOZO , HASEBE AKIO , KIKUCHI HIROSHI , YOSHIDA ISAMU
IPC分类号： H01L23/28 , H01L21/60 , H01L23/50
摘要： PURPOSE: To obtain a semiconductor device which enhances a signal transmission rate by a stray capacitance between a semiconductor chip and a lead and which reduces an electric noise by a method wherein the rear on the opposite side of the circuit formation face of the semiconductor chip is exposed so as to perform a resin sealing operation. CONSTITUTION: In a 16 MDRAM, a plurality of inner leads 3A are bonded, by an adhesive 7, to a semiconductor chip 1 via an insulating film 4 which electrically insulates the semiconductor chip 1, and the inner leads 3A and the semiconductor chip 1 are connected electrically by bonding wires 5 so as to be sealed with a resin. After they have been sealed with the resin, a lower molding resin at the semiconductor chip 1 for a package 2 is removed, and the face on the opposite side of the main face of the semiconductor chip 1 is exposed. Thereby, since the thermal resistance of the semiconductor device is reduced, the whole thermal resistance is reduced by its portion. Thereby, it is possible to prevent a crack from being generated due to a heat cycle from the corner part of the semiconductor chip 1.

8. 发明专利

JPH07244218A DISPLAY DEVICE WITH ILLUMINATION 失效
公开(公告)号：JPH07244218A
公开(公告)日：1995-09-19
申请号：JP3556794
申请日：1994-03-07
申请人： HITACHI LTD
发明人： ITO TERUHIKO , NAKAMURA SHOZO , ISHIDA TOSHIHARU , HASEBE AKIO , SERIZAWA KOJI
IPC分类号： G02B6/00 , G02F1/1335 , G02F1/13357
摘要： PURPOSE:To reduce the thickness, size and weight of an illumination device of a display device with illumination by installing a light source section outside, using optical fibers and irradiating these optical fibers with light. CONSTITUTION:The optical fibers 1 are inserted a length from several millimeters to several centimeters into the arbitrary side face of a light transmission plate 2 (transparent substrate which is evaporated with aluminum, etc., by evaporation on its rear surface and is subjected to a surface roughening treatment, etc.) and are irradiated with light. The light cast thereon uniformly glows the surface of the light transmission plate 2 by reflection on the rear surface and the inside of the light transmission plate 2. In such a case, since the diameters of the optical fibers 1 are extremely thin, the light transmission plate 2 to be inserted with these fibers can be made extremely thin as well. Replacement of the light transmission plate 2 and the optical fiber unit part is easy in case of the defect of either thereof if both the previously formed mountable and dismountable. Installation of the light source outside is possible by extending the optical fiber 1 long. The illumination device can be formed thin and the influence of heat on an object to be illuminated is relieved by installing the light source outside.

9. 发明专利

JPH0774210A METHOD AND STRUCTURE FOR CONNECTION OF CONDUCTOR 失效
公开(公告)号：JPH0774210A
公开(公告)日：1995-03-17
申请号：JP169694
申请日：1994-01-12
申请人： HITACHI LTD
发明人： OKUNAKA MASAAKI , UEDA KIE , KISHIMOTO MUNEHISA , NAKAMURA SHOZO , HASEBE AKIO
IPC分类号： H01L21/60 , H05K3/32
摘要： PURPOSE:To connect terminal at ultra-fine pitch and to perform a high-density surface mounting operation by a method wherein two conductors are connected by conductive material, the nonconductive material is interposed in a part other than the conductors and the conductive material and the nonconductive material contain a double conjugate polymer in a main skeleton. CONSTITUTION:A film 81 composed mainly of a conductive polymer provided with a conjugated double linkage in a main chain skeleton is formed on a circuit board 1. Light is shone at parts other than the connecting terminals from the surface side of the circuit board 1 via a photomask 9, only the parts corresponding to the connecting terminals 12 are left as conductor parts 810, and the conductive polymer in other parts is used selectively as high-resistance parts 820. After that, the conductive parts 810 and connecting terminals 22 for an LSI chip 2 are aligned, they are thermocompression-bonded, and the circuit board 1 is connected to the LSI chip 2. In this case, the insulation between the the terminals 12 is kept by the high-resistance parts 820. Thereby, the terminals can be connected at ultra-fine pitch, simply and at low costs.

10. 发明专利

JPH0737931A TAPE CARRIER TYPE SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH0737931A
公开(公告)日：1995-02-07
申请号：JP17674593
申请日：1993-07-16
申请人： HITACHI LTD
发明人： MIYANO ICHIRO , NAKAMURA SHOZO , SERIZAWA KOJI , HASEBE AKIO , ISHIDA TOSHIHARU , MIURA KAZUMA
IPC分类号： H01L21/60 , H01L23/50
摘要： PURPOSE:To make it possible to reduce cost and simplify wiring work by connecting different kinds of tape carriers to electrodes having the same function, which respectively constitute common wiring portions, thereby permitting common wiring portions of LSI where a plurality of electrodes having the same function can exist at the central part only by the one surface of the tape carriers. CONSTITUTION:Different kinds of tape carriers 7 constituting common wiring portions 3 are respectively connected to a plurality of electrodes having the same function which exist on LSI4. For example, partial common wiring tape carriers 7 are used at the common wiring portions 3 when electrodes 22 are arranged on a straight line in the central part of the surface of LSI4 and a 16-Mbit DRAM having ground electrodes and power supply electrodes at plural side is modified to a tape carrier type semiconductor device. This common wiring tape carrier 7 is made as thin as possible so as to prohibit the occurrence of configurational interference with the tape carriers 5 not connected to a plurality of electrodes requiring common wiring on the LSI chip 4.

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