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1. 发明专利

JPH09190381A VIRTUAL COMPUTER SYSTEM OF MULTI-PROCESSOR CONSTITUTION 失效
公开(公告)号：JPH09190381A
公开(公告)日：1997-07-22
申请号：JP334796
申请日：1996-01-11
申请人： HITACHI LTD , HITACHI COMPUTER ENG
发明人： OMINATO TAKESHI , SHINOHARA KOICHI , AOKI KATSUICHI
IPC分类号： G06F15/16 , G06F9/46 , G06F12/10 , G06F15/177
摘要： PROBLEM TO BE SOLVED: To reduce the overhead of an XPTLB processing and to improve the processing performance of a virtual computer by giving dispatch information on an instruction processor(IP) corresponding to the virtual computer and providing a specified BIM latch group in a hardware area (HSA). SOLUTION: Information processors IP0-IPn dispatched by the virtual computer, CPU controlling the whole and a main storage device 102 which is shared are provided. Dispatch information on IP corresponding to the virtual computer are given in HAS, and the BIM latch group setting dispatch information of ID and corresponding to IP is provided in CU. When CU receives the purge processing request of an address conversion buffer, dispatch information on IP is received in the BIM latch group and an information processor which is to issue the purge processing request of the address conversion buffer is decided with the information and information on the virtual computer issuing the purge processing request of the address conversion buffer.

2. 发明专利

JP2548602B2 失效
公开(公告)号：JP2548602B2
公开(公告)日：1996-10-30
申请号：JP8819088
申请日：1988-04-12
申请人： HITACHI LTD
发明人： OGIWARA SATORU , NUMATA SHUNICHI , MYAZAKI KUNIO , YOKOYAMA TAKASHI , TAKAHASHI KEN , SOGA TASAO , YAMADA KAZUJI , SHINOHARA KOICHI , SUZUKI HIDEO
IPC分类号： H01L21/60 , H01L23/12 , H01L23/498 , H01L23/52 , H01L23/64 , H05K1/02 , H05K1/03 , H05K1/14 , H05K3/34 , H05K3/36

3. 发明专利

JPH05175353A SEMICONDUCTOR CHIP CARRIER AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH05175353A
公开(公告)日：1993-07-13
申请号：JP34271891
申请日：1991-12-25
申请人： HITACHI LTD
发明人： TAKAHASHI MASAAKI , ABE YOICHI , KATO AKIRA , OGIWARA SATORU , SHINOHARA KOICHI
IPC分类号： H01G4/33 , H01G4/06 , H01L21/768 , H01L21/822 , H01L23/12 , H01L25/00 , H01L27/04
摘要： PURPOSE:To reduce erroneous operations of a semiconductor device by coating polyimide resin, etc., on the surface of a ceramic chip carrier, flattening it, forming a dielectric film on the lower electrode surface through an oxide film, and then preventing diffusion of the electrode metal to the dielectric film by heat treatment. CONSTITUTION:A chip carrier has a through-hole conductor 2 in itself and the through-hole conductor 2 connects a semiconductor chip 1 to a module substrate 13. A flattening film 5 is formed on one surface of the chip carrier to flatten the ceramic surface and a matching layer 4 for compensating misalignment of the through-hole conductor 2 is formed. A capacitor for eliminating a power supply noise is constituted by forming an insulator 7 and a dielectric film 8 on a lower electrode 6 performing heat treatment, depositing an upper electrode 9 and then forming a protective film 10 on the surface. A through-hole conductor is located at one part of the insulator 7, the dielectric film 8, and the protective film 10 for making connection to the semiconductor chip.

4. 发明专利

JPH0451073B2 失效
公开(公告)号：JPH0451073B2
公开(公告)日：1992-08-18
申请号：JP1182884
申请日：1984-01-27
申请人： HITACHI LTD
发明人： KURIHARA YASUTOSHI , MINAGAWA TADASHI , YATSUNO KOMEI , HIROSE KAZUHIRO , SHINOHARA KOICHI , YASUDA TOMIRO , SAWAHATA MAMORU , KUSHIMA TADAO
IPC分类号： H01L21/52 , H01L21/58 , H01L33/30 , H01L33/40 , H01L33/62 , H01L33/64 , H01S5/00 , H01S5/02 , H01S5/022
摘要： PURPOSE:To obtain the titled device of stable performance to be manufactured with good yield by a method wherein a section of solder adhesion in such a manner that the side surface of a semiconductor substrate is almost even with that of an intermediate member is provided on the intermediate member, and a region imparted with the wetting property to solder is provided in the neighborhood of the adhesion part of the side surface of the intermediate member. CONSTITUTION:The semiconductor laser substrate 2 is die-bonded on the intermediate member 3 with Au-Sn solder, and the main surface of the substrate 2 is provided with an electrode layer whose uppermost layer is an Au layer. Besides, the intermediate member 3 is adhered on a supporting member 1 with Pb-Sn series solder. A conduction path constituent member 5 is connected to the other conductive member from the electrode layer in the upper side of the substrate 2, and the other electrode in the lower side of the substrate 2 is connected to the other conductive member via copper relay plate 6. The intermediate member 3 has a metallized layer 33 on its side surface 31 and is imparted with the wetting property to solder. This enables the solder to flow out of the layer 33, producing no swelling at the end part because of sagging. Therefore, the cut-off of a laser light path or the short circuit of a P-N junction does not occur.

5. 发明专利

JPH03104261A CARRIER BOARD WITH BUILT-IN CAPACITOR 失效
公开(公告)号：JPH03104261A
公开(公告)日：1991-05-01
申请号：JP24082689
申请日：1989-09-19
申请人： HITACHI LTD
发明人： SUZUKI HIDEO , SHINOHARA KOICHI , OGIWARA SATORU
IPC分类号： H01G4/12 , H01L23/12 , H01L25/00
摘要： PURPOSE:To obtain a carrier substrate which is built in with a capacitor capable of damaging no signal propagation velocity by providing an intermediate layer formed on a fuses substance layer where dielectric and insulation components are partly diffused in the interior of a ceramic layer having a melting point or a softening point between a dielectric layer and an insulation layer whose melting point or softening point is lower than that of the ceramic layer. CONSTITUTION:A carrier board 1 is provided with capacitor 3 laid out in an insulation layer by way of an intermediate layer 5. The capacitor 3 comprises a dielectric 4 and its electrodes 6. The material of the intermediate layer 5 should comprise preferably a ceramic material which has a melting point or softening point of 1600 deg.C and over, which is higher than that of either the insulation material 2 or the dielectric material 4. A plurality of power supply conductors 7 are penetrated into the insulation material 2 through the position where the capacitor 3 is laid out. The conductor 7 is placed into direct contact with the dielectric 4 of the capacitor 3 and connected with the electrodes 6 as well. A signal conductor, kept off from the layout position of the capacitor 3, is installed the insulation material 2. As a result, this construction prevents the reaction of the insulation layer imposed on the dielectric layer and maintains the composition of the dielectric alone. Therefore, it is possible to produce the carrier board capable of preventing the deterioration of dielectric characteristic, thereby maintaining the high speed performance of signal propagation velocity.

6. 发明专利

JPH0249265B2 失效
公开(公告)号：JPH0249265B2
公开(公告)日：1990-10-29
申请号：JP15560784
申请日：1984-07-27
申请人： HITACHI LTD
发明人： NAGAYAMA KOSEI , USHIFUSA NOBUYUKI , SHINOHARA KOICHI , OGIWARA SATORU
IPC分类号： C04B35/18 , H01B3/12 , H05K1/03

7. 发明专利

JPH02168662A CHIP CARRIER 失效
公开(公告)号：JPH02168662A
公开(公告)日：1990-06-28
申请号：JP19410489
申请日：1989-07-28
申请人： HITACHI LTD
发明人： NAKANISHI KEIICHIRO , YAMADA MINORU , YAMAMOTO MASAKAZU , OGIWARA SATORU , SHINOHARA KOICHI , SUZUKI HIDEO
IPC分类号： H01L23/12 , H01L23/498 , H01L23/64 , H01L25/00
摘要： PURPOSE:To enable signals to be taken out of a multiplicity of terminal pads and to enhance noise decreasing effect by separating a signal through hole arranging region from a power supply through hole arranging region within a chip carrier and arranging a material having high dielectric constant only in the power supply through hole arranging region. CONSTITUTION:Within a small substrate 3, a signal through hole arranging region 10 in which signal through holes 2a are to be arranged is provided on the periphery and a power supply through hole arranging region 11 in which power supply through holes 2b and 2b' are to be arranged is provided at the center. Further, a sheet-type material having high dielectric constant 3 is arranged only at the center of the substrate. Thus, the signal through hole arranging region is separated from the power supply through hole arranging region within a chip carrier and a coupling capacitor is provided only in the power supply through hole region. According to such arrangement, signals can be propagated with low noise and at a high speed.

8. 发明专利

JPH02148155A INPUT/OUTPUT PROCESSING SYSTEM 失效
公开(公告)号：JPH02148155A
公开(公告)日：1990-06-07
申请号：JP30195188
申请日：1988-11-29
申请人： HITACHI LTD
发明人： SHINOHARA KOICHI , YAMAGATA MAKOTO
IPC分类号： G06F13/12 , G06F9/46
摘要： PURPOSE:To efficiently operate a virtual computer system by directly executing an input/output (I/O) instruction on a virtual computer without taking it into consideration whether channel command word (CCW) executed on the virtual computer is related to the constitution of a real machine system or not. CONSTITUTION:A data processor to process the I/O instruction consists of an I/O privileged mode latch 1, a CCW register 2, a decoder 3, a discriminant circuit 4, an inhibit circuit 5, an I/O interrupt circuit 6, a bus selecting circuit 7, a multiplexer 8, and channels 9. The I/O instruction processing is directly executed on the virtual computer without taking it into consideration whether CCW which cannot be executed on the virtual computer is included or not. Thus, the virtual computer system is efficiently operated.

9. 发明专利

JPH01260846A SEMICONDUCTOR MOUNTING MODULE 失效
公开(公告)号：JPH01260846A
公开(公告)日：1989-10-18
申请号：JP8819088
申请日：1988-04-12
申请人： HITACHI LTD
发明人： OGIWARA SATORU , NUMATA SHUNICHI , MIYAZAKI KUNIO , YOKOYAMA TAKASHI , TAKAHASHI KEN , SOGA TASAO , YAMADA KAZUJI , SHINOHARA KOICHI , SUZUKI HIDEO
IPC分类号： H01L21/60 , H01L23/12 , H01L23/498 , H01L23/52 , H01L23/64 , H05K1/02 , H05K1/03 , H05K1/14 , H05K3/34 , H05K3/36
摘要： PURPOSE:To dissipate heat generated in a semiconductor element having a large heating value efficiently, to make it possible to perform high density mounting and to expedite a signal propagating speed, by absorbing difference in thermal expansion between the element and an organic wiring plate, transmitting the signal from the element without processing the signal, and supporting the element by the connection of flip-chips. CONSTITUTION:A substrate 11 serves the function of an intermediate material for mounting a semiconductor element 12 on a wiring board 15. A composite material has a thermal expansion coefficient of 30-50X10 / deg.C that is approximate to the thermal expansion coefficient of the semiconductor element and makes the delay in electric signal less. Said composite material is used to mount the semiconductor element directly. The substrate has wirings between a through hole conductor and a layer. The terminals of the semiconductor element are soldered on the surface of the substrate with solder 16. Terminals which are electrically connected from the terminals of the semiconductor element by way of through holes are provided on the rear surface of the substrate. A heat conductive ceramic plate 13 is bonded to the rear surface of the semiconductor element. The terminals which electrically connect the ceramic carrier substrate and an organic wiring plate alleviate the difference in thermal expansion between the carrier having the thermal expansion coefficient of 30-50X10 / deg.C and the organic wiring plate having the thermal expansion coefficient of about 150X10 / deg.C. Thus, the electical connection is provided highly reliably.

10. 发明专利

JPS63266704A CONDUCTOR MATERIAL FOR MULTILAYER PLATE 失效
公开(公告)号：JPS63266704A
公开(公告)日：1988-11-02
申请号：JP9984887
申请日：1987-04-24
申请人： HITACHI LTD
发明人： USHIFUSA NOBUYUKI , NAGAYAMA SARANARI , SAKAMOTO KOZO , SHINOHARA KOICHI , OGIWARA SATORU
IPC分类号： H01B1/16 , H05K3/46
摘要： PURPOSE:To obtain a conductor material which is chemically stable and has low resistance by adding tungsten or molybdenum as a main ingredient and group IIIa metal or group IIIa metal oxide as an auxiliary agent into the conductor material. CONSTITUTION:One or more species of tungsten or molybdenum as a main ingredient and group IIIa metal or group IIIa metal oxide as an auxiliary agent are added into a conductor material. Hence, tungsten or molybdenum can be densely sintered. The amount of the group IIIa metal or the group IIIa metal oxide added in this process is made 0.1 to 30 volume % of tungsten or molybdenum when it is converted into oxide. Resistance of the conductor material can be hence lowered. Further, a particle diameter of the group IIIa metal or the group IIIa metal oxide is made smaller than that of tungsten or molybdenum. Accordingly the group IIIa metal or the group IIIa metal oxide can be dispersed sufficiently into powder of tungsten or molybdenum.

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