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1. 发明专利

JPH04364365A SMALL POWER UNIT 失效
公开(公告)号：JPH04364365A
公开(公告)日：1992-12-16
申请号：JP13880891
申请日：1991-06-11
申请人： HITACHI LTD
发明人： KANOUDA TAMAHIKO , SATO MASAYOSHI , ONDA KENICHI , HAGIWARA SHUYA , MIZOGUCHI TETSURO , KONO NAOFUMI , FUJIKAWA KATSUMI , KINO JIRO
IPC分类号： H01F19/00 , H02M3/28 , H02M7/06 , H02M7/12
摘要： PURPOSE:To provide a power source which is suitable in promoting the miniaturization and the thinning of OA equipment and information equipment. CONSTITUTION:The thicknesses of a transformer and a smoothing reactor are made below 7mm by raising the switching frequency to 1MHz and constituting the transformer and the smoothing reactor, using a thin plate coil and a thin core. Moreover, for parts saving, a power switching element for controlling the output power, its drive circuit, a control circuit, and a protective circuit are integrated an block in a power IC which has breakdown strength of 250V or more. To materialize high power conversion efficiency, the on resistance of the power switching element is made 0.8OMEGA or less. Accordingly, the volume of the power unit can be made 10mm in thickness and 80mm in length, and the miniaturization and thinning of OA equipment and information equipment can be realized.

2. 发明专利

JPH02270367A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JPH02270367A
公开(公告)日：1990-11-05
申请号：JP9057989
申请日：1989-04-12
申请人： HITACHI LTD
发明人： MIZOGUCHI TETSURO , MORI MUTSUHIRO
IPC分类号： H01L21/762 , H01L21/76 , H01L21/8234 , H01L27/088 , H01L29/78
摘要： PURPOSE:To obtain an integrated circuit device improved in degree of integration and provided with an inverter circuit capable of dealing with a large current by a method wherein a dielectric isolating substrate provided with a single crystal region which penetrates through it is used, and a high power element is formed on the single crystal region. CONSTITUTION:In a semiconductor integrated circuit device formed on a dielectric isolation substrate composed of a first single crystal region 5 penetrating through a substrate 7, a second single crystal region 10 exposed only at the first primary face of the substrate 7 and covered with an insulating film 9 except its exposed part and a polycrystalline region serving as the substrate 7, high power elements 1 and 2 are formed on the single crystal regions 5 and 10 respectively. For instance, an N-MOSFET 1 serving as an upper arm element of an inverter circuit is formed in the single crystal region 5 which penetrates through the substrate 7, and a drain electrode is formed on the rear side of the substrate 7. An N-MOSFET 2 serving as a lower arm is formed inside the single crystal region 10 whose bottom and side face are surrounded with an SiO2 film 9 through the same way as a conventional technique.

3. 发明专利

JPH09213933A SEMICONDUCTOR DEVICE AND POWER CONVERTER USING IT 失效
公开(公告)号：JPH09213933A
公开(公告)日：1997-08-15
申请号：JP2134196
申请日：1996-02-07
申请人： HITACHI LTD
发明人： NUNOMURA KUNIHIRO , KIMURA ARATA , MIZOGUCHI TETSURO , ONOSE HIDEKATSU , MATSUYOSHI SATOSHI
IPC分类号： H01L29/744 , H01L29/74 , H02M1/00 , H02M7/06 , H02M7/12 , H02M7/48
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device, in which cut-off resistance is increased, and to provide a small-sized power converter, which uses the semiconductor device and has large capacitance and cost of which is reduced. SOLUTION: Trenches are dug so as to divide an n-type emitter layer 8 on a unit GTO(a gate turn-off thyristor) into two, and an insulating layer 61 is entered. Since the insulating layer 61 is placed in the final concentrated region of a main current at the time of a turn-off, the final concentrated region of the main current at the time of the turn-off is divided into two, and a temperature rise resulting in a breakdown is prevented. A cathode electrode 2 is crossed over the insulating layer 61, and brought into contact with the n-type emitter layer 8 with low resistance. Accordingly, the cut-off resistance of the GTO can be in creased by the high cut-off resistance of the unit GTO, and peripheral circuits can be reduced without lowering the capacitance of a power converter.

4. 发明专利

JPH07142713A SEMICONDUCTOR DEVICE AND ITS PRODUCTION 失效
公开(公告)号：JPH07142713A
公开(公告)日：1995-06-02
申请号：JP16087493
申请日：1993-06-30
申请人： HITACHI LTD
发明人： MIZOGUCHI TETSURO , KOBAYASHI HIDEO , KAWAKAMI SUMIO , YAO TSUTOMU
IPC分类号： H01L29/78 , H01L29/06 , H01L29/40 , H01L29/739 , H01L29/861
摘要： PURPOSE:To reduce the expansion of space between equivalent electric field limiting rings and prevent the drop in breakdown strength by making a construction in a manner that there will exist a position to minimize the space to the utmost between adjoining electric field limiting rings, out of the main surface part of the semiconductor substrate. CONSTITUTION:A circular p type layer 16 formed on the bottom of a circular groove 12a functions as an electric field to enhance the expansion of a depletion layer which is to be formed when a p-n joint between an n type layer 14 and a p type layer 15 is reverse-biased. Since the layer 16 is formed on the bottom of the groove 12a, the part in which the rings 16 are most close to each other is located away from the main surface 12 of the other. Therefore, even if any positive charge would be generated due to moving ions in the outer part of a semiconductor substrate 1 through a high-temperature bias test, the carrier density of the layer 14 in the part where the rings 16 are most close to each other is given no influence and the breakdown strength hardly drops.

5. 发明专利

JPH0722607A GATE TURN-OFF THYRISTOR AND ITS MANUFACTURE 失效
公开(公告)号：JPH0722607A
公开(公告)日：1995-01-24
申请号：JP14327793
申请日：1993-06-15
申请人： HITACHI LTD
发明人： MIZOGUCHI TETSURO , KAWAKAMI SUMIO , KOBAYASHI HIDEO
IPC分类号： H01L29/744 , H01L29/74
摘要： PURPOSE:To enhance gate breakdown strength and an anode maximum blocking voltage without raising an on-voltage by a method wherein impurity concentration of an n-type layer separated from a p base layer and an n emitter layer is lowered to have concentration the same as or lower than an n layer. CONSTITUTION:A Si nitride film 15 is formed in an n-type Si substrate 7 and a groove 4 is formed and a Si oxide film 10 is formed within the groove 4 and a Si oxide film 11 is formed by etching. Next, the Si oxide film 11 is used as a mask to diffuse p-type impurity to form a p base layer 1. A diffusion depth of the p base layer 1 is regulated to form an n layer 6 having lower concentration. Next, a p layer 5 having higher concentration is formed near an exposure part of a p base layer surface, and a Si oxide film is again formed to remove a Si nitride film 15 and an n emitter layer 2 is further formed by an impurity diffusion. Thus, breakdown strength between the gate and cathode in a connection part J3 is enhanced, and also concentration of the p base layer 1 in a connection part J2 is enhanced, so that an anode maximum blocking voltage can be enhanced.

6. 发明专利

JPH02135755A DIELECTRIC ISOLATED SUBSTRATE AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH02135755A
公开(公告)日：1990-05-24
申请号：JP28895588
申请日：1988-11-17
申请人： HITACHI LTD
发明人： MIZOGUCHI TETSURO , SHIRASAWA TOSHIKATSU , SEKINE SHIGEKI , ISHIKAWA TORU
IPC分类号： H01L21/762 , H01L21/76 , H01L27/088 , H01L29/739 , H01L29/78
摘要： PURPOSE:To reduce the thickness of an island while maintaining the pressure resistance of a high pressure resistance element and to improve integration of a circuit by forming a supporting substrate material in a multilayer structure of a high concentration impurity region and a low concentration impurity region, and forming a layer in contact with an oxide film to become an insulating film in the low concentration impurity region. CONSTITUTION:When an IGBT is formed in a second n-type single crystalline region 1 at the first main face 8 side of a dielectric isolated substrate, an N-type low concentration grown layer 6 is diffused with impurity from a P type high concentration grown layer 7 during a heat treating step to become a P-type transition region. Impurity such as boron, etc., is diffused from the layer 7 into an island through a high concentration impurity buried layer 4 at the time of high temperature heat treatment for a long period of time at the time of formation of an element, but it can be prevented by the layer 6 to become the P-type transition region. Thus, the thickness of an I-type layer in an island necessary for pressure resistance can be reduced to approx. 80% of that of a conventional one, and the whole chip area of a semiconductor integrated circuit can be reduced to 90%.

7. 发明专利

JPS6445179A MEMORY CELL 失效
公开(公告)号：JPS6445179A
公开(公告)日：1989-02-17
申请号：JP20173187
申请日：1987-08-14
申请人： HITACHI LTD
发明人： MIZOGUCHI TETSURO
IPC分类号： G11C11/44 , H01L27/10 , H01L39/22
摘要： PURPOSE:To contrive an increase in the degree of integration of a closed circuit by a method wherein a memory cell is provided with an inductance using a superconductive material, three-terminal type superconducting switching elements and the closed circuit constituted of a superconductive wiring material. CONSTITUTION:Three-terminal type superconducting switching elements 2, superconducting coils 1 and a closed circuit constituted of a superconductive material are used for a memory cell. That is, the elements 2 are turned-ON and a state that a circulating current is made to flow in the closed circuit brought into a superconductive state is assumed to be a storage state of 1 and a state that the current is not made to flow is assumed to be a storage state of 0. Accordingly, so long as an action is not given to the closed circuit from the exterior, this state is sustained semipermanently. Therefore, information is stored statically. Moreover, by controlling the circulating current by a minority of pieces of the elements 2 in the closed circuit, a writing and a readout can be performed. Thereby, the totaled occupation area of all the elements including the coils 1 can be reduced and the improvement of the integration degree of the closed circuit can be contrived.

8. 发明专利

JPH0936348A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH0936348A
公开(公告)日：1997-02-07
申请号：JP18414095
申请日：1995-07-20
申请人： HITACHI LTD
发明人： MIZOGUCHI TETSURO , KAWAKAMI SUMIO
IPC分类号： H01L29/744 , H01L21/312 , H01L29/74
摘要： PROBLEM TO BE SOLVED: To improve gate dielectric strength yield of a high power recess gate type device. SOLUTION: A part in which a groove sandwiched by projected portions of silicon has a T-shaped flat pattern is provided. The projected portions 5, 5' of silicon having the flat pattern in the shape of sandwiching the groove sandwiched by the projected portions for feeding a cathode electrode 8 are also provided. Leak of liquid resin from the groove sandwiched by the projected portions of silicon for feeding the cathode electrode 8 is controlled, improving the filling condition of resin in the groove. As a result, gate dielectric failure having been generated by insufficient filling of resin in the groove is almost never generated.

9. 发明专利

JPH05227746A CURRENT CONTROL CIRCUIT 失效
公开(公告)号：JPH05227746A
公开(公告)日：1993-09-03
申请号：JP3036892
申请日：1992-02-18
申请人： HITACHI LTD
发明人： KANOUDA TAMAHIKO , SATO MASAYOSHI , ONDA KENICHI , HAGIWARA SHUYA , MIZOGUCHI TETSURO , KONO NAOFUMI , FUJIKAWA KATSUMI , KINO JIRO
IPC分类号： H02M3/28
摘要： PURPOSE:To get a current circuit of low loss suitable for a high frequency switching power source by integrating a power MOSFET and a current detecting circuit on the same semiconductor substrate, and taking out one part of the unit cell of the power MOSFET to the other electrode. CONSTITUTION:For a current control circuit, when a power MOSFET 11 is tuned on, a current circulates from a rectifying smoothing circuit 2 to the primary side of a transformer 4 and a closed loop, and power is supplied to the secondary circuit, and shot diodes 5a and 5b rectify a high frequency AC, and a chock coil 6 and a capacitor 7 smooth it so as to control the voltage supplied to load 8 to be constant. Next, a feeble current equivalent to the cell ratio among a main current flows to a current detecting circuit 13 by connecting only the source electrodes of about 1-0.1% cells to the current detecting circuit 13, among the cells of the power MOSFET 11. This converts it into voltage and inputs it into a peak hold circuit 14, and only while a current flows to the MOSFET 11, it receives the output voltage, and during off, it holds the voltage level that it received at on.

10. 发明专利

JPH10290001A GATE TURN-OFF THYRISTOR 失效
公开(公告)号：JPH10290001A
公开(公告)日：1998-10-27
申请号：JP9554797
申请日：1997-04-14
申请人： HITACHI LTD
发明人： MIZOGUCHI TETSURO , KIMURA ARATA , YAO TSUTOMU
IPC分类号： H01L29/744 , H01L29/74
摘要： PROBLEM TO BE SOLVED: To suppress the increase in processing cost and to obtain a large capacitance element having large interruption strength by a method wherein the region where an N-emitter region, which comes in contact with a cathode electrode, is projected on anode surface, is prevented from overlapping on a P-emitter region which comes in contact with an anode electrode. SOLUTION: The ninth ring segment 49 has a P-emitter layer 11 overlapping on the region where an N-emitter layer 8 is projected on anode surface, and the region other than the tenth ring has the same structure as the ninth ring. On the other hand, in the tenth ring segment 410, an N layer 12 is provided instead of having no P-emitter layer on the region where the N-emitter layer 8 is projected on the anode surface. In this element, the P-emitter layer is not provided, and the tenth ring is not thyristor-operated. As a result, current concentration is not generated on the tenth ring even when the difference in pressure in the ring is large. As the difference in pressure is small in the ninth ring, the degree of current concentration becomes small, and an operation locus comes to a standstil in a safety region, and the element is not broken.

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