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    • 1. 发明专利
    • CONTROL DEVICE FOR ELEVATOR
    • JPH0920469A
    • 1997-01-21
    • JP16850495
    • 1995-07-04
    • HITACHI LTDHITACHI MITO ENG KK
    • YOKOYAMA YASUHIROKASAI SHOJIHIROSE MASAYUKI
    • B66B1/34H05K1/00H05K1/18
    • PROBLEM TO BE SOLVED: To provide commonness of a part by constituting a plurality of electronic circuits of different function in a single electronic part, and giving a function selecting signal from the outside, so that a plurality of the functions can be used, in the electronic circuit mounted on a control panel of an elevator. SOLUTION: A printed board 1 is divided into two parts, main microcomputer part 2 and auxiliary microcomputer part 3, to respectively constitute the main microcomputer part 2 by circuits A to C, E part 4a to 4c and by four blocks 4e, and the auxiliary microcomputer part 3 by circuits A, D and three blocks of F parts, 4a, 4d, 4f. In the case of giving an H signal to a function selecting signal 11, each circuit 4b, 4c is operated to perform inputting/outputting a signal relating to each circuit 4b, 4c (circuit 4d is placed in an inoperative condition). In the case of giving an L signal to the function selecting signal 11, the circuit 4d is operated to perform inputting/outputting a signal relating to the circuit 4d (circuits 4b, 4c are placed in an inoperative condition).
    • 3. 发明专利
    • DOOR CONTROL DEVICE FOR ELEVATOR
    • JPH07165383A
    • 1995-06-27
    • JP34262293
    • 1993-12-14
    • HITACHI LTD
    • KASAI SHOJIONO YOICHITAKAHASHI HIDEAKI
    • B66B13/14
    • PURPOSE:To provide a door control device for an elevator which suits prevention of the generation of vibration of a door during opening and operation of a door and control of smooth opening and closing of a door. CONSTITUTION:In a door closing opening closing device for an elevator employing link mechanisms 7a and 7b, a means is provided to calculate a ratio between the speeds of doors 1a and 1b determined by link mechanisms 7a and 7b and the speed of a door motor 4, i.e., a reduction ratio, as the position functions of the doors 1a and 1b. A means is provided to change a gain constant by which the control response speed of a control system for the door motor 4 is determined so that a loop gain during opening closing operation forms a stable control system throughout the whole area of a door opening closing region based on a gain constant by which a determined reduction ratio and a predetermined control response speed of door control are determined.
    • 5. 发明专利
    • CONTROLLER FOR INDUCTION MOTOR TYPE ELECTRIC VEHICLE
    • JPH06217410A
    • 1994-08-05
    • JP29939793
    • 1993-11-30
    • HITACHI LTD
    • KASAI SHOJINAKAMURA KIYOSHIHIROTSU TETSUJI
    • B60L9/18
    • PURPOSE:To allow high adhesion operation by operating a plurality of induction motor with the outputs from dedicated inverters and selecting a minimum value and a maximum value, respectively, for powering and braking from a plurality of rotational speed signals thereby preventing the idling quickly. CONSTITUTION:DC current is taken from a trolley wire 1 through a pantograph 2 and a plurality of reactors 31a-31i into inverters 33a-33i where the DC current is inverted into three-phase AC current for driving three-phase induction motors 350a-350i. Highest and lowest rotational speeds of each motor in (a)-(i) systems are selected by selectors 5a-5i and delivered to rotational speed selectors 80a-80i for own and other systems. Minimum or maximum rotational speed of each wheel is selected as the rotational speed of each motor, respectively, for powering or braking. This constitution runs an electric vehicle under micro-idling state to allow high adhesion operation and increases the expected adhesion coefficient of the entire train thus realizing high speed high acceleration/ deceleration operation.
    • 7. 发明专利
    • CONTROLLER FOR ELECTRIC VEHICLE
    • JPH0454801A
    • 1992-02-21
    • JP15974690
    • 1990-06-20
    • HITACHI LTD
    • KASAI SHOJIHIROTSU TETSUJI
    • H02P5/46B60L7/18B60L9/18H02P27/06
    • PURPOSE:To realize high acceleration and deceleration by controlling output current of an inverter based on the difference between a reference frequency detected through a plurality of induction motors being driven by a single inverter and the input frequency of the inverter. CONSTITUTION:DC current collected from a stringing l is converted through a single inverter 5 into VVVF current for driving a plurality of induction motors 6A-6D. Rotational frequency is then detected through pulse generators 7A-7D and a minimum frequency is operated 8 for powering whereas a maximum frequency is operated for regeneration thus producing a reference frequency fro. A motor current operating section 15 determines the slip frequency of motor under adhesion based on the difference between fro and input frequency fINV to the inverter 5 and then determines a corresponding current signal IMO. which is compared with a current pattern IP. The difference IM is then converted 12 into a slip frequency fs and the slip frequency fsp from a pattern generator 14 is added 13 fro thus controlling the inverter frequency fINV such that the motor current will be constant.
    • 8. 发明专利
    • RESET CIRCUIT FOR DIGITAL SYSTEM
    • JPH03256108A
    • 1991-11-14
    • JP5367290
    • 1990-03-07
    • HITACHI LTD
    • KASAI SHOJIHIROSE MASAYUKISAKATA KAZUHIROSUGIYAMA MASAO
    • G06F1/24
    • PURPOSE:To prevent the generation of runaway in a microprocessor or miswriting in a memory by connecting a voltage monitoring IC with a a low operation power supply voltage to the output of the other voltage monitoring IC so that these ICs are used for resetting the microprocessor and turning on/off a power supply for the memory. CONSTITUTION:The voltage monitoring IC 1 is connected to the output of the voltage monitoring IC 2 with the low operation power supply voltage, the node between both the ICs 1, 2 is connected to the reset terminal of the microprocessor 3, a reset line L6 inputted to the chip select (CS) terminals of respective memories 5, a decoding circuit 4 for decoding an address bus L9, and the output lines L8 of the circuit 4 are connected to the other CS terminals of respective memories 5, and the micropocessor 3 and the memories 5 are connected to a data bus L7. When the operation of the IC 1 exceeds the operable voltage point (a) of the processor at the rise of the power supply, a reset signal is outputted. The reset signal is outputted before the IC 2 arrives at the point (a). Thereby, an OR logic between the outputs of the ICs 1, 2 is outputted to the line L6. Since the IC 1 is reset before the operation of the microprocessor 3, the microprocessor 3 can be prevented from generating runaway.