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    • 5. 发明专利
    • Video recorder and reproducer
    • 视频录像机和复印机
    • JPS5954396A
    • 1984-03-29
    • JP16383282
    • 1982-09-22
    • Hitachi Ltd
    • FUKUSHIMA YOSHIMITSUKANESAKI TAKAYUKIKIMURA KAZUHIKOFUNASHIRO HIDEKAZU
    • H04N9/87H04N9/79
    • H04N9/79
    • PURPOSE:To correct the phase difference of a color signal, by taking a switching signal of a circuit correcting 1/2H shift as a trigger and generating a switching signal of a circuit correcting the phase difference of the color signal and switching the phase of trigger in response to the direction of the variable speed reproduction. CONSTITUTION:A reproducing color signal 1 is delayed with a 1H delay line 2 to obtain a reproducing color signal 4 after changing over the color signal with delay at a switch 3 and a color signal without delay. At variable speed reproduction, a 1/2H shift switching pulse 5 triggers a flip-flop 6, and a switch 7 changes over outputs Q, Q' of the flip-flop 6 for the variable speed reproduction in the same direction as the normal reproduction and for the variable speed reproduction in an opposite direction, so as to attain a trigger of the flip-flop 8 and the outut of the flip-flop 8 is taken as the drive pulse of the switch 3.
    • 目的:为了校正彩色信号的相位差,通过将1 / 2H频移的电路的切换信号作为触发,并产生校正彩色信号的相位差并切换触发相位的电路的切换信号 响应于可变速度再现的方向。 构成:以1H延迟线2延迟重放彩色信号1,以便在开关3上延迟颜色信号和彩色信号无延迟地改变颜色信号后获得再现色信号4。 在可变速度再现时,1 / 2H移位切换脉冲5触发触发器6,并且开关7在与正常再现相同的方向上改变触发器6的输出Q,Q'进行可变速度再现 并且为了在相反方向进行可变速度再现,以获得触发器8的触发,并且将触发器8的跳闸作为开关3的驱动脉冲。
    • 6. 发明专利
    • PICTURE RECORDING AND REPRODUCING DEVICE
    • JPS57186891A
    • 1982-11-17
    • JP7072581
    • 1981-05-13
    • HITACHI LTD
    • KANESAKI TAKAYUKIFUNASHIRO HIDEKAZU
    • H04N9/80H04N9/82H04N9/83
    • PURPOSE:To switch a system without debasing its frequency control capacity, at a low cost, by using a simple quartz oscillator for a color signal processing circuit, and switching the PAL system and the NTSC system by turning on or off this oscillator. CONSTITUTION:When recording, outputs of a 40fh oscillating circuit 5 controlled by a horizontal synchronizing signal fh applied to a terminal 4, and a changeover switch 6 are added by a converter 3, and only the sum frequency passes through a BPF 2, is supplied to a converter 1, and the input signal is converted to a low band. When inputting the switch 6, an (fsc+fh/8) oscillator 8 and a voltage control type quartz fsc oscillator 8 are selected in case of the PAL system and the NTSC system, respectively. A phase comparing circuit 10 is switched by a changeover switch 9 so as to control the oscillator 8 and a circuit system of the circuit 5, when recording and reproducing respectively. When reproducing, outputs of the circuit 5 and the switch 6 are added by the converter 3, only the sum frequency passes through the BPF 2, and is converted to its original frequency fsc by the converter 1. In this case, the oscillator 8 is made to run freely.
    • 7. 发明专利
    • SYNCHRONOUS SIGNAL ISOLATOR CIRCUIT
    • JPS54100220A
    • 1979-08-07
    • JP620178
    • 1978-01-25
    • HITACHI LTD
    • FUNASHIRO HIDEKAZUISHIKAWA SHIGERU
    • H04N5/08
    • PURPOSE:To decrease the number of the component parts without lowering the performance of the synchronous isolator circuit by using the base saturation type clipping circuit instead of the clipping circuit using the differential amplifier. CONSTITUTION:The composite video signal supplied to input terminal 1 is amplified through transistor 9 and 12 forming amplifier circuit 2 and then applied to clamping circuit 3. The tip of the synchronous signal is clamped by the voltage which is obtained by lowering the video signal from constant voltage source 18 by the voltage of diode 16 via capacitor 15, diode 16 and resistance 17. The clamped video signal is then lowered by the rise voltage of diode 19 via diode 19 and resistance 20 and applied to the base of Tr21 which functions as the clipping and amplifier circuits. Thus, the synchronous pulse synchronized with the synchronous signal of the composite video signal is delivered through the collector of Tr21 via Tr21.