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1. 发明专利

JPS55118145A SIMULATOR USING DIGITAL DIFFERENTIAL ANALYZER 失效
公开(公告)号：JPS55118145A
公开(公告)日：1980-09-10
申请号：JP2555579
申请日：1979-03-07
申请人： HITACHI ELECTRONICS , HITACHI LTD
发明人： KATOU KANJI , HAMAGUCHI YASUHIRO , SAITOU TAKESHI
IPC分类号： G06F7/64 , G05B23/02
摘要： PURPOSE:To ensure the simulation with the optimum arithmetic block by securing the alteration in accordance with the progress of the simulation for the arithmetic block connected in the optimum way according to the conditions of the waveforms or the like which simulate each arithmetic element of the DDA (digital differential analyzer). CONSTITUTION:Timer 2 is actuated by operation start signal 1, and at the same time DDA11 starts the operation. Coincidence circuit 4 compares the output given from timer 2 with alteration time value from RAM7. And when the coincidence is obtained through the comparison, transfer command signal 5 is delivered to transfer circuit 10. At the same time the, comparison is started with alteration time value T2. On the other hand, circuit 10 reads out alteration information UB1 from RAM8 and then sets it to DDA11 as well as gives preparation to the transfer of alteration information UB2 at time value T2. And DDA11 starts the operation via the new arithmetic block altered by information UB1. In such way, the operation is repeated to complete the operation up to alteration time Tn. Then at alteration time Tn+1, circuit 4 delivers stop signal 12, and thus the timer 2 operation is stopped along with the operation of DDA11. Thus all operations complete.

2. 发明专利

JPS57168343A MAXIMUM VALUE DETECTING CIRCUIT 失效
公开(公告)号：JPS57168343A
公开(公告)日：1982-10-16
申请号：JP5314781
申请日：1981-04-10
申请人： HITACHI ELECTRONICS
发明人： HAMAGUCHI YASUHIRO , HIBINO KATSUHIKO , SOGOU SABUROU
IPC分类号： G06F7/64
摘要： PURPOSE:To obtain a maximum value with a high precision automatically and easily, by detecting that an input value is 0 or the code is changed in the integrator of a digital differentiator. CONSTITUTION:An input value from an integrator and a preceding value 9 are discriminated by an extreme value discriminating circuit 10; and if the input value 4 is 0 or has a sign different from that the preceding value 9, a strobe is outputted to a digital comparator 12. An absolute value circuit 11 operates the absolute value of an output 7 of an Y-register 6 and outputs it to the digital comparator 12. The output of a memory 14 which is the absolute value of the preceding extreme value is compared with the output of the absolute value circuit 11; and if the latter is larger, the value of the absolute value circuit 11 is written to the memory 14, and a write signal 15 is outputted to a memory 16 to store the value 7 of the Y-register in the memory 16.

3. 发明专利

JPS5539901A INTEGRATING MULTIPLICATION SYSTEM OF DIGITAL DIFFERENTIAL ANALYZER 失效
公开(公告)号：JPS5539901A
公开(公告)日：1980-03-21
申请号：JP9611978
申请日：1978-08-09
申请人： HITACHI ELECTRONICS
发明人： HAMAGUCHI YASUHIRO , JIYOU AKIO
IPC分类号： G06F7/64
摘要： PURPOSE:To carry out the integrating and multiplication with high speed and high accuracy by performing the data access between the adding and the integrating results through the memory. CONSTITUTION:In the digital differential analyzer (DDA), the operation follows the division quadrature. In the case that the differential analyzer operates as an integrating multiplier, the connection memory MC4 is used for generating the indent of DELTAX of x. The content of DELTAZ memory MZ1-MZ4 read out in accordance with the address command from the connection memory MC1-MC4 represents the increment of the operation results in the preceding operation and comprises one bit indicating the positive and negative and one bit indicating 1 in number or 0. DELTAZ memory is written the operation result therein, and used by reading out the content of DELTAZ memory as operation input to the integrating multiplier, and the data access between the respective operation elements through DELTAZ memory is carried out.

4. 发明专利

JPS57203138A ASYNCHRONOUS OUTPUT SYSTEM OF DIGITAL DIFFERENTIAL ANALYZER 失效
公开(公告)号：JPS57203138A
公开(公告)日：1982-12-13
申请号：JP8818181
申请日：1981-06-10
申请人： HITACHI ELECTRONICS
发明人： HIBINO KATSUHIKO , HAMAGUCHI YASUHIRO , SOGOU SABUROU
IPC分类号： H03K19/177 , G06F7/64
摘要： PURPOSE:To easily discriminate an error in fetching by adding a one-bit signal to output data of a specific address. CONSTITUTION:An address signal 2 from a digital differential analyzer DDA is decoded by a decoder 5 and if there is an address to be outputted, a gate 3 is opened by a decoding output 4 to store the output data 1 of the DDA in a buffer memory 7. In this case, while the gate 3 is opened for data on a specific address, connection with the memory 7 is made to store the data in the memory 7 together with an added one-bit signal. A CPU8 fetches data from the memory 7 one after another, but the range of data fetched at a time is made clear by finding the specific bit in the data, so that an error in fetching even if occurs is discriminated easily.

5. 发明专利

JPS56145429A DIGITAL DIFFERENTIAL ANALYZER 失效
公开(公告)号：JPS56145429A
公开(公告)日：1981-11-12
申请号：JP4679080
申请日：1980-04-11
申请人： HITACHI ELECTRONICS
发明人： HAMAGUCHI YASUHIRO , SOGOU SABUROU , JIYOU AKIO
IPC分类号： G06F7/64
摘要： PURPOSE:To make clear the order of an overscale and to find its occurring factor easily by using an overscale signal as a trigger and by registering addresses of operational elements in a memory in the order of the overscale. CONSTITUTION:The output of adding circuit 6 and that of R register 9 are added together by adding circuit 8, whose overflow is discriminated by DELTAZ generating circuit 10 as output increment DELTAZ to write in R register 9 the value having the overflow subtracted from. If the addition of circuit 6 results in an overflow, this element is regarded as an overscale and overscale signal 7 is generated. This is used as a trigger to write value 1 of the element counter in shift register 13. In this register 13, input data moves successively and the order of overscale occurrence is retained. Then, counter 11 counts the generation of signal 7 and, one register 13 overflows, generates stop signal 12 to stop the arithmetic.

6. 发明专利

JPS5539909A SCALING SYSTEM FOR DIGITAL DIFFERENTIAL ANALYZER 失效
公开(公告)号：JPS5539909A
公开(公告)日：1980-03-21
申请号：JP10848878
申请日：1978-09-06
申请人： HITACHI ELECTRONICS
发明人： HAMAGUCHI YASUHIRO , JIYOU AKIO
IPC分类号： G06F7/64
摘要： PURPOSE:To shorten the time required for the scaling by storing the scale value in the memory. CONSTITUTION:The scaling memory MSR has a plurality of memories arranged in a matrix shape. The X axis corresponds to the respective increment value SIGMADELTAYi obtained every division quadrature, the Y axis corresponds to the respective value of the scale value and the product of the values of the X axis and the Y axis is stored on an intersecting portion thereof. Accordingly, when the increment SIGMADELTAYi and the scale value S are given, the product SSIGMAYi is immediately obtained and the value is outputted to the second adder AD2. According to this construction, the operation becomes unnecessary in the scaling and the extremely high speed scaling can be done.

7. 发明专利

JPS5493346A COUPLING SYSTEM FOR SERIAL OPERATION TYPE DIGITAL DIFFERENTIATION ANALYZER 失效
公开(公告)号：JPS5493346A
公开(公告)日：1979-07-24
申请号：JP14736977
申请日：1977-12-08
申请人： HITACHI ELECTRONICS
发明人： HAMAGUCHI YASUHIRO
IPC分类号： G06F7/64 , G06J1/02
摘要： PURPOSE:To enable to provide many operation processing abilities, without sacrificing the operation speed, by performing the data reception and transmission according to the address of the operation element in each serial operation type digital differentiating analyzer and to the number of data. CONSTITUTION:By assigning the number to the serial operation type digital differentiating analyzers DDA1,2 operated as the operation block, the analyzer can be definitely designated with the addresses of all the operation elements, and those data can be received and transmitted among DDA's arbitrarily via the memories 3 to 6, allowing parallel operational processing for each DDA. Thus, the processing ability can be increased without sacrificing the processing speed.

8. 发明专利

JPH04177125A AUTOMATIC MEASURING APPARATUS 失效
公开(公告)号：JPH04177125A
公开(公告)日：1992-06-24
申请号：JP30536790
申请日：1990-11-12
申请人： VICTOR COMPANY OF JAPAN , HITACHI ELECTRONICS
发明人： NATSUNO TAKAHIRO , SHIBAYAMA MASAHIKO , DATE KAZUYUKI , NATORI KAZUYA , HAMAGUCHI YASUHIRO
IPC分类号： G01D21/00
摘要： PURPOSE:To automatically grasp an actual measuring condition in a main control part by mounting a means outputting the data related to the set state of a measuring device on the measuring device. CONSTITUTION:The measuring condition of a measuring device 20 and the measuring conditions of the input expanding devices 30, 31 connected to the measuring device 20 are set by sending out the item and condition to be set according to a predetermined format to the measuring device 20 from a main control part 10 and the control part 10 receives the digital measuring data obtained by the A/D conversion of the measuring conditions by the measuring device 20 and process the same to make it possible to execute the judgment of quality, automatic adjustment and automatic measurement. By this constitution, the main control part 10 issues a specific command to the measuring device 10 to take in the data related to the set state of the measuring device 20 and can confirm whether the measuring device 20 is in an expected set state.

9. 发明专利

JPH02231572A WAVEFORM STORAGE DEVICE 失效
公开(公告)号：JPH02231572A
公开(公告)日：1990-09-13
申请号：JP5131889
申请日：1989-03-03
申请人： HITACHI ELECTRONICS
发明人： HAMAGUCHI YASUHIRO
IPC分类号： G01R13/20
摘要： PURPOSE:To easily make an observation and an analysis by storing plural output digital data in a memory in synchronism with an external clock, moving a current waveform display by several data, and then displaying the data in the memory. CONSTITUTION:A microcomputer 11 reads a conversion result out of a memory 10 in synchronism with an A/D conversion end signal 4 and stores it in a memory 12 temporarily. Then the contents in addresses l - (m) in the memory 13 are shifted to addresses l-n - m-n and a display start address set value 14 is outputted so that (n) A/D conversion results in addresses m-n+1 - (m) are displayed. A display circuit 15 reads the contents of the memory 13 in order corresponding to the set value 14 and displays them on a cathode-ray tube 17 for display. Here, when the address l is at the left end of the cathode-ray tube 17 and the address (m) is at the right end, the display waveform is displayed while scrolled from the right to the left. Consequently, the conversion of the rotation of an engine, the rotation of a motor, etc., in a desired angle range is easily analyzed.

10. 发明专利

JPS61193076A WAVEFORM STORAGE DEVICE 失效
公开(公告)号：JPS61193076A
公开(公告)日：1986-08-27
申请号：JP3272185
申请日：1985-02-22
申请人： HITACHI ELECTRONICS
发明人： HAMAGUCHI YASUHIRO
IPC分类号： G01R13/20
摘要： PURPOSE:To use more efficiently a memory by storing the 1st AD conversion result in the memory as it is and then storing the difference from last AD conversion result in a memory of less-bit constitution thereafter. CONSTITUTION:An AD converter 2, a collection memory 5, a transfer control circuit 9, etc., are provided. The converter 2 sends its output to a subtracter 3 and a memory 10 in synchronism with a clock 7. The output of a counter 8 is initially 0, so the output (a) of the circuit 9 is on. Consequently, switches of memories 11 and 12 are driven to store the output of the converter 2. The output of the circuit 9 turns off for the 2nd and succeeding outputs, so the input to a memory 12 turns off. Further, the memory 11 inputs the last AD conversion result stored in the memory 10 and the memory 10 inputs the current input result. Then, a subtracter 3 calculates the difference between outputs of the converter 2 and memory 11 and the difference is stored in a memory 15. Thus, the memories are used efficiently.

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