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    • 3. 发明专利
    • DEVELOPING AND MEASURING SYSTEM FOR FILING DEVICE
    • JPH08190770A
    • 1996-07-23
    • JP52895
    • 1995-01-06
    • FUJITSU LTD
    • TAKAISHI KAZUHIKOHASEGAWA SUSUMUOKAMURA EIJI
    • G11B21/08G06F11/30G11B33/10
    • PURPOSE: To quickly perform the developing of the firmware of an MCU and to measure mechanical operations even in the case of the printed circuit board of a filing device is not exposed to the outside. CONSTITUTION: A preexisting filing device 1 transfers positional information to a developing device 2. A firmware 2a calculates a current value for moving a head based on the positional information to transmit it to the filing device 1. A VCM driving circuit 1a drives a motor based on the current value transmitted from the developing device 2 and an MCU 1b detects the present position of the head to transmit them to the developing device 2. The firmware 2a determines a next current value based on the positional information of the head and also the developing device 2 monitors the operation of a file device 6 based on the positional information of the head and forms and corrects the firmware 2a. A measuring means 6a time sequentially measures various kinds of data indicating operations of the mechanical parts of the filing device 1, a preseving means 6b preserves measured results as numerical values and a transferring means 6c transfers the measured results to an exernal device 7.
    • 5. 发明专利
    • CONTROLLER OF VOLTAGE DISPLACEMENT ELEMENT
    • JPH0546249A
    • 1993-02-26
    • JP19936491
    • 1991-08-08
    • FUJITSU LTD
    • TAKAISHI KAZUHIKOHASEGAWA SUSUMUMIZOSHITA YOSHIBUMI
    • G05D3/00G05D3/12G11B21/10
    • PURPOSE:To provide the controller of a voltage displacement element in which it is hard to be influenced by resonance, the response can be fast performed, essentially, a gain is low at a high frequency area and the phase characteristic does not deteriorate. CONSTITUTION:In a controller 3 of a voltage displacement element to control the impressed voltage to a voltage displacement element 1 by impressing and displacing the voltage to the voltage displacement element 1 to reduce in accordance with the impressed voltage and feeding back the displacement quantity detected with a sensor 2, when a Laplacean is (s), the transfer function of the above voltage displacement element 1 is G(s), the transfer function of the controller 3 is K(s), and the transfer function of a phase compensator 4 provided in the controller 3 is K'(s), the loop transfer function of a control system becomes the form of G(s)*K(s)=G(s)*K'(s)/s , and an integration element 5 is provided at the transfer function of the controller 3 so that the degree of the denominator of the transfer function K(s) of the voltage displacement element 1 can become larger than the degree of the numerator.
    • 6. 发明专利
    • CONTROLLER
    • JPH04346101A
    • 1992-12-02
    • JP11846991
    • 1991-05-23
    • FUJITSU LTD
    • TAKAISHI KAZUHIKOHASEGAWA SUSUMU
    • G05B13/02
    • PURPOSE:To automate the designing of the controller which calculates the gains of what is called a PID regulator. CONSTITUTION:The controller to be controlled which has a transfer function enabling the double integral approximation of an input and an output, consists of an arithmetic means 2 for the gains fp, fi, and fd of the PID regulator for multiplication of P, I, and D, and a storage means 3 for a function f0 whose open loop gain is 0 dB, its phase margin theta0, and a coefficient zeta for determining the shape of an open loop characteristic. The gain arithmetic means lets omega0=2pif0 and calculates the three gains of a compensator from fp=omega0 /(K(1+ tan theta0) , fi=1/2KX(((1+zeta tan theta0) /zetatantheta)-1)X(omega0 tant heta0)/(1+tan theta0) , and fd=1/2KX(((1+zeta tan theta0) /zetatantheta)+1)X(omega0tanthet a0/(1+tan theta0) .
    • 7. 发明专利
    • TRACK ACCESS CONTROL SYSTEM
    • JPH03241574A
    • 1991-10-28
    • JP3719790
    • 1990-02-20
    • FUJITSU LTD
    • HASEGAWA SUSUMU
    • G11B21/08
    • PURPOSE:To stably execute high speed access and to improve operation precision by controlling an actuator with an estimated speed corresponding to a selected estimated position as an accurate speed. CONSTITUTION:A digital arithmetic circuit 4 controls the actuator 3 and a head 1 is moved, whereby it is positioned in a target track on a disk 2. The arithmetic circuit 4 calculates the estimated position P1 of the head 1 and the estimated position P2 obtained by adding an offset quantity to a position signal. The estimated speed in respective positions P1 and P2 come to the same value. When discrete points exist in an observation position, they come to the different values. Consequently, the estimated speed which does not include an error can be obtained by selecting the estimated position where the discrete points are not included. When the discrete points are included in the estimated position, the estimated position where overflow does not occur in an operation process is selected, and the estimated speed in the selected estimated position is set to the accurate speed.
    • 8. 发明专利
    • SPEED DEMODULATION CONTROL SYSTEM
    • JPH02223078A
    • 1990-09-05
    • JP4158989
    • 1989-02-23
    • FUJITSU LTD
    • HASEGAWA SUSUMU
    • G11B21/08
    • PURPOSE:To select a position signal with a phase not causing any error without increasing the load of the arithmetic processing section, and to demodulate the speed by providing a sampling section, a comparison section and a speed control arithmetic section to an arithmetic processing section. CONSTITUTION:A biphase position signal from a section 1 to be controlled is sampled at a 2nd period T2 shorter than a 1st period T1 by sampling sections 3-1, 3-2 for each phase. Then a difference between the preceding sample and this sample is obtained and an absolute value of the said difference of each phase is compared at a comparator section 4, and a larger difference is used to calculate the speed of the controlled section 1 at the speed control arithmetic section 5 for each of the 1st period T1. Thus, the speed of the controlled section 1 is calculated with digital processing without increasing the processing load of the speed control arithmetic section 5.
    • 9. 发明专利
    • A/D CONVERSION SYSTEM
    • JPS63292828A
    • 1988-11-30
    • JP12719987
    • 1987-05-26
    • FUJITSU LTD
    • HASEGAWA SUSUMUUENO TAKAHISA
    • H03M1/10H03M1/12
    • PURPOSE:To form a conversion value with high accuracy for a rear stage, by replacing the error of a digital value due to the discontinuous change of an analog signal at the maximum value or the minimum value that is the boundary value of the input range of an A/D converter by the boundary value. CONSTITUTION:A counter CNT is incremented under the constant condition of a comparator output S1, and a digital output S2 can be obtained. A digital value D from the A/D converter and the counter output S2 are read by a CPU simultaneously via a bus line B. The CPU reads the count value of the above counter at the time of starting and completing A/D conversion, and when the count value at the time of starting the conversion is different from that at the time of completing, the CPU judges that the A/D conversion of the analog signal changing discontinuously is performed. And as an A/D conversion value, the maximum value or the minimum value (that is, boundary value) of an A/D input range is adopted.