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1. 发明专利

JPH0685831A POLICING MECHANISM FAULT DETECTOR 失效
公开(公告)号：JPH0685831A
公开(公告)日：1994-03-25
申请号：JP23437992
申请日：1992-09-02
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： KOMINE HIROAKI , OGURA TAKAO , TEZUKA KOJI , TAKEO HIROSHI , KUSAYANAGI MICHIO , YAMANAKA NAOAKI , SATO YOICHI
IPC分类号： H04L12/24 , H04L12/26 , H04L12/48
摘要： PURPOSE:To detect the occurrence of a fault in a policing device provided with an ATM communication equipment by comparing policing data detected by an active system and a standby system while taking cross reference between virtual paths into account. CONSTITUTION:A comparator means 31 of a policing device fault detector 30 receives policing data detected by a policing device 11 of an active system and policing data detected by a policing device 21 of a standby system, and compares the two policing data relating to the same virtual path, and discriminates it that both the policing devices 11, 21 are normal when the data are coincident and outputs the result of discrimination to a host device. On the other hand, when the data are nonconcident, the means 31 judges it that either of the policing device 11, 21 is faulty and outputs the result of judgement to the host device.

2. 发明专利

JPS6436147A PHASE SYNCHRONIZING CIRCUIT FOR COMMUNICATION SYSTEM 失效
公开(公告)号：JPS6436147A
公开(公告)日：1989-02-07
申请号：JP19031287
申请日：1987-07-31
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： AMAMIYA SHIGEO , KOMINE HIROAKI , SOEJIMA TETSUO , MURANO KAZUO , OKUMURA YASUYUKI
IPC分类号： H04L7/00 , H04J3/06
摘要： PURPOSE:To attain the operation in response to various bus connection forms by generating a clock in response to a round trip delay between a master station and a slave station. CONSTITUTION:A comparator circuit 14 judges that in which timing range generated by a timing generating circuit 13 a received frame phase is to be included thereby determining the round trip delay time. The delay amount is used to delay the transmission frame phase from a transmission frame phase delay circuit 12, and a selection circuit 16 selects an optimum signal among some signals being the result of delaying the signal of the transmission frame phase from a transmission frame phase delay circuit 12 or some signals being the result of delaying signals of the received frame phase outputted from a reception frame phase delay circuit 15 and uses the result as a reset signal, which resets a clock generating circuit 17 thereby switching the clock. Thus, the clock switched optimizingly is used as a data read clock. Then the titled circuit is applicable to various bus forms.

3. 发明专利

JPH0993307A UNINTERRUPTIBLE SWITCH SYSTEM 失效
公开(公告)号：JPH0993307A
公开(公告)日：1997-04-04
申请号：JP24465495
申请日：1995-09-22
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： KOMINE HIROAKI , ICHIKAWA TAMOTSU , OTA HIROSHI
IPC分类号： H04B1/74 , H04L29/14
摘要： PROBLEM TO BE SOLVED: To attain an uninterruptible switch operation on the occurrence of a fault by discriminating it to be occurrence of a fault when the result of detection of phase comparison indicates anti-coincidence so as to change a switch signal thereby selecting a cell of a standby system. SOLUTION: A phase comparator section 16 being a phase comparator means compares ATM cells of active and standby systems read from buffers 12, 13 in the unit of bits, generates a coincidence signal at an H level when both are coincident and at an L level when both are anti-coincident and gives the signal to a phase change detection section 17 being a phase change detection means. When receiving an enable signal, pointer control sections 14, 15 increment a read pointer of the buffers 13, 14 respectively synchronously with a cell frame pulse in the inside of a changeover device. Then a switch signal outputted from the phase change detection section 17 is fed to a phase comparator section 16 and a selection circuit 18. Furthermore, the selection circuit 18 selects an output of the buffer 12 of the active system when the switching signal is at an L level and selects an output of the buffer 13 of the standby system when the switch signal is at an H level and provides the selected output from a terminal 19.

4. 发明专利

JPH0964873A BRANCH SYSTEM IN THE UNIT OF TRANSFER INFORMATION 失效
公开(公告)号：JPH0964873A
公开(公告)日：1997-03-07
申请号：JP21462395
申请日：1995-08-23
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： MATSUDA YUICHI , AMAMIYA SHIGEO , SHINOMIYA TOMOHIRO , KOMINE HIROAKI , WATANABE YUTAKA
IPC分类号： H04L12/70 , H04L12/28 , H04L12/931
摘要： PROBLEM TO BE SOLVED: To add a branch function to an existing device without remarkable revision by registering in advance prescribed information such as branch start setting. SOLUTION: The branch system in the unit of transfer information has a path setting conversion means 2, a path conversion table 4 referenced by the path setting conversion means 2, and a path distribution means 6. A reflected output 6A and a branch output 6B are provided to the path distribution means 6 and a reflected input 2A and a branch input 2b are provided to a path setting conversion means 2, respectively. Furthermore, a copy means 8 is provided among the reflected output 6A, the reflected input 2A and the branch input 2B, branch start setting information is registered in advance to the path conversion table 4 and number of reflected setting information and branch setting information by a branch number is registered in advance.

5. 发明专利

JPH06152699A POLICING USER INTERFACE SYSTEM 失效
公开(公告)号：JPH06152699A
公开(公告)日：1994-05-31
申请号：JP29516992
申请日：1992-11-04
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： OGURA TAKAO , FUJII TAIKI , KOMINE HIROAKI , TAKEO HIROSHI , KUSAYANAGI MICHIO , YAMANAKA NAOAKI , SATO YOICHI
IPC分类号： H04L29/14 , H04L12/28 , H04L12/48
摘要： PURPOSE:To prevent a faulty traffic due to accumulation of an offset cell quan tity by abolition a violation cell group only when an ATM cell quantity exceeds a violation cell abolition reference quantity and issuing a connection interruption warning to a violation user terminal equipment when number of times of aboli tion exceeds a threshold level. CONSTITUTION:A quantity of ATM(asynchronous transfer mode) cells sent from a user terminal equipment is monitored by a subscriber terminal station equipment 2 an when the quantity of the cells exceeds and abolition reference quantity, the equipment 2 abolishes a violation cell group and sends an abolition notice to a central monitor center 1. The center 1 counts number of times abolition and when number of times of abolition exceeds a threshold level Th1, a connection interrupt warning is issued to a violation user terminal equipment through a monitor control network CNW. When number of times exceeds a threshold level Th2 because of violation cells continuous supplied regardless of it, a connection interruption notice is sent to a violation user terminal equipment to control the equipment 2 to interrupt the connection between the violation user terminal equipment and the ATM network. Thus, a traffic fault is forcibly excluded regardless of the intention of the user terminal equipment.

6. 发明专利

JPS6359133A BUS ACCESS CONTENTION DETECTING SYSTEM 失效
公开(公告)号：JPS6359133A
公开(公告)日：1988-03-15
申请号：JP20233686
申请日：1986-08-28
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： AMAMIYA SHIGEO , KUWABARA HIDEO , MURANO KAZUO , SOEJIMA TETSUO , KOMINE HIROAKI
摘要： PURPOSE:To correctly detect the contention of bus access on the 2nd bus by applying loopback by a repeater. CONSTITUTION:The repeater 4 is provided with a loopback section 43 and a contention detection section 42, a data from a bus 5 is reflected to the bus 5 by a loopback section 43 and the contention in a bus 3 is detected by the contention control section 42. For example, in case of the transmission by a frame format (REP RD2) as shown in figure (e) from a terminal equipment 6-2, the repeater 4 uses the loopback section 43 to adopt the frame format shown in figure (d), inserts the data of a D-channel D3 to an E-channel E3 to apply loopback to the bus 5. In applying loopback by the repeater 4 in such a way, since the contention control at a terminal equipment is executed immediately, the contention control is performed correctly.

7. 发明专利

JPH04337942A DETOUR PATH SETTING SYSTEM 失效
公开(公告)号：JPH04337942A
公开(公告)日：1992-11-25
申请号：JP11003391
申请日：1991-05-15
申请人： FUJITSU LTD
发明人： KOMINE HIROAKI , MIYAZAKI KEIJI , NAKAJO TAKAFUMI
IPC分类号： G06F11/20 , H04L1/22 , H04L12/42 , H04L12/437
摘要： PURPOSE:To set a detour path even in the case of plural link faults or node faults concerning the detour path setting system to set a communication path by detouring a fault point generated in a network. CONSTITUTION:A node 1 detecting the communication fault broadcasts an identifier D of an adjacent node 4 connected to a link 8 detecting the communication fault by a search message (s). A node 3 receiving the search message compares the identifier D in the search message with an identifier stored in its own node ID storing means 3b or an adjacent node ID storing means 3c. As the result of the comparison, since the D stored in the adjacent node ID storing means 3c is matched with the identifier D in the search message, a response message (r) for setting the detour path is returned to the node 1 detecting the communication fault. The node 3 transmitting this response message (r) and the node 1 receiving it set the detour path.

8. 发明专利

JPH0491595A DETOURING PATH SEARCHING SYSTEM 失效
公开(公告)号：JPH0491595A
公开(公告)日：1992-03-25
申请号：JP20875590
申请日：1990-08-06
申请人： FUJITSU LTD
发明人： MIYAZAKI KEIJI , NAKAJO TAKAFUMI , KOMINE HIROAKI , OGURA TAKAO , SOEJIMA TETSUO
IPC分类号： H04M3/22 , H04M3/00 , H04Q3/545 , H04Q3/66
摘要： PURPOSE:To quickly eliminate a fault from a path having a higher priority by sending a detouring path searching box which searches a detouring path for restoring the fault from a standby channel having the same priority as that of the faulty path from the node at the end of the faulty path which receives a fault message. CONSTITUTION:When a link D-F becomes faulty, it is detected at nodes D and F at the ends of the faulty path that a fault has occurred through a fault detecting interface 23. At the node F, the paths D-F and D-F-E which have become faulty are detected by referring to the currently used path table and it is informed to the nodes F and E that the paths D-F and D-F-E have become faulty. Upon receiving the information, the node E detects that the faulty path D-F-E has priority '2' by referring to the currently used path table. Then the node E sends a detouring path searching box 61 to the node D at the end of another channel after adding the priority '2' to the box 61 by referring to a standby channel table.

9. 发明专利

JPH02284543A ALTERATION SYSTEM FOR VIRTUAL PASS SECTION 失效
公开(公告)号：JPH02284543A
公开(公告)日：1990-11-21
申请号：JP10546389
申请日：1989-04-25
申请人： FUJITSU LTD
发明人： NAKAJO TAKAFUMI , KOMINE HIROAKI , MIYAZAKI KEIJI , SOEJIMA TETSUO
IPC分类号： H04L12/923
摘要： PURPOSE:To shorten a processing time and to prevent the influence of a sensor fault by installing retrieval means and information accumulation means in respective nodes and constituting respective nodes so that they autonomously acquire/transfer the partition of a virtual channel identifier through the use of said means. CONSTITUTION:In a communication network identifying virtual passes VP which have been set between respective nodes by the partition of the identifier VCI of the line VC stored in a physical link by using an asynchronous transfer mode ATM, the means VPMT accumulating information including the allocation partition of the virtual pass passing through respective nodes, reservation partition upper limit and the number of links, a means URM updating the upper limit in accordance with the prediction value of traffic and a means SM accessing to the virtual pass VP sharing the physical link based on information and retrieving the propriety of partition extension are installed in respective nodes. A network operation control system initially sets the allocation partition of the virtual pass, and respective nodes alter the reservation partition upper limit in accordance with traffic prediction within the range of allocation partition. Then, respective nodes extend/reduce allocation partition by using the retrieval means SM and the information accumulation means VPMT.

10. 发明专利

JP2012034156A Processor, processing method and communication system 有权
标题翻译：处理器，处理方法和通信系统
公开(公告)号：JP2012034156A
公开(公告)日：2012-02-16
申请号：JP2010171401
申请日：2010-07-30
申请人： Fujitsu Ltd , 富士通株式会社
发明人： KATAKURA YUKIO , KOMINE HIROAKI , MAEDA YASUO , TSUHARA KATSUYOSHI
IPC分类号： H04M3/50 , H04M3/00
CPC分类号： H04L61/3085 , H04L61/106 , H04L61/1511
摘要： PROBLEM TO BE SOLVED: To provide a processor, a processing method and a communication system capable of connecting with a connection destination even under a situation where congestion is generated.SOLUTION: The processor which responds to a retrieval request with an address includes: an address conversion part for responding to a first retrieval request transmitted from a first server with a first address; and an alternative control part for controlling the address conversion part so as to respond to the first retrieval request with a second address instead of the first address when the address conversion part receives a second retrieval request requesting the second address from a second server.
摘要翻译：要解决的问题：提供即使在产生拥塞的情况下也能够与连接目的地连接的处理器，处理方法和通信系统。解决方案：响应具有地址的检索请求的处理器包括：地址转换部分，用于响应从具有第一地址的第一服务器发送的第一检索请求; 以及替代控制部分，用于当地址转换部分从第二服务器接收到请求第二地址的第二检索请求时，以第二地址而不是第一地址来控制地址转换部分以响应第一检索请求。版权所有（C）2012，JPO＆INPIT

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