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1. 发明专利

JP2004221745A Address conversion apparatus 审中-公开
公开(公告)号：JP2004221745A
公开(公告)日：2004-08-05
申请号：JP2003004503
申请日：2003-01-10
申请人： Fujitsu Ltd , 富士通株式会社
发明人： TAKECHI RYUICHI , KATO TSUGIO
IPC分类号： H04L12/46 , H04L29/12
CPC分类号： H04L61/6059 , H04L29/12358 , H04L29/12471 , H04L29/12915 , H04L61/251 , H04L61/2553 , H04W8/26 , H04W80/04
摘要： PROBLEM TO BE SOLVED: To provide an address conversion apparatus capable of continuing communication with the other terminal even when the address of one terminal is changed in an information communication network. SOLUTION: The address conversion apparatus includes: an extraction means for extracting a fixed identifier denoting the sender of data from the data received via a first network; a storage means for storing the fixed identifier and an address in a second network of the sender denoted by the fixed identifier by correlating them with each other; a read means for reading the address in the second network stored in the storage means in correlation with the fixed identifier extracted by the extraction means; and a replacement means for exchanging the address in the second network read by the read means and the sender address of the data. COPYRIGHT: (C)2004,JPO&NCIPI

2. 发明专利

JP2001298488A NODE UNIT 失效
公开(公告)号：JP2001298488A
公开(公告)日：2001-10-26
申请号：JP2000113997
申请日：2000-04-14
申请人： FUJITSU LTD
发明人： NAKATSUGAWA KEIICHI , KATO TSUGIO , TAKECHI RYUICHI , ONO HIDEAKI
IPC分类号： H04W60/00 , H04L12/42 , H04L12/701 , H04L29/06 , H04L29/12 , H04W8/26 , H04W24/00 , H04W36/00 , H04W40/34 , H04W60/04 , H04W80/04 , H04W84/12 , H04L12/56 , H04L12/28 , H04Q7/34
摘要： PROBLEM TO BE SOLVED: To eliminate a packet loss caused by a destination terminal, that is moved to an area of other node unit and to prevent a node unit of a sender from keeping transmitting packets to a node unit, in the zone of which the destination terminal has been residing. SOLUTION: A receiver side not unit 20-3 transfers a received inter-node packet 81 to a node unit 20-4, in the zone of which the destination terminal is a resident directly or via other unit, or the node unit 20-4, in the zone of which the destination terminal is resident informs a node unit 20-3 (receiver side), in the zone of which the destination terminal has been resident about its own unit address [ADR6]. Furthermore, the receiver side node unit 20-3 or the node unit 20-4, in the zone of which the destination terminal is a resident informs the sender node unit 20-2 about a node unit address [ADR6] directly or via other device, in the zone of which the destination terminal is a resident.

3. 发明专利

JPH1188360A SHORT CELL MULTIPLEXER 失效
公开(公告)号：JPH1188360A
公开(公告)日：1999-03-30
申请号：JP24709197
申请日：1997-09-11
申请人： FUJITSU LTD
发明人： ONO HIDEAKI , TAKECHI RYUICHI , KATO TSUGIO , SASAKI HIROSHI , SASAKI TAKAYUKI
IPC分类号： H04Q3/00 , H04J3/16 , H04L12/815 , H04L12/863 , H04L12/865 , H04L12/951 , H04Q11/04 , H04L12/28
摘要： PROBLEM TO BE SOLVED: To provide a short cell multiplexer capable of reducing the burdens of the change processing of the read order of short cells while suppressing a cost. SOLUTION: In the order specifying means 20a of this short cell multiplexer, in respective read interval setting registers 64a-64c, read intervals corresponding to quality classes 1-3 are set. Also, in counter memories 61a-61c, the number of the read short cells 1 is stored. The order specifying means 20a specifies the quality class for which the number of the short cells reaches the read interval based on the respective read intervals and the number of the read short cells and instructs the read of the short cells of the class.

4. 发明专利

JPH09247173A CELL BASE ECHO CANCELLER 失效
公开(公告)号：JPH09247173A
公开(公告)日：1997-09-19
申请号：JP5166696
申请日：1996-03-08
申请人： NIPPON TELEGRAPH & TELEPHONE , FUJITSU LTD
发明人： MIURA KAZUMA , FUJITANI HIROSHI , TOYOIZUMI SEISHI , TAKECHI RYUICHI
IPC分类号： H04B3/23 , H04L12/28 , H04L12/70 , H04L12/951 , H04Q3/00
摘要： PROBLEM TO BE SOLVED: To obtain a device preventing deterioration in the quality by providing a means to detect cell loss and mis-insertion to both remote and near cells so as to keep the cross reference between both the remote and near cells. SOLUTION: Upon the receipt of a remote end cell 7, a detection function 1 stores a copy of a cell so that whether a cell is normally received, a cell loss is caused or a cell is mis-inserted is discriminated. In the case of normal reception or cell loss, sound data 8 are sent to a reference data memory 2, in the case of mis-insertion cell, the data of the stored cell are aborted. In the case of detecting the cell loss, dummy data equivalent to the cell loss are inserted and a write pointer 5 is controlled so that the voice data 8 are stored at a prescribed position. The reference data memory 2 stores the voice data received from the detection function 1 at an address pointed out by the write pointer 5 in the areas of the reference data memory.

5. 发明专利

JPH08237267A ATM EXCHANGE 失效
公开(公告)号：JPH08237267A
公开(公告)日：1996-09-13
申请号：JP4020695
申请日：1995-02-28
申请人： FUJITSU LTD
发明人： EZAKI YUTAKA , ONO HIDEAKI , TAKECHI RYUICHI
IPC分类号： H04Q3/00 , H04L12/24 , H04L12/26 , H04L12/28
摘要： PURPOSE: To reduce the function of a message processor and to miniaturize a processor scale by giving the terminating function of a signal VC for the message processor to a line interface part. CONSTITUTION: The line interface part abolishes a QAM cell when the message processor 4 receives the QAM cell which the message processor 4 cannot process (abolishes) from the message processor, and informs CPU of abolishment information as a processing result. Since the QAM function of a cell level is arranged for the line interface part without fail, the QAM function of the cell level of the signal VC stored in the message processor 4 can be terminated based on information obtained in the QAM function. Since the QAM cell extraction/ monitor part 32 and the QAM cell insertion part 37 of the message processor 4 can be shared by the QAM cell extraction/monitor part and the QAM cell insertion part of the line interface part, they can be eliminated.

6. 发明专利

JPH08237252A ATM CELL PROCESSOR 失效
公开(公告)号：JPH08237252A
公开(公告)日：1996-09-13
申请号：JP3486495
申请日：1995-02-23
申请人： FUJITSU LTD
发明人： ONO HIDEAKI , TAKECHI RYUICHI , KATO TSUGIO , EZAKI YUTAKA , AMANO MITSUHARU , KAWARAI KENICHI
IPC分类号： H04Q3/00 , H04L12/28
摘要： PURPOSE: To reduce a hardware scale in an ATM cell processor for processing an ATM cell in accordance with connection setting information. CONSTITUTION: This processor is provided with a setting table 1 for allocating an area corresponding to a VC connection which is not used as a system on the storage area of VP connection setting information and storing VP connection setting information and VC connection setting information in the same memory, a connection identification part 2 for identifying whether the arrived ATM cell is VP connection or VC connection, a cell processing part 3 for processing VP connection setting information which is read out of the setting table 1 and the arrived ATM cell based on VC connection setting information and an address conversion part 4 for converting an address signal corresponding to the address of the storage area of VP connection setting information and VC connection setting information of the setting table 1.

7. 发明专利

JPH066373A CELL LINE CONCENTRATION MULTIPLEX SYSTEM 失效
公开(公告)号：JPH066373A
公开(公告)日：1994-01-14
申请号：JP16477692
申请日：1992-06-23
申请人： FUJITSU LTD
发明人： KATO TSUGIO , KATO MASABUMI , EZAKI YUTAKA , TAKECHI RYUICHI , ABE SHUNJI
IPC分类号： G06F12/00 , H04Q11/04 , H04L12/48
摘要： PURPOSE:To smooth calls fed to a buffer at a prescribed period without need of complicated control and without giving any effect onto other buffer even when number of calls fed to the buffer is subject to change when cells inputted to each buffer of plural input links are read to one output link concerning to the cell line concentration and multiplex system. CONSTITUTION:The system is provided with buffer memories 31-3n storing input cells, count means 51-5n counting a cell period, setting value latch means 41-4n to which the read period from the buffer corresponding to the applied operating band, cell buffers 21-2n. having comparison means 61-6n generating a request of reading the cell from the buffers in response to each of input links 11-1n. When the comparator means of each cell buffer detects coincidence between a count of each count means with a setting value latch means, the comparator means outputs a read request to a contention control means and when the comparator means receives a read enable from the contention control means, the comparator means read the cell from the buffer memory to the output link.

8. 发明专利

JPH0490623A TRANSMISSION ENCODING SYSTEM 失效
公开(公告)号：JPH0490623A
公开(公告)日：1992-03-24
申请号：JP20716490
申请日：1990-08-03
申请人： FUJITSU LTD
发明人： TAKECHI RYUICHI
IPC分类号： H03M13/00 , H04L25/48
摘要： PURPOSE:To improve the transmission efficiency of a data communication system by transmitting a data signal with error correction code with the identical bit length with the data signal. CONSTITUTION:Respective bits H0-H3 constructing an error correction code (h) are converted to a conversion code sdh with the identical bit length with a bit Di together with respective bits D0-D3, and transmitted from a data transmission device 1 to a data receiving device 2 as a transmission signal (s). Therefore, the throughput on a transmission path 3 is not deteriorated by the error correction code (h). Thus, the transmission efficiency of the data communication system can be improved.

9. 发明专利

JP2009177264A Network system, data transmission/reception method, and data transmission/reception program 有权
标题翻译：网络系统，数据传输/接收方法和数据传输/接收程序
公开(公告)号：JP2009177264A
公开(公告)日：2009-08-06
申请号：JP2008011024
申请日：2008-01-22
申请人： Fujitsu Ltd , 富士通株式会社
发明人： TAKECHI RYUICHI
IPC分类号： H04W60/00 , H04L12/46 , H04L12/70 , H04L12/701 , H04L12/951 , H04W8/02 , H04W36/00 , H04W40/34 , H04W64/00 , H04W80/04
CPC分类号： H04L12/4633 , H04W8/06 , H04W40/36 , H04W80/045 , H04W88/182
摘要： PROBLEM TO BE SOLVED: To provide a network system wherein the interruption time of a service is shortened, a data transmission/reception method in the network system, and a data transmission/reception program. SOLUTION: The network system is provided with a first router 20 to which a mobile terminal is connected in a visiting place and a second router 30 to which the mobile terminal 60 is connected in a moving destination moved from the first router 20, and the second router 20 is provided with a position registration message generation part for generating the position registration message of the mobile terminal 60 and transmitting it to the first router 20. The first router 20 is provided with a movement management part for receiving the position registration message and storing address information before and after the change of the mobile terminal 60 in a binding cache 23, and an encapsulating part for receiving a data packet from a node 10, encapsulating the data packet and preparing and transferring the data packet whose transmission destination is the address information after the change stored in the binding cache 23. The mobile terminal 60 is provided with a decapsulating part for receiving the encapsulated data packet and decapsulating the received data packet. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种其中服务的中断时间缩短的网络系统，网络系统中的数据发送/接收方法以及数据发送/接收程序。解决方案：网络系统设置有移动终端连接到访问位置的第一路由器20和移动终端60连接到从第一路由器20移动的移动目的地的第二路由器30，并且第二路由器20设置有用于生成移动终端60的位置登记消息并将其发送到第一路由器20的位置登记消息生成部。第一路由器20设置有用于接收位置登记的移动管理部消息和存储地址信息在移动终端60在绑定缓存23中的改变之前和之后，以及封装部分，用于从节点10接收数据包，封装数据包，并准备和传送发送目的地为存储在绑定高速缓存23中的改变之后的地址信息。移动终端60具有解封装置接收封装的数据分组并解封装接收的数据分组。版权所有（C）2009，JPO＆INPIT

10. 发明专利

JP2006352444A SYSTEM AND METHOD FOR PACKET TRANSFER 审中-公开
公开(公告)号：JP2006352444A
公开(公告)日：2006-12-28
申请号：JP2005175087
申请日：2005-06-15
申请人： FUJITSU LTD
发明人： TAKECHI RYUICHI
IPC分类号： H04L12/721 , H04M3/00 , H04W24/02 , H04W80/04
摘要： PROBLEM TO BE SOLVED: To improve effective use of resources on a network, and also to improve operability, as to a system and a method for packet transfer. SOLUTION: The system and the method for packet transfer include: lower nodes (SGSN#a, SGSN#b) connected to terminals (MS#a, MS#b) through the network (wireless access network) 3; and higher nodes (GGSN#a, GGSN#b) connected to the lower nodes through a core network 2, and transfer packets between the terminals. Each higher node is provided with a tunnel setting means 12 for setting and designating a tunnel for transferring packets on the basis of destination addresses of the packets transferred from the terminals through the lower nodes, and each lower node is provided with a packet transfer means 12 for transferring the packets from the terminals to tunnels set according to setting indications from tunnel setting means 12 on the basis of the destination addresses of the packets from the terminals. COPYRIGHT: (C)2007,JPO&INPIT

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