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1. 发明专利

JPH0567172A LOGIC SYNTHESIZING SYSTEM 失效
公开(公告)号：JPH0567172A
公开(公告)日：1993-03-19
申请号：JP22601391
申请日：1991-09-05
申请人： FUJITSU LTD
发明人： YAMAZAKI MASAMI , OKAWA SHOICHI
IPC分类号： G06F9/44 , G06F17/50
摘要： PURPOSE:To provide a logic synthesizing system capable of automatically synthesizing a circuit where the designer's will is sufficiently taken into consideration. CONSTITUTION:This system consists of a circuit data file 10 where circuit data are stored as function blocks, a condition setting part 11 which sets a condition of circuit synthesis, a rule file 12 where various circuit synthesis rules are stored together with rule numbers, a rule evaluation order file 13 where the evaluation order of rules for each use is stored as rule numbers with respect to each priority level, a control part 14 which receives the condition of the condition setting part 11 to call rule numbers in the rule evaluation order file 13 with respect to each priority level and calls a pertinent rule from the rule file 12 to output it, and an expanding part 15 which expands contents of the circuit data file 10 in accordance with the condition and rules given from the control part 14 and the condition setting part 11.

2. 发明专利

JP2002157037A LICENSE MANAGEMENT METHOD AND SYSTEM 失效
公开(公告)号：JP2002157037A
公开(公告)日：2002-05-31
申请号：JP2000354066
申请日：2000-11-21
申请人： FUJITSU LTD
发明人： OKAWA SHOICHI , SUZUKI YASUHIRO , KOGA TOMOAKI , SAKAMOTO HIDEKI , TSUDA MASAYUKI
IPC分类号： G06F21/22 , G06F1/00
摘要： PROBLEM TO BE SOLVED: To provide a license management method and system capable of automating the license management of software and surely executing a requested processing. SOLUTION: This license management method and system comprises a request accept control part 1 for registering a request; a request cue 2 for cuing the registered request; a request execution control part 5 for reading the request from the request cue 2, judging whether it is executable or not, and controlling the execution of the software; a job dependent relation control part 6 for controlling the dependent relation of the request; a software execution part 9 for executing the software; and a license management part 7 for performing the license management of the software.

3. 发明专利

JPH1091672A METHOD FOR CONVERTING CIRCUIT TECHNOLOGY 失效
公开(公告)号：JPH1091672A
公开(公告)日：1998-04-10
申请号：JP24738796
申请日：1996-09-19
申请人： FUJITSU LTD
发明人： OKAWA SHOICHI , TAKAHASHI HIROSHI , NAKAMURA TAKESHI
IPC分类号： G06F17/50
摘要： PROBLEM TO BE SOLVED: To simplify conversion processing in the circuit technology conversion method for preparing an objective circuit by utilizing an existing circuit. SOLUTION: The circuit technology conversion method for synthetically outputting an objective circuit by utilizing an existing circuit includes a process for converting a unit cell constituting the existing circuit into a function macro independent of circuit technology and attaining the function of the objective circuit by using the function macro. In technology conversion processing (A1), a parameter analyzing part (A2) analyzes a parameter, a circuit checking part (A5) checks whether conversion is available or not, a test circuit deleting part (A7) eliminates a test circuit, an element conversion part (A14) converts the function macro, and a circuit synthesizing part (A18) synthesizes the objective circuit by using the function macro.

4. 发明专利

JPH09259154A METHOD AND DEVICE FOR DESIGNING LOGIC, AND PRODUCTION OF SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JPH09259154A
公开(公告)日：1997-10-03
申请号：JP6359296
申请日：1996-03-19
申请人： FUJITSU LTD
发明人： YAMAZAKI MASAMI , SATOU HITOMI , SUGIOKA TOSHIAKI , HAYASHI HISAYO , OKAWA SHOICHI
IPC分类号： G06F17/50 , H01L21/82
摘要： PROBLEM TO BE SOLVED: To shorten the period for designing a semiconductor integrated circuit. SOLUTION: The area of elements at the gate level corresponding to the technology of a semiconductor integrated circuit to be produced is previously registered in a library 13, a specification 10 of the semiconductor integrated circuit described in a hardware description language, a simplified element form and the characteristics of a clock to be applied to the semiconductor integrated circuit are inputted to a computer and while using the elements registered in the library 13, the computer generates the net list of circuit at the gate level based on the specification. Based on the element form and the element area registered in the library 13, an element size is decided and based on the net list and the element size, the automatic arrangement of elements and automatic wiring between the elements are roughly performed rather than the stage of layout design on a floor 20 corresponding to a chip. Then, based on the results of automatic arrangement and automatic wiring, signal delay time is found and based on the signal delay time and the characteristics of the clock, the timing analysis of signal at a flip-flop inside the semiconductor integrated circuit is performed.

5. 发明专利

JPH0696147A PATH ANALYZING SYSTEM FOR CIRCUIT RETRIEVAL 失效
公开(公告)号：JPH0696147A
公开(公告)日：1994-04-08
申请号：JP24024592
申请日：1992-09-09
申请人： FUJITSU LTD
发明人： OKAWA SHOICHI
IPC分类号： G06F17/50 , G06F15/60
摘要： PURPOSE:To provide the path analyzing system for circuit retrieval which can efficiently perform circuit analysis even without the detailed information on the inside. CONSTITUTION:This system is composed of a circuit data file 1 storing circuit data, inter-terminal relation storage file 10 storing the terminal relation between the input and output of a circuit block as an inter-terminal relation information storage table 11, and path tracer 2 to perform the path trace of a circuit by reading the circuit data from the circuit data file 1 and reading the inter- terminal information from the inter-terminal relation storage file 10 as needed and to output the result as the analyzed result A.

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