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1. 发明专利

JP2003101482A OPTICAL RECEIVER FOR OPTICAL DIGITAL COMMUNICATION 审中-公开
公开(公告)号：JP2003101482A
公开(公告)日：2003-04-04
申请号：JP2002177975
申请日：2002-06-19
申请人： FUJITSU LTD
发明人： YASUDA AKIHIKO , MISAIZU SETSUO , SAKAMOTO HISAYA , MIYAKI YUJI , NAGASE NORIO , KUZUGAMI HIROSHI
IPC分类号： H01L31/10 , H03F3/08 , H04B10/07 , H04B10/079 , H04B10/2507 , H04B10/40 , H04B10/50 , H04B10/60 , H04B10/67 , H04B10/69 , H04B10/08 , H04B10/04 , H04B10/06 , H04B10/14 , H04B10/26 , H04B10/28
摘要： PROBLEM TO BE SOLVED: To normally obtain an optimum multiplication factor MOPT first then, to enhance S/N with respect to optical input power compared with a fixing bias system and a FULL-AGC system. SOLUTION: An optical receiver is provided with a serial circuit consisting of a bias resistance and a photodetector, a pre-amplifier for performing voltage conversion concerning a current corresponding to an optical input level which is detected by the photodetector, an equalizing amplifier for amplifying the output of the pre-amplifier by equalization, an identifying reproduction circuit for identifying the output of the equalizing amplifier and adopting it as a data output and an optical input disconnection detecting circuit for detecting an optical input disconnection from a detected peak value. A range for controlling a photodetector bias voltage in the case of the highest optical input level is fixed from the dispersion characteristic of a self bias control voltage at every photodetector then, the bias resistance is adjusted to be within the set range.

2. 发明专利

JP2002084235A APD BIAS VOLTAGE CONTROL CIRCUIT 失效
公开(公告)号：JP2002084235A
公开(公告)日：2002-03-22
申请号：JP2000271125
申请日：2000-09-07
申请人： FUJITSU LTD
发明人： KANESAKA HIROKI , MIYAKI YUJI , FUSE YUKIHARU
IPC分类号： H01L31/107 , H01L31/10 , H03F3/08 , H04B10/07 , H04B10/293 , H04B10/564 , H04B10/572 , H04B10/14 , H04B10/04 , H04B10/06
摘要： PROBLEM TO BE SOLVED: To provide an APD(Avalanche Photo Diode) bias voltage control circuit that can combine an optical reception module and an APD bias voltage control section in a general purpose way, downsize the optical reception module by externally mounting the APD bias voltage control section and commonly structure the PIN element optical reception module. SOLUTION: The optical reception section 60 that receives an optical signal input, converts it into an electric signal and outputs output data and the APD bias circuit control section 70 that provides an optimum bias voltage to an APD of the optical reception section 60 are separately configured, and the APD bias voltage control section 70 consists of a DC voltage source 71 that can control its output voltage, a variable resistor 10 for controlling a bias voltage that is connected to the DC voltage source 71 and the resistance of which is varied with an external signal, and a CPU 72 that conducts various controls.

3. 发明专利

JPH04280520A ALARM TRANSFER DEVICE FOR OPTICAL RELAY SYSTEM 失效
公开(公告)号：JPH04280520A
公开(公告)日：1992-10-06
申请号：JP4382591
申请日：1991-03-08
申请人： FUJITSU LTD
发明人： MIYAKI YUJI
IPC分类号： H04B10/07 , H04B10/077 , H04B10/29 , H04B10/293 , H04B10/297 , H04B10/54 , H04B10/548 , H04B10/564
摘要： PURPOSE:To specify a fault location by detecting a fault at each block of optical relay, thereafter transferring the information to a reception station in the alarm transfer device of the optical relay system. CONSTITUTION:Optical transmission lines 2 are connected with each other by the amplifier circuit 11 in a repeater 1. The transmission side of the optical transmission line 2 is arranged with a reception station 3 and a transmission station 4. The repeater 1 is provided with the optical amplifier circuit 11 amplifying an optical signal through an optical fiber, an exciting light source 12 supplying an exciting light to the optical amplifier circuit 11 and a control circuit 13 controlling the exciting luminous intensity of the exciting light source 12 with an alarm signal based on the fault information of the optical transmission line 2. A reception station 3 separates the fault information from the received optical signal. Thus, a fault relating to the optical transmission line 2 is discriminated by the reception station 3.

4. 发明专利

JPH04242032A POWER SUPPLY CUT DETECTION CIRCUIT 失效
公开(公告)号：JPH04242032A
公开(公告)日：1992-08-28
申请号：JP260491
申请日：1991-01-14
申请人： FUJITSU LTD
发明人： MIYAKI YUJI , MORITA HIROTAKA
IPC分类号： H01H47/00
摘要： PURPOSE:To surely perform power supply cut detection relating to a power supply cut detection circuit. CONSTITUTION:A power supply cut detection circuit is composed in such a way as having a current control means 3 to be connected in series to a relay winding 1 and a voltage detection means 4 for detecting power supply voltage, as aforesaid in series connection and aforesaid voltage detection means 4 being mutually connected in parallel to aforesaid power supply voltage, and as aforesaid current control means 3 being turned to an OFF state so as to reduce the current flowing through aforesaid relay wiring 1 at least to be lower than the aforesaid first prescribed value when voltage detected by said voltage detection means 4 becomes lower than a second prescribed value.

5. 发明专利

JPH03235430A CONTINUOUS SUPERVISORY TESTER FOR QUALITY OF LINE 失效
公开(公告)号：JPH03235430A
公开(公告)日：1991-10-21
申请号：JP3035390
申请日：1990-02-09
申请人： FUJITSU LTD
发明人： KOBAYASHI KATSUYUKI , MIYAKI YUJI
IPC分类号： G01R31/317 , H04B3/46 , H04L25/02
摘要： PURPOSE:To continuously supervise the quality of a line by converting three kinds of inputs of 0/-1V, TTL, and a photocoupler outputted from a digital transmission device into the same level, and displaying the counted result of an error pulse on a display means. CONSTITUTION:A level converter 11 converts the input of O/-1V into the output of 5/0V, and the level converter 12 converts the input of a TTL level into the output of 5/0V, and the level converter 13 converts the input of the photocoupler into the output of 5/0V, and they output their outputs, and no matter what level the level of the input is, the output is converted into 5/0V, and the output of the level converter to be connected to a counter 31 is selected and outputted by a change-over SW 21. In above-mentioned configuration, for instance, when line error rate Pe is larger than 10 , it is displayed on a display device 51.

6. 发明专利

JPH03154534A DIGITAL MULTIPLEXER 失效
公开(公告)号：JPH03154534A
公开(公告)日：1991-07-02
申请号：JP29454889
申请日：1989-11-13
申请人： FUJITSU LTD
发明人： SEKINE SHIGEO , MIYAKI YUJI
IPC分类号： H04J3/14
摘要： PURPOSE:To always monitor the quality of a digital line remotely by setting a limit on the line quality of the digital line in advance, counting error pulses outputted from an error detection and raising an alarm output when it exceeds an error limit. CONSTITUTION:An error pulse is generated every time an error detection section 10 detects a line error and an error limit setting means 20 sets an error limit raising an alarm display. Then a count means 30 counts number of error pulses apd when number of the error pulses exceeds an error limit set by the error limit setting means 20, alarm display is implemented to a display means 40 in a digital multiplexer 1. Simultaneously, the alarm output outputted from the count means 30 is displayed on a remote display device via an interface means 50. Thus, the quality of the digital line is always monitored remotely at all times.

7. 发明专利

JPS6327127A SIGNAL CONVERTER 失效
公开(公告)号：JPS6327127A
公开(公告)日：1988-02-04
申请号：JP17039986
申请日：1986-07-18
申请人： FUJITSU LTD
发明人： MIYAKI YUJI
IPC分类号： H04L25/49 , H03M5/06 , H03M5/18
摘要： PURPOSE:To reduce power consumption and to miniaturize a control circuit for the titled converter by applying a signal being the inverse of an NRZ signal to an input terminal provided separately to the control circuit so as to prevent a current from being made to flow to a control line in the absence of an input signal. CONSTITUTION:A signal being the inverse of an NRZ signal by an inverter 20 is fed to a transistor (TR) 14 receiving no clock of a control circuit 3 while being subjected to level shift by a Zener diode 18. Then a voltage being intermediate to a voltage corresponding to logical 1 and 0 fed to the base is set slightly larger than a voltage being an intermediate value of voltages corresponding to logical 1 and 0 of a clock and a voltage 0 being the inverse of the NRZ signal is set to a value smaller than the voltage of the level 1 of the clock. In this case, a signal flows through a point (j) of a control line 19 only when the clock is logical 1 and the inverse of the NRZ signal is 0. Thus, a current flows from a power supply-Vs via a TR 17 and a resistor Re, and the product between a current and the potential difference between the power supply-Vs and-Ve becomes power consumption because of a negative power supply, and the power consumption being a product between the power supply-Vs and the current is reduced.

8. 发明专利

JPS62185134A TEMPERATURE SENSOR 失效
公开(公告)号：JPS62185134A
公开(公告)日：1987-08-13
申请号：JP2821786
申请日：1986-02-12
申请人： FUJITSU LTD
发明人： ADACHI JUN , MIYAKI YUJI
IPC分类号： G01K11/12 , G01K5/62
摘要： PURPOSE:To enable the measurement of the temperature of the atmosphere, by a method wherein an optical fiber is attached tight to the side of a bimetal with the spiral end thereof is fixed to form a detector section so that it can be set in a container, equipment or the like with such a smaller size of the detection section. CONSTITUTION:A detection section 5 has a bimetal 10 with one spiral end fixed and an optical fiber 15 is attached spirally along the inner side thereof, for example, with an adhesive. An output side light transmission path 2 is connected to one end of the fiber 15 through an optical connector 6 while the other end thereof is optically coupled to a light source 1. On the other hand, an input side light transmission path 3 is connected to the other end of the fiber 15 through an optical connector 7 while the other end thereof is optically coupled to a light receiver 4 to measure variations in a bend loss to be caused at a part of the optical fiber 15. Then, as the temperature at the point where the detector section 5 is set rises, the curvature of the bimetal 10 reduces in proportion to the temperature to increase the bend loss at the part of the fiber 15. This decreases light power received with the light receiver 4 thereby enabling the measuring of the temperature near the detector section 5.

9. 发明专利

JPS6223250A PARITY COUNTER CIRCUIT 失效
公开(公告)号：JPS6223250A
公开(公告)日：1987-01-31
申请号：JP16266485
申请日：1985-07-23
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： ENDO TAKEMI , ARAI MASANORI , MIYAKI YUJI , YAMAGUCHI SHINGO
IPC分类号： H03M13/00 , H04L1/00
摘要： PURPOSE:To count the number data of over all bits in a frame of even a high speed data by using a comparison circuit so as to compare simply the result of count of the (n-1)th frame and the n-th frame thereby obtaining the result of count for parity check. CONSTITUTION:A counter 100 counting the number of data of a reception data and a comparator circuit 102 detecting whether or not the count of the counter just before the reception of the said frame and the count of the counter just after the number of data of the said frame is counted, are provided and an output of the comparison circuit 102 is used as the counted result of the said frame. The counted result of the said frame is changed depending on the initial state frame when the counter 100 starts the count of the said frame. Since the initial state depends on the output of the counter 100 just before the reception of the said frame, the number of data of the said frame is known by comparing the said information with the output of the counter just after the count of the said frame is finished.

10. 发明专利

JPS61208947A TRANSMISSION FAULT DETECTING AND CONTROLLING SYSTEM 失效
公开(公告)号：JPS61208947A
公开(公告)日：1986-09-17
申请号：JP4935485
申请日：1985-03-14
申请人： FUJITSU LTD
发明人： ARAI MASANORI , ENDO TAKEMI , MIYAKI YUJI
IPC分类号： H04L25/02
摘要： PURPOSE:To output an alarm signal by providing an inter-code interference detecting means detecting quantity of inter-code interference of an equalized waveform of a reception signal and a comparison means comparing the detection signal with a prescribed value and discriminating it as a transmission error when the detection signal is a prescribed value or over. CONSTITUTION:The reception signal is fed to an equalizing amplifier 4 from an input terminal 3 and subject to equalization and amplification. The equalizing amplifier signal is fed to an identification/inter-code interference detection circuit 5, a timing extraction circuit 9 and a peak detection circuit 10. The circuits 9, 10 and the comparator 11 detect the abnormal decrease of the reception signal level and the interruption of reception signal and outputs an input interruption alarm signal from an alarm terminal 12. Then the circuit 5 applies code identification of the equalizing amplifier signal according to the timing signal extracted by the circuit 9, detects the inter-code interference quantity according to the timing signal and its detection signal is fed to a comparator 7, where the signal is compared with a reference value from a reference terminal 13, and when the signal reaches the detection signal over the reference value, a transmission error alarm signal is generated and outputted from a terminal 8.

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