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1. 发明专利

JP2007226309A Improvement guideline deriving apparatus 审中-公开
标题翻译：改进指导手段
公开(公告)号：JP2007226309A
公开(公告)日：2007-09-06
申请号：JP2006043795
申请日：2006-02-21
申请人： Fujitsu Ltd , 富士通株式会社
发明人： KIMURA SHOICHI , WAKIMOTO OSAMU , NAKAMURA KAZUHIRO , AMANO KOJI , UENO TAKASHI , KUBO KAZUTOMO , KOBAYASHI KAZUTOSHI
IPC分类号： G06F11/34
摘要： PROBLEM TO BE SOLVED: To derive at least one of an improvement part to be most effective in an improvement of a processing ability of a system and a minimum improvement quantity satisfying a performance target of the system.
SOLUTION: An improvement guideline deriving apparatus for deriving an improvement guideline for a system, when the system to which a performance target is designated by indicating with a processing frequency per unit time does not achieve its performance target, the apparatus comprises a means for obtaining actual processing time based on the measurement result of the processing time of the system; and a means for comparing the obtained actual processing time and the performance target; and for the case where the comparison results that the actual processing time does not achieve the target performance, the apparatus further includes a specifying means for specifying to output an improvement part to be most effective in the improvement of the processing ability of the system as the improvement guideline; and a deriving means for deriving a minimum improvement quantity achieving the performance target of the system with respect to the specified improvement part as the improvement guideline.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提出在提高系统的处理能力方面最有效的改进部分和满足系统的性能目标的最小改进量中的至少一个。解决方案：一种用于导出系统的改进指南的改进指南导出装置，当通过以每单位时间的处理频率指示来指定性能目标的系统未达到其性能目标时，该装置包括一种装置用于基于系统的处理时间的测量结果获得实际处理时间; 以及用于比较所获得的实际处理时间和性能目标的手段; 并且对于比较结果实际处理时间未达到目标性能的情况，该装置还包括指定装置，用于指定输出改进部分以提高系统的处理能力最有效改进指引; 以及导出装置，用于导出实现系统对于指定改进部分的性能目标的最小改进量作为改进指导。版权所有（C）2007，JPO＆INPIT

2. 发明专利

JP2010224647A TIMER VALUE MANAGEMENT SYSTEM AND SERVER DEVICE 审中-公开
公开(公告)号：JP2010224647A
公开(公告)日：2010-10-07
申请号：JP2009068427
申请日：2009-03-19
申请人： FUJITSU LTD
发明人： KOMIYA HIDESUKE , KOMINE HIROAKI , FUJII SHINJIRO , TSUHARA KATSUYOSHI , MOTOMURA YOSHIKAZU , YAMASHITA TOMOKO , KOJIMA TAKASHI , KUBO KAZUTOMO , IMAMURA TETSURO , NAGASAWA AKIRA
IPC分类号： G06F11/30
摘要： PROBLEM TO BE SOLVED: To provide a system for dynamically setting a completion timer value of a device of a higher layer in an information processing system having a multistage structure of three layers or more. SOLUTION: The system includes an information collection means provided on each server included in a multistage server system having three or more layers, the information collection means collecting completion time information showing, for a processing request transmitted to a server lower in order than the own server, the time to completion of processing by servers located in layers up to the server of the transmitting destination; a completion timer value table provided on each server, the table holding a completion timer value based on the collected completion time information in conformation to the transmitted processing request, and being used for time-out control for the processing request; and a report means provided on each server, the report means determining a completion time including the processing time of the own device based on the collected completion time information and the time required for processing in the own device, and transmits a completion time report containing completion time information showing this completion time to a server located in a layer higher in order than the own device. COPYRIGHT: (C)2011,JPO&INPIT

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