专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JP2008165399A Simulation data generation support device 审中-公开
标题翻译：模拟数据生成支持设备
公开(公告)号：JP2008165399A
公开(公告)日：2008-07-17
申请号：JP2006352809
申请日：2006-12-27
申请人： Fanuc Ltd , ファナック株式会社
发明人： ONISHI YASUSHI , HASEGAWA SATORU , MARUYAMA TOYOKAZU
IPC分类号： G05B19/05
CPC分类号： G05B19/056 , G05B2219/1138 , G05B2219/13142 , G05B2219/13186 , G05B2219/14087 , G05B2219/23452 , G06F11/261
摘要： PROBLEM TO BE SOLVED: To facilitate creation of an input/output signal operation screen when performing simulation by operating a sequence control program by the input/output signal operation screen.
SOLUTION: This simulation data generation support device 100 reads out constitution setting information 35 (7) of an input/output unit set and stored in a control device 102. Input/output signal information (input/output address) 9 is extracted from the constitution setting information 7, and a symbol and a comment 10 of the input/output address set beforehand are added, to thereby generate input/output signal operation screen setting information 11. An input/output simulation device 101 displays the input/output signal operation screen based on the input/output signal operation screen setting information 11, inputs an input signal simulatively, acquires an output signal by executing a control program 34 by the control device 102, and performs debugging of the control program by performing simulation for displaying on the screen. Hereby, the input/output signal operation screen for performing simulation can be created simply.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了便于通过由输入/输出信号操作屏幕操作序列控制程序来执行模拟时创建输入/输出信号操作屏幕。解决方案：该模拟数据生成支持装置100读出设置并存储在控制装置102中的输入/输出单元的结构设置信息35（7）。提取输入/输出信号信息（输入/输出地址）9 根据结构设定信息7，预先设定的输入/输出地址的符号和注释10相加，从而生成输入/输出信号操作画面设置信息11.输入/输出模拟装置101显示输入/输出基于输入/输出信号操作屏幕设置信息11的信号操作屏幕，模拟地输入输入信号，通过由控制装置102执行控制程序34获取输出信号，并通过执行模拟来执行控制程序的调试屏幕上。因此，可以简单地创建用于执行模拟的输入/输出信号操作屏幕。版权所有（C）2008，JPO＆INPIT

2. 发明专利

JP2007102632A Simulation device 审中-公开
标题翻译：模拟装置
公开(公告)号：JP2007102632A
公开(公告)日：2007-04-19
申请号：JP2005293848
申请日：2005-10-06
申请人： Fanuc Ltd , ファナック株式会社
发明人： ONISHI YASUSHI , MARUYAMA TOYOKAZU
IPC分类号： G05B19/18 , G05B19/414
CPC分类号： G05B19/4069 , G05B2219/33225 , G05B2219/35308 , G05B2219/36252
摘要： PROBLEM TO BE SOLVED: To provide a simulation device in which extension and maintenance of function is facilitated.
SOLUTION: This simulation device comprises a numerical control program simulation software execution means 1, a sequence control program simulation software execution means 2, an interactive programming device simulation software execution means 3 and a machine tool simulation software execution means 4, which execute each simulation of a numerical control function, a sequence control function, an interactive programming device, and a machine tool. This simulation device further comprises an intermediation software execution means 5 intermediating exchange of simulation input and output data among the simulation software execution means 1, 2, 3, and 4. When a simulation software execution means for a new function is added, the addition can be easily performed only by providing an interface with the intermediation software execution means 5.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种便于扩展和维护功能的模拟装置。解决方案：该仿真装置包括数控程序仿真软件执行装置1，序列控制程序模拟软件执行装置2，交互式编程装置模拟软件执行装置3和机床仿真软件执行装置4，其执行每个模拟数字控制功能，序列控制功能，交互式编程设备和机床。该模拟装置还包括中间软件执行装置5，在模拟软件执行装置1,2,3和4之间中介模拟输入和输出数据的交换。当添加用于新功能的模拟软件执行装置时，只能通过提供与中介软件执行装置5的接口来轻松执行。版权所有（C）2007，JPO＆INPIT

3. 发明专利

JPH11219210A SEQUENCE CONTROL METHOD AND CONTROLLER 失效
公开(公告)号：JPH11219210A
公开(公告)日：1999-08-10
申请号：JP3428998
申请日：1998-01-30
申请人： FANUC LTD
发明人： ONISHI YASUSHI , HASEGAWA SATORU
IPC分类号： G05B19/02 , G05B19/05
摘要： PROBLEM TO BE SOLVED: To provide sequence control method and device capable of performing the arithmetic processing of many data such as a repetitive operation or the like without increasing a step number by a simple program and batch-processing the arithmetic processings of many data by one instruction. SOLUTION: This sequence controller by a programmable controller is provided with instruction execution means (1a-1f) for repeating an instructed arithmetic operation for the specified number of times of processings based on the instruction for specifying the kind of the arithmetic operation and the number of times of processing the arithmetic operation. In the case that the instruction for specifying the kind of the arithmetic operation and the number of times of processing the arithmetic operation is described in a sequence program, the instruction execution means perform the processing of repeating the specified arithmetic operation for the specified number of times of the processing by the one instruction. Thus, the plural times of the arithmetic processings are performed altogether by one instruction.

4. 发明专利

JPH08263107A EDITING SYSTEM FOR SEQUENCE PROGRAM 失效
公开(公告)号：JPH08263107A
公开(公告)日：1996-10-11
申请号：JP6235395
申请日：1995-03-22
申请人： FANUC LTD
发明人： ONISHI YASUSHI , WATANABE TORU
IPC分类号： G05B19/05
摘要： PURPOSE: To edit symbols definitions on respective programming devices individually and enable plural developers to take partial charge and edit one sequence program through a network as to the editing system which edits the sequence program consisting of plural subprograms. CONSTITUTION: A source file 60 on a hard disk device 6 is provided with a global symbol file 61, a ladder program area 62, and a local symbol area 63. In the ladder program area 62, plural subprogram files(SP) 62a, 62b... are stored. Further, local symbol files(LS) 63a, 63b... corresponding to the respective subprograms 62a, 62b... are stored in the local symbol area 63. The editing means 2b of a programming device 2 edits the ladder program in a subprogram file that is specified and sent and gives symbol definitions to the desired signal of the edited ladder program.

5. 发明专利

JPH08123515A DISPLAY SYSTEM FOR SEQUENCE PROGRAM 失效
公开(公告)号：JPH08123515A
公开(公告)日：1996-05-17
申请号：JP26014594
申请日：1994-10-25
申请人： FANUC LTD
发明人： ONISHI YASUSHI , MOCHIZUKI MITSURU
IPC分类号： G05B19/05 , G05B19/042 , G05B19/048 , G05B23/02 , G06F11/32
摘要： PURPOSE: To display the related data of a desired signal or instruction with a simple operation at the time of debugging without requiring any data management. CONSTITUTION: When the address of related data related to respective signals or instructions is inputted together with a sequence program by a program address input means 1, an inputted sequence program 2a and an address 2b of the related data are stored in a program address storage means 2. A program executing means 3 executes the inputted sequence program to control the operation of a machine 4. When the specified signal of the sequence program under execution or the execution state of the instruction is instructed to be displayed by a display commanding means 5, the execution state of the commanded display e signal or instruction and the executing state of those related data are displayed on the same screen of a display device 7 by an executing state display means 6.

6. 发明专利

JPH06301407A DATA EDITING SYSTEM OF PC 失效
公开(公告)号：JPH06301407A
公开(公告)日：1994-10-28
申请号：JP8855193
申请日：1993-04-15
申请人： FANUC LTD
发明人： TANAKA KUNIO , ONISHI YASUSHI , SATO KOJI
IPC分类号： G05B19/05
摘要： PURPOSE:To make a display corresponding to the mode of data and make editing operation easier by the data editing system of the PC (programmable controller) for editing data that the PC handles. CONSTITUTION:The head address of a series of data to be displayed is entered into a head address command field 51. A display unit such as a byte(BYTE), word(WORD), or double-word(D.W0RD) display is inputted to a display unit command field 52. The number of data which are outputted is inputted to a data quantity command field 53. A form of notation such as binary(BINARY), BCD(Binary Coded Decimal), hexadecimal(HEX), ASCII code(ASCII), or Chinese character (CHINESE) is inputted to a display data form command field 54. After command operation, data are displayed as commanded.

7. 发明专利

JPH04335404A DEBUG SYSTEM FOR SEQUENCE PROGRAM 失效
公开(公告)号：JPH04335404A
公开(公告)日：1992-11-24
申请号：JP13565791
申请日：1991-05-10
申请人： FANUC LTD
发明人： TANAKA KUNIO , ONISHI YASUSHI
IPC分类号： G05B19/048 , G05B19/05 , G05B19/4063
摘要： PURPOSE:To prevent the operation test omission at the time of debug in the debug system executed by a programmable machine controller by displaying a step which is being executed at present and a step executed already by a first and a second display patterns, respectively. CONSTITUTION:A programmable machine controller is a kind of programmable controller, and contained in a numerical controller. A processor is that which becomes the center of the whole numerical controller, reads out a program stored in a ROM through a bus, and executes control of the whole numerical controller in accordance with this system program. Also, a process A, a condition C1, a process C and a condition C2 which are executed already are displayed with higher luminance than that of a process B which is not executed yet, and a process D which is being executed at present is subjected to flickering display. Therefore, it is known at a glance that the process B of a step S2 is not execute yet, and an operation omission at the time of debug can be prevented.

8. 发明专利

JPH0417002A SEQUENCE PROGRAM SEARCHING SYSTEM 失效
公开(公告)号：JPH0417002A
公开(公告)日：1992-01-21
申请号：JP12052990
申请日：1990-05-10
申请人： FANUC LTD
发明人： ONISHI YASUSHI , HAKOSHIMA MASASHI
IPC分类号： G05B19/05
摘要： PURPOSE:To simplify the sequence program searching operation of the title system so as to improve the efficiency of debugging work by setting marks to required nets and searching and displaying the marks by means of operation keys. CONSTITUTION:When nets 10a-10c in the sequence program of a programmable controller are searched, marks 12a and 12b are set to required nets 10a-10c and the succeeding nets 10a and 10b with the marks 12a and 12b are searched and displayed whenever an forward operation key is pressed. Whenever a backward operation key is pressed, the preceding nets 10a and 10c with the marks 12a and 12b are searched and displayed. Therefore, when the marks 12a and 12b are set to the nets 10a-10c having logical relations among them, the related nets 10a-10c can be easily referred to and the time required for debugging, etc., can be reduced. As a result, the efficiency of the debugging work can be improved.

9. 发明专利

JPH0242507A PROGRAM CONTROL DEVICE 失效
公开(公告)号：JPH0242507A
公开(公告)日：1990-02-13
申请号：JP19368588
申请日：1988-08-03
申请人： FANUC LTD
发明人： KITANI NOBUYUKI , ONISHI YASUSHI , ITSUBO YOSHIHIRO
IPC分类号： G05B19/05
摘要： PURPOSE:To easily produce and maintain a program including the signal state changed by the lapse of time when such a program is required by storing the signal states of the desired frequency covering the past through the future and easily referring to the contents of storage of said signal states. CONSTITUTION:A processor 1 which performs the overall control includes an index 2 and a mask register 3. An input circuit 13 receives an external signal and transmits this signal to a bus 12 after converting the signal level. Then an output circuit 14 outputs an output signal to the outside from the inside. Only in case an input signal I1 is presently kept on and also was kept on in the preceding scan cycle I1-1 and its preceding scan period I1-2 respectively, an output signal Q1 is turned on. In other words, a function is secured as a kind of a filter that turns on the output only when the ON states are continuous in three times. Thus a program can be produced and maintained in consideration of the lapse of time.

10. 发明专利

JPH0212305A INSTRUCTION CHANGE SYSTEM FOR PC DEVICE 失效
公开(公告)号：JPH0212305A
公开(公告)日：1990-01-17
申请号：JP16141788
申请日：1988-06-29
申请人： FANUC LTD
发明人： KITANI NOBUYUKI , ONISHI YASUSHI
IPC分类号： G05B19/05
摘要： PURPOSE:To facilitate a program debugging job by changing plural instructions in a single editing process without giving any adverse influence to execution of programs. CONSTITUTION:A multi-process system includes an instruction executing process and an instruction editing process. The instructions are changed when the instruction executing process where a system program 6 stored in a ROM 5 is carried out by a processor 4 is performed synchronously with an instruction editing process where an editing program 3 stored in a ROM 2 is carried out by a processor 1. Thus it is possible to change plural instructions in a single editing process without giving any adverse influence to execution of programs. Then a program debugging job is facilitated in an operation mode.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式