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3. 发明专利

JPS5938672B2 JPS5938672B2 - 失效
公开(公告)号：JPS5938672B2
公开(公告)日：1984-09-18
申请号：JP13710575
申请日：1975-11-14
申请人： Enaajii Konbaajon Debaisesu Inc
发明人： DEEBITSUDO ADORAA , KAATO II PIITAASEN , MERUBIN PII SHOO
IPC分类号： G11C11/41 , H01L21/331 , H01L29/08 , H01L29/68 , H01L29/73 , H01L45/00 , H03K19/08
CPC分类号： H01L29/0821 , H01L29/0895 , H01L29/685 , H03K19/08
摘要： 1522327 Semiconductor devices ENERGY CONVERSION DEVICES Inc 13 Nov 1975 [14 Nov 1974] 46917/75 Heading H1K [Also in Division H3] A transistor-like device of which either the emitter region 4 (Fig. 1) or the collector region 8 1 (Fig. 5) is of a material which switches from a high resistance to a low resistance state on application thereacross of a voltage above a threshold value, is operated with selectively applicable emitter-base and emitter-collector biases, the latter of which is on its own insufficient to cause the switch material to become conductive but the joint application of both of which causes the material to switch. In the non-conductive condition of the switch material a negligible emitter-collector current flows, whereas when the switch material is conductive a maximum emitter-collector current flows. If, after simultaneous application of both biases, the emitter-base bias alone is removed a significant emitter-collector current, generally of an intermediate value less than the maximum value referred to above, continues to flow, and this provides a logic circuit in which three distinct conditions may be detected. In the circuit of Fig. 5 these are detected by directly sensing the level of the collector current using two amplitude level sensing means, such as Schmidt trigger circuits, 40 1 , 42 1 , set to trigger respectively at the intermediate and maximum collector current levels. The outputs of circuits 40 1 , 42 1 are coupled to binary logic circuit 44 in turn coupled to indicating means 46. In the circuit of Fig. 1 level sensing means 40, 42 are set to detect the presence or absence of collector and base currents respectively, and the outputs thereof supply a binary logic circuit 44 to provide indication of the same three logic states as in the previous embodiment. Constructionally, the switch material 4 or 8 1 is preferably r.f.-sputtered on to a Si body containing the other two device regions, e.g. formed by epitaxy. The switch material may be of either "threshold" or "memory" types, and several suitable materials are disclosed. Reset mechanisms appropriate to the particular type of switch material are employed (i.e. simple interruption of the emitter-collector current for a "threshold" material, and application of a reset current pulse for a "memory" material).

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