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1. 发明专利

JP2015012065A 半導体装置の製造方法审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2015012065A
公开(公告)日：2015-01-19
申请号：JP2013134965
申请日：2013-06-27
申请人：株式会社デンソー , Denso Corp
发明人： INABA SHIGENOBU , MAEDA YUKIHIRO , MIZUTANI KOJI
IPC分类号： H01L21/52 , H01L21/60
CPC分类号： H01L2224/36 , H01L2224/40 , H01L2224/40095 , H01L2224/40137 , H01L2224/40245 , H01L2224/83801 , H01L2224/84801 , H01L2924/00014 , H01L2924/181 , H01L2924/00 , H01L2224/37099 , H01L2924/00012
摘要：【課題】はんだにおけるボイド形成が抑制される製造方法を提供する。【解決手段】第1のはんだ5によりアイランド部21と半導体チップ3とを接合して構成される半導体装置の製造方法において、半導体チップ3の重心から離れた位置に荷重を加えるようにする。これにより、第1のはんだ5を溶融させてからその固化が完了するまで、半導体チップ3の一面3aを、アイランド部21の一面21aに対して傾斜した状態に維持する。このため、溶融状態の第1のはんだ5中に存在する気体(例えば、フラックスが分解して発生するガス)が、アイランド部21の一面と半導体チップ3の一面3aとの間隔が広い領域において移動し易くなる。よって、この広い領域を通じて気体が第1のはんだ5の外部へ放出され易くなり、固化後における第1のはんだ5中にボイドが形成され難くなる。【選択図】図3
摘要翻译：要解决的问题：提供抑制焊料中的空隙形成的制造方法。解决方案：在通过第一焊料5将岛部21与半导体芯片3接合的半导体装置的制造方法中，负载被施加在远离半导体芯片3的重心的位置上。因此，在第一焊料5熔化之后直到其焊接完成，半导体芯片3的一个表面3a保持在其中倾斜于岛部21的一个表面21a。因此，存在于处于熔融状态的第一焊料5中的气体（例如，通量分解时产生的气体）容易在间隔宽的区域中移动在岛部21的一个表面和半导体芯片3的一个表面3a之间。因此，气体容易通过宽区域被释放到第一焊料5的外部，以阻止在第一焊料5的形成先焊5次凝固。

2. 发明专利

JP2011228631A Wiring board incorporating semiconductor chip and manufacturing method of the same 有权
标题翻译：制造半导体芯片及其制造方法的接线板
公开(公告)号：JP2011228631A
公开(公告)日：2011-11-10
申请号：JP2011002321
申请日：2011-01-07
申请人： Denso Corp , 株式会社デンソー
发明人： MAEDA YUKIHIRO , KONDO KOJI , HARADA YOSHIHARU , YAMAUCHI TAKESHI , FUJII TETSUO
IPC分类号： H05K3/46 , H01L23/12
CPC分类号： H05K3/4632 , H01L23/145 , H01L23/3128 , H01L23/367 , H01L23/3677 , H01L23/49894 , H01L23/5389 , H01L24/13 , H01L24/16 , H01L24/19 , H01L24/20 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/92 , H01L2224/05624 , H01L2224/1134 , H01L2224/13144 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/73259 , H01L2224/81203 , H01L2224/83192 , H01L2224/92224 , H01L2924/00011 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01075 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/13055 , H01L2924/13091 , H01L2924/14 , H01L2924/15311 , H01L2924/351 , H05K1/0206 , H05K1/185 , H05K3/0061 , H05K2201/096 , H05K2201/10674 , H05K2203/063 , H01L2924/00 , H01L2924/3512 , H01L2224/8384 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of a wiring board incorporating a semiconductor chip for simplifying a manufacturing process and suppressing stress to the semiconductor chip.SOLUTION: The semiconductor chip 50 where a stud bump 52a is installed in an electrode 51a and a thermosetting resin film 21b where a pad 31 is formed are arranged so that the stud bump 52a is confronted with the pad 31 via a thermoplastic resin film 22b. A thermoplastic resin film 22c in which a via hole is filled with conductive paste is disposed so that electrodes 51b and 51c are confronted with conductive paste on an electrode forming face-side where the electrodes 51b and 51c in the semiconductor chip 50 are formed. In a pressurizing/heating process, the electrode 51a is bonded to the stud bump 52a and the stud bump 52a to the pad 31 by solid-phase diffusion bonding, and the electrodes 51b and 51c are bonded to the conductive paste in the thermosetting resin film 21b by liquid-phase diffusion bonding.
摘要翻译：要解决的问题：提供一种包含半导体芯片的布线板的制造方法，用于简化制造工艺并抑制对半导体芯片的应力。解决方案：在电极51a中安装柱形凸块52a的半导体芯片50和形成有焊盘31的热固性树脂膜21b被布置成使得螺柱凸块52a经由热塑性树脂面对焊盘31 薄膜22b。其中通孔填充有导电膏的热塑性树脂膜22c被设置成电极51b和51c在形成半导体芯片50中的电极51b和51c的电极形成面侧面上与导电浆料相对。在加压/加热过程中，通过固相扩散接合将电极51a接合到凸块凸起52a和凸块52a到焊盘31，并且电极51b和51c与热固性树脂膜中的导电膏接合 21b通过液相扩散接合。版权所有（C）2012，JPO＆INPIT

3. 发明专利

JP2011159702A Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2011159702A
公开(公告)日：2011-08-18
申请号：JP2010018471
申请日：2010-01-29
申请人： Denso Corp , 株式会社デンソー
发明人： INABA SHIGENOBU , HARADA YOSHIHARU , MAEDA YUKIHIRO , OTA SHINJI
IPC分类号： H01L23/12 , H01L21/56 , H01L23/40
CPC分类号： H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2924/15151 , H01L2924/15311 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To prevent occurrence of void in an underfill as much as possible with respect to a semiconductor device constituted so that a semiconductor element is mounted on a substrate via a bump, a heat sink is provided on a substrate side of the semiconductor element, and the underfill is charged between the semiconductor element and substrate. SOLUTION: The semiconductor device is constituted so that the semiconductor element 20 is mounted on the substrate 10 via the bump 30, the heat sink 40 is provided on one surface on the side of the substrate 10 of the semiconductor element 20, and the underfill 60 is charged between the one surface of the semiconductor element 20 and the substrate 10. The semiconductor device is provided with a through hole 11 penetrating the substrate 10 from the one surface to the other surface, and the heat sink 40 is inserted into the through hole 11 with a gap left with an inner surface of the through hole 11 and protruded from the other surface of the substrate 10. The gap between the heat sink 40 and the inner surface of the through hole 11 is used as an injection hole 12 for injecting the underfill 60, which is charged between the substrate 10 and semiconductor element 20 through the injection hole 12. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题为了防止在相对于通过凸块将半导体元件安装在基板上构成的半导体器件尽可能多地发生底部填充物的空隙，散热器设置在基板侧的半导体元件，并且底部填充物被充电在半导体元件和衬底之间。解决方案：半导体器件被构造成使得半导体元件20经由凸块30安装在基板10上，散热器40设置在半导体元件20的基板10侧的一个表面上，以及将底部填充物60填充在半导体元件20的一个表面和基板10之间。半导体器件设置有从一个表面到另一个表面穿透基板10的通孔11，并且将散热器40插入通孔11具有留下通孔11的内表面并从基板10的另一个表面突出的间隙。散热器40与通孔11的内表面之间的间隙用作注入孔用于注入底部填充物60，其通过注射孔12填充在基板10和半导体元件20之间。版权所有（C）2011，JPO＆INPIT

4. 发明专利

JP2010283252A Semiconductor device and method of manufacturing the same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2010283252A
公开(公告)日：2010-12-16
申请号：JP2009136905
申请日：2009-06-08
申请人： Denso Corp , 株式会社デンソー
发明人： INABA SHIGENOBU , MAEDA YUKIHIRO , OTA SHINJI
IPC分类号： H01L23/50
CPC分类号： H01L2224/05554 , H01L2224/48 , H01L2224/48091 , H01L2224/48247 , H01L2224/48248 , H01L2224/48249 , H01L2224/48465 , H01L2224/48471 , H01L2224/49 , H01L2224/4909 , H01L2224/49171 , H01L2224/4945 , H01L2224/85385 , H01L2924/181 , H01L2924/18301 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To appropriately prevent disconnections of wires due to peeling of a lead from a molding resin, in a semiconductor device formed by connecting a semiconductor element mounted on a die pad and the lead with wires and then sealing with the molding resin. SOLUTION: In a portion of the lead 30 located inside the molding resin 50, a region of the lead 30 where the wires 40 are connected is a projection 32, that has a step and projects from the top face 31 of one side and the other side of the region of the lead 30 where the wires 40 are connected, and the wires 40 are connected to a projecting face 33, that is the top face of the projection 32, and a step surface 34 of the projection 32 is formed tilting toward the top face 31 so as to cover the portions of the top face 31 adjacent to the projection 32. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：为了适当地防止由于模制树脂引起的铅的剥离导致的电线断开，在通过将安装在芯片焊盘上的半导体元件和引线与导线连接而形成的半导体器件中，然后与成型树脂。解决方案：在位于模制树脂50内部的引线30的一部分中，导线40连接的引线30的区域是突起32，突出部32具有从一侧的顶面31突出的台阶引线30的与导线40连接的区域的另一侧，导线40连接到作为突起32的顶面的突出面33，突起32的台阶面34 形成为朝向顶面31倾斜以覆盖与突起32相邻的顶面31的部分。（C）2011年，JPO和INPIT

5. 发明专利

JP2009049309A Electronic device and method of manufacturing the same 有权
标题翻译：电子设备及其制造方法
公开(公告)号：JP2009049309A
公开(公告)日：2009-03-05
申请号：JP2007216148
申请日：2007-08-22
申请人： Denso Corp , 株式会社デンソー
发明人： IMADA SHINJI , MAEDA YUKIHIRO , KASUGAI HIROSHI , KOBAYASHI WATARU
IPC分类号： H01L21/60 , H01L25/04 , H01L25/18
CPC分类号： H01L24/73 , H01L2224/32225 , H01L2224/45 , H01L2224/45124 , H01L2224/45144 , H01L2224/48 , H01L2224/48091 , H01L2224/48225 , H01L2224/48227 , H01L2224/48463 , H01L2224/48472 , H01L2224/48599 , H01L2224/48699 , H01L2224/73265 , H01L2224/85009 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , H01L2924/15787 , H01L2924/19041 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide a structure of an electronic device having lands with gold-plated surfaces to which an aluminum wire and a gold wire are connected, in which the structure is adapted to thicken the thickness of the gold plate of the land for a gold wire without changing the thickness of the gold plate of the land for an aluminum wire. SOLUTION: One land for a gold wire 12 forms an assembly of divisions 12a which are set up by dividing the land into a plurality of regions and to which a single gold wire 32 is connected straddling over the plurality of divisions 12a. The areas of individual divisions 12a are sized smaller than the area of a single land for an aluminum wire 11. The gold plates 10c in the individual divisions 12a are set thicker than the gold plate 10c in the land for an aluminum wire 11. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种电子设备的结构，该电子设备具有连接有铝线和金线的镀金表面的平台，其中该结构适于增加金板的厚度用于金线的土地，而不改变铝线的土地的金板的厚度。解决方案：用于金线12的一个焊盘形成通过将焊盘划分为多个区域而设置的部分组合12a，并且单个金线32跨过多个部分12a跨接在该组合上。单个部分12a的面积的尺寸小于铝线11的单个区域的面积。各个部分12a中的金板10c被设定为比铝线11的焊盘中的金板10c厚。
版权所有（C）2009，JPO＆INPIT

6. 发明专利

JP2007129175A Method for manufacturing electronic device 有权
标题翻译：制造电子器件的方法
公开(公告)号：JP2007129175A
公开(公告)日：2007-05-24
申请号：JP2006002695
申请日：2006-01-10
申请人： Denso Corp , 株式会社デンソー
发明人： FUKUDA YUTAKA , SAITO MITSUHIRO , NAGATANI TOSHIHIRO , MAEDA YUKIHIRO , IMAIZUMI NORIHISA , ASAI YASUTOMI
IPC分类号： H01L21/56 , H01L23/28 , H01L23/29
CPC分类号： H01L2224/32225 , H01L2224/48095 , H01L2224/48227 , H01L2224/73265 , H01L2924/13055 , H01L2924/13091 , H01L2924/181 , H01L2924/19105 , H01L2924/19107 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To realize the integration of three kinds of parts before sealing them by a molding resin without caulking and fixing, when different kinds of electronic elements are each mounted on a wiring substrate and heat sinks, and these are sealed together with a lead frame by the molding resin. SOLUTION: In a method for manufacturing the electronic device, first electronic elements 11 to 14 are mounted on one surface of the wiring substrate, second electronic elements 21 to 24 are mounted on each one surface of heat sinks 41, 42, the lead frame 420 is disposed around the wiring substrate 30, and both electronic elements 11 to 14 and 21 to 24, the substrate 30, and the frame 420 are electrically connected. Thereafter, these components are sealed by the molding resin 70. After the other side of the wiring substrate 30, the other sides of the heat sinks 41, 42, and the frame 420 are integrated by being affixed to a common tape member 400; sealing is performed on them by the resin 70, and the member 400 is then exfoliated. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了在通过模制树脂进行密封之前实现三种部件的集成而不用铆接和固定，当不同种类的电子元件分别安装在布线基板和散热片上时，这些部件被密封以及通过模制树脂的引线框架。解决方案：在制造电子设备的方法中，第一电子元件11至14安装在布线基板的一个表面上，第二电子元件21至24安装在散热器41,42的每个表面上，引线框架420布置在布线基板30周围，电子元件11至14和21至24，基板30和框架420电连接。此后，这些部件被模制树脂70密封。在布线基板30的另一侧之后，散热器41,42和框架420的另一侧通过固定在共同的带部件400上而一体化; 通过树脂70对其进行密封，然后将构件400剥离。版权所有（C）2007，JPO＆INPIT

7. 发明专利

JP2006100468A Manufacturing method of wiring board 有权
标题翻译：接线板制造方法
公开(公告)号：JP2006100468A
公开(公告)日：2006-04-13
申请号：JP2004283218
申请日：2004-09-29
申请人： Denso Corp , 株式会社デンソー
发明人： MAEDA YUKIHIRO
IPC分类号： H05K3/08 , H01L23/12
CPC分类号： H01L2224/48091 , H01L2224/48227 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To suitably realize multi-pin bonding lands and a smaller pitch thereof in the manufacturing method of a wiring board wherein a conductor component is printed on a substrate and hardened to form a plurality of bonding lands. SOLUTION: In the manufacturing method of the wiring board 10 wherein the conductor component 18a is printed on a green sheet 11a as the substrate and hardened to form the plurality of bonding lands 18, the conductor component 18a is printed in the formation regions of individual bonding lands 18, and at the same time the conductor component 18a is printed so that the spaces between the formation regions are filled with the conductor component 18a, and the formation regions are continuously connected by the conductor component 18a between them. After this printed conductor component 18a is hardened, each portion of hardened conductor component 18a located between the formation regions is removed by burning it off with a laser. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：在布线板的制造方法中适当地实现多引脚接合焊盘和更小的间距，其中将导体部件印刷在基板上并硬化以形成多个接合台面。解决方案：在其中将导体部件18a印刷在作为基板的生片11a上并硬化以形成多个接合台面18的布线板10的制造方法中，导体部件18a印刷在形成区域中并且同时印刷导体部件18a，使得形成区域之间的空间被导体部件18a填充，并且形成区域之间由导体部件18a连续地连接。在该印刷导体部件18a被硬化之后，通过用激光烧掉来去除位于形成区域之间的硬化导体部件18a的每个部分。版权所有（C）2006，JPO＆NCIPI

8. 发明专利

JP2005228928A Method of manufacturing substrate 有权
标题翻译：制造基板的方法
公开(公告)号：JP2005228928A
公开(公告)日：2005-08-25
申请号：JP2004036440
申请日：2004-02-13
申请人： Denso Corp , 株式会社デンソー
发明人： NAKANO TETSUO , OTANI YUJI , MAEDA YUKIHIRO
IPC分类号： H05K3/20 , H01L23/12
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing substrate by which the contamination of the surfaces to be bonded of pads can be prevented appropriately even when no contaminant cleaning step is performed at the time of manufacturing a substrate having a plurality of pads joined to its one surface through solder.
SOLUTION: After an integrated member 410 constituted by covering the surfaces to be bonded of the plurality of pads 10 with a removable strip mask 400 is formed, the integrated member 410 is mounted on one surface of the substrate 100 so that the pads 10 may come into contact with the substrate 100 through solder 20, in a state where the pads 10 are faced to the surface of the substrate 100. Then, after the pads 10 are soldered to the surface of the substrate 100 by reflowing the solder 20, the strip mask 400 is removed from the pads 10.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种制造基板的方法，即使在制造具有多个基板的基板时也不会适当地防止焊盘表面的污染，即使不进行污染物清洁步骤焊盘通过焊料连接到其一个表面。解决方案：在通过用可移除的带状掩模400覆盖多个焊盘10的待粘合表面构成的集成部件410之后，集成部件410安装在基板100的一个表面上，使得焊盘 10可以在焊盘10面向基板100的表面的状态下通过焊料20与基板100接触。然后，在通过回流焊料20将焊盘10焊接到基板100的表面之后，剥离掩模400从垫10中移除。版权所有（C）2005，JPO＆NCIPI

9. 发明专利

JP2003059962A Electronic equipment 有权
标题翻译：电子设备
公开(公告)号：JP2003059962A
公开(公告)日：2003-02-28
申请号：JP2002009817
申请日：2002-01-18
申请人： Denso Corp , 株式会社デンソー
发明人： NAKANO TETSUO , ASAI YASUTOMI , MAEDA YUKIHIRO , NAGASAKA TAKASHI
IPC分类号： C04B41/88 , H01L21/60 , H01L23/498 , H01L23/538 , H05K3/24 , H05K3/32
CPC分类号： H05K3/244 , H01L23/49811 , H01L23/538 , H01L24/05 , H01L24/45 , H01L24/48 , H01L2224/04042 , H01L2224/05147 , H01L2224/05599 , H01L2224/05644 , H01L2224/32225 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48644 , H01L2224/48647 , H01L2224/48699 , H01L2224/48747 , H01L2224/73265 , H01L2224/85444 , H01L2224/85447 , H01L2224/92 , H01L2224/92247 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , H01L2924/15787 , H01L2924/19041 , H01L2924/19105 , H05K3/245 , H05K3/328 , Y10T428/12493 , Y10T428/12514 , Y10T428/24917 , H01L2924/00014 , H01L2924/00 , H01L2224/48744
摘要： PROBLEM TO BE SOLVED: To prevent oxidation in a pad, and at the same time to improve the junction properties between an Al wire and the pad in electronic equipment where a wire made of Al is connected to at least one pad out of a plurality of pads that are formed on at least one surface of a substrate. SOLUTION: An IC chip 55 is connected to a pad 23 by an Al wire 61 made of Al electrically. In the pad 23, an Au-plated layer 23c as the outermost surface layer is provided on a Cu-plated layer 21b as foundation, and the thickness of the Au-plated layer 23 is less than 0.5 μm.
摘要翻译：要解决的问题：为了防止焊盘中的氧化，并且同时改善电线设备中的Al线和焊盘之间的接合特性，其中由Al制成的线连接到多个焊盘中的至少一个焊盘衬底形成在衬底的至少一个表面上。解决方案：IC芯片55通过由Al制成的Al线61连接到焊盘23。在焊盘23中，在作为基础的Cu镀层21b上设置作为最外表面层的镀金层23c，并且镀金层23的厚度小于0.5μm。

10. 发明专利

JP2010080572A Electronic equipment 审中-公开
标题翻译：电子设备
公开(公告)号：JP2010080572A
公开(公告)日：2010-04-08
申请号：JP2008245348
申请日：2008-09-25
申请人： Denso Corp , 株式会社デンソー
发明人： KUNIEDA HIROYOSHI , OTA SHINJI , HIROSE SHINICHI , INABA SHIGENOBU , MAEDA YUKIHIRO
IPC分类号： H05K3/46 , H05K1/02
CPC分类号： H01L2224/16225 , H01L2924/15311
摘要： PROBLEM TO BE SOLVED: To appropriately dissipate heat from a heating element without incorporating a thicker heat sink, compared with individual layers of a multilayer substrate in the multilayer substrate, in electronic equipment configured such that the heating element is provided on one surface of the multilayer substrate. SOLUTION: Electronic equipment is equipped with: a multilayer substrate 10 made by stacking a plurality of layers 1 to 6; and a heating element 20 provided on one surface 11 of the multilayer substrate 10. A heat diffusion layer 15, which has a thermal conductivity and consists of a graphite sheet or the like thinner than the individual layers 1 to 6, is provided between adjacent layers 1 to 6 inside the multilayer substrate 10. Inside the multilayer substrate 10, heat dissipation vias 14 are extended in the stacking direction of the layers 1 to 6 to thermally connect the heating element 20 and the heat diffusion layers 15. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：为了适当地从加热元件散热而不加入较厚的散热器，与多层基板中的多层基板的各层相比，在电子设备中，使得加热元件设置在一个表面上的多层基板。解决方案：电子设备配备有：通过堆叠多个层1至6而制成的多层基板10; 以及设置在多层基板10的一个表面11上的加热元件20.在相邻层之间设置有具有导热性并由石墨片等构成的散热层15，其比单层1-6更薄。在多层基板10的内部，多层基板10内的散热通路14沿层1〜6的层叠方向延伸，热连接加热元件20和热扩散层15。（C）2010，JPO＆INPIT

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