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1. 发明专利

JP2009283695A Stacked electronic component 审中-公开
标题翻译：堆叠电子元件
公开(公告)号：JP2009283695A
公开(公告)日：2009-12-03
申请号：JP2008134436
申请日：2008-05-22
申请人： Alps Electric Co Ltd , アルプス電気株式会社
发明人： UENO SHINJI , NAKAJIMA SUSUMU , MIURA HISAO , TATSUMI OSAMU
IPC分类号： H01F17/00 , H01F41/04
摘要： PROBLEM TO BE SOLVED: To provide a stacked electronic component easy to manufacture.
SOLUTION: A stacked electronic component 1A includes a plurality of stacked ceramic sheets 2A1 and 2A2 and a conductive pattern 4A. Each of the plurality of ceramic sheets 2A1 and 2A2 has one or more linear grooves 3A1 to 3A8, and these linear grooves are filled with linear conductive members 5A1 to 5A8 constituting a conductive pattern 4C. The linear grooves 3A1 to 3A8 are arranged in parallel in one layer and orthogonally to the linear grooves 3A1 to 3A8 in an adjacent upper or lower layer. The conductive members 5A1 to 5A8 are partially connected to the conductive members 5A1 to 5A8 in the upper or lower layer.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供容易制造的层叠电子部件。解决方案：层叠电子部件1A包括多个堆叠的陶瓷片2A1和2A2以及导电图案4A。多个陶瓷片2A1和2A2中的每一个具有一个或多个线性槽3A1至3A8，并且这些线状槽填充有构成导电图案4C的线性导电构件5A1至5A8。线性槽3A1〜3A8与相邻的上层或下层的线状槽3A1〜3A8平行地一体地配置，导电构件5A1至5A8部分地连接到上层或下层中的导电构件5A1至5A8。版权所有（C）2010，JPO＆INPIT

2. 发明专利

JP2009064909A Multilayer ceramic wiring board, and method of manufacturing the same 审中-公开
标题翻译：多层陶瓷接线板及其制造方法
公开(公告)号：JP2009064909A
公开(公告)日：2009-03-26
申请号：JP2007230447
申请日：2007-09-05
申请人： Alps Electric Co Ltd , アルプス電気株式会社
发明人： MIURA HISAO , MURATA SHINJI
IPC分类号： H05K3/46 , H05K1/02
CPC分类号： H05K3/4007 , H01L21/4807 , H01L23/15 , H01L23/49811 , H01L23/49822 , H01L23/49827 , H01L2224/16225 , H01L2924/0102 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/3025 , H05K1/0271 , H05K1/0306 , H05K1/111 , H05K3/0014 , H05K3/4611 , H05K3/4629 , H05K2201/0195 , H05K2201/0367 , H05K2201/09045 , H05K2201/09781 , H05K2201/2009
摘要： PROBLEM TO BE SOLVED: To provide a multilayer ceramic wiring board having a protruding part smoothly protruding and high in flatness; and a method of manufacturing the same. SOLUTION: In this multilayer ceramic wiring board 1, one or two or more lifting boards 5 each formed into a planar shape are disposed in an inner layer of a plurality of stacked ceramic wiring boards 2 or a lower layer thereof lower than a ceramic wiring board 2F of the lowest layer. Thereby, a wide protruding portion 6 smoothly protruding and high in flatness is formed on a surface 2Aa of the multilayer ceramic wiring board 1. The multilayer ceramic wiring board 1 is formed by disposing the lifting boards in the inner layer of a plurality of green sheets or a lower layer lower than the lowest layer thereof, and firing under pressure the resulting laminate in a state constrained by an elastic constraining plate and a rigid constraining plate. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种具有平坦突出并且平坦度高的突出部分的多层陶瓷布线板; 及其制造方法。解决方案：在这种多层陶瓷布线板1中，每个形成为平面形状的一个或两个或更多个提升板5设置在多个层叠的陶瓷布线板2或其下层中的低于最低层陶瓷接线板2F。由此，在多层陶瓷配线基板1的表面2Aa上形成平滑地突出并且平坦度高的宽的突出部6。多层陶瓷布线板1通过将提升板设置在多个生片的内层或低于其最低层的下层，并且在受到弹性约束板和刚性约束板约束的状态下在压力下烧结所得到的层压体。版权所有（C）2009，JPO＆INPIT

3. 发明专利

JP2007128962A Multilayer wiring board and method of manufacturing same 审中-公开
标题翻译：多层接线板及其制造方法
公开(公告)号：JP2007128962A
公开(公告)日：2007-05-24
申请号：JP2005318385
申请日：2005-11-01
申请人： Alps Electric Co Ltd , アルプス電気株式会社
发明人： MIURA HISAO
IPC分类号： H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a multilayer wiring board which has highly precise resistance value of a resistor and does not need trimming, and to provide the method of manufacturing the wiring board. SOLUTION: In the multilayer wiring board, a wiring pattern 5 is arranged in one ceramic sheet 2b positioned between laminated layers of a laminated substrate 1, and the resistor 6 is disposed in the other ceramic sheet 2c positioned between the laminated layers. Since the ceramic sheets 2b and 2c are laminated and the resistor 6 is connected to the wiring pattern 5, the resistor 6 can be formed on the flat ceramic sheet 2c where the wiring pattern 5 does not exist. Thereby, a blot by the wiring pattern 5 is eliminated, and the wiring board can be obtained with sufficient precision of the resistance value and without need of trimming. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：解决的问题：提供具有电阻器的高精度电阻值并且不需要修整的多层布线板，并提供制造布线板的方法。解决方案：在多层布线板中，布线图案5布置在位于层叠基板1的层叠层之间的一个陶瓷片2b中，电阻6设置在位于层叠层之间的另一陶瓷片2c中。由于陶瓷片2b和2c被层压并且电阻器6连接到布线图案5，所以电阻器6可以形成在不存在布线图案5的平坦陶瓷片2c上。由此，消除了布线图案5的印迹，可以以足够的电阻值精度获得布线基板，而无需修整。版权所有（C）2007，JPO＆INPIT

4. 发明专利

JP2006147913A Circuit board and its manufacturing method 审中-公开
标题翻译：电路板及其制造方法
公开(公告)号：JP2006147913A
公开(公告)日：2006-06-08
申请号：JP2004337264
申请日：2004-11-22
申请人： Alps Electric Co Ltd , アルプス電気株式会社
发明人： MIURA HISAO
IPC分类号： H05K1/16 , H01L23/12 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide an inexpensive circuit board with sufficient productivity in which a resistor is easily trimmed, and also to provide the manufacturing method of the board.
SOLUTION: The circuit board is provided with a multilayer substrate 1 formed of a plurality of ceramic insulating layers 2, wiring patterns 3 installed in the multilayer substrate 1, and resistors 5a and 5b arranged in lamination of the multilayer substrate 1. Holes 1b are made in positions confronted with the resistors 5a and 5b in the insulating layer 2 forming the multilayer substrate 1. The resistors 5a and 5b can be trimmed through the holes 1b. Thus, the resistors 5a and 5b can be trimmed after the multilayer substrate 1 is formed. The multilayer substrate 1, the wiring patterns 3 and the resistors 5a and 5b can easily be manufactured compared to a conventional case, productivity is sufficient, cost is inexpensive and trimming is realized through the holes 1b. Thus, the resistor is easily trimmed without deleting the insulating layer 2.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种廉价的电路板，其具有足够的生产率，其中电阻器易于修整，并且还提供了电路板的制造方法。解决方案：电路板设置有由多个陶瓷绝缘层2，安装在多层基板1中的布线图案3以及布置成多层基板1层叠的电阻器5a和5b形成的多层基板1。 1b形成在形成多层基板1的绝缘层2中与电阻器5a和5b相对的位置。电阻器5a和5b可以通过孔1b进行修整。因此，可以在形成多层基板1之后修整电阻5a和5b。与以往的情况相比，能够容易地制造多层基板1，布线图案3和电阻体5a，5b，生产率足够，成本低廉，通过孔1b实现修整。因此，电阻器容易修整而不删除绝缘层2.版权所有（C）2006，JPO＆NCIPI

5. 发明专利

JP2012151188A Multilayer wiring board 审中-公开
标题翻译：多层接线板
公开(公告)号：JP2012151188A
公开(公告)日：2012-08-09
申请号：JP2011007325
申请日：2011-01-17
申请人： Alps Electric Co Ltd , アルプス電気株式会社
发明人： MIURA HISAO , NAKAJIMA SUSUMU , UENO SHINJI , MATSUURA YOSHIAKI
IPC分类号： H05K3/46
摘要： PROBLEM TO BE SOLVED: To solve the problem occurring in the past technology of a multilayer wiring board on which a light-emitting element is mounted, such that it is highly likely to generate cracks in the multilayer wiring board because a flexural strength becomes smaller when a material of high reflectance is selected as a surface insulation layer.SOLUTION: A multilayer wiring board comprises a laminate in which a plurality of insulation layers are laminated, a plurality of conductive vias provided in the laminate, a mount part formed on one principal surface side of the laminate, on which a light-emitting element is mounted, and a wiring part formed on the other principal surface side of the laminate. A surface insulation layer on the one principal surface side of the laminate and a rear face insulation layer on the other principal surface side of the laminate are the insulation layers of the same material. And at least one among inner layers of the laminate is an inner insulation layer and each of the surface insulation layer and the rear face insulation layer has a larger flexural strength than the inner insulation layer.
摘要翻译：要解决的问题为了解决安装有发光元件的多层布线板的以往技术中发生的问题，因为其很可能在多层布线板中产生裂纹，因为弯曲强度当选择高反射率的材料作为表面绝缘层时，其变小。解决方案：多层布线板包括其中层叠多个绝缘层的层叠体，设置在层压体中的多个导电通孔，形成在层压体的一个主表面侧上的安装部分，安装发光元件，形成在层叠体的另一主面侧的配线部。层叠体的一个主面侧的表面绝缘层和层叠体的另一个主面侧的背面绝缘层是相同材料的绝缘层。并且层压体的内层中的至少一层是内绝缘层，并且表面绝缘层和背面绝缘层中的每一个具有比内绝缘层更大的弯曲强度。版权所有（C）2012，JPO＆INPIT

6. 发明专利

JP2010219231A Composite interconnection substrate 审中-公开
标题翻译：复合互连基板
公开(公告)号：JP2010219231A
公开(公告)日：2010-09-30
申请号：JP2009063212
申请日：2009-03-16
申请人： Alps Electric Co Ltd , アルプス電気株式会社
发明人： MIURA HISAO , MIYAURA MASAO
IPC分类号： H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a composite interconnection substrate capable of thinning its size, improving heat radiation efficiency of mounted ICs, and eliminating risks of disconnection and various problems. SOLUTION: On a composite interconnection substrate 1, inserting a convex part 3a of a ceramic circuit board 3 into a through-hole 2a of a resin circuit board 2 and soldering a first electrode 4 formed at a shoulder part 3b of the ceramic circuit board 3 and a second electrode 8 formed at the peripheral border 2b of the through-hole 2a of the resin circuit board 2 connect the resin circuit board 2 and the ceramic circuit board 3. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供能够使其尺寸变薄，提高安装的IC的散热效率以及消除断开的风险和各种问题的复合互连基板。解决方案：在复合互连基板1上，将陶瓷电路板3的凸部3a插入到树脂电路板2的通孔2a中，并焊接形成在陶瓷的胎肩部3b的第一电极4 电路板3和形成在树脂电路板2的通孔2a的外围边缘2b的第二电极8连接树脂电路板2和陶瓷电路板3.版权所有（C）2010，JPO＆INPIT

7. 发明专利

JP2009188096A Manufacturing method for ceramic laminated wiring board 审中-公开
标题翻译：陶瓷层压板的制造方法
公开(公告)号：JP2009188096A
公开(公告)日：2009-08-20
申请号：JP2008025085
申请日：2008-02-05
申请人： Alps Electric Co Ltd , アルプス電気株式会社
发明人： MIURA HISAO
IPC分类号： H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method for a ceramic laminated wiring board that allows precise formation of a ceramic laminated wiring board, having a protruding part or a recessed part with a desired height or depth, without deteriorating surface strength of the ceramic laminated wiring board.
SOLUTION: The manufacturing method for a ceramic laminated wiring board 1 is configured as follows. Resin films 12, 13 respectively have the same shape as that of the surface 1a or the rear face 1b of a ceramic wiring board 1 newly exposed by formation of a protruding part 2 or a recessed part 3. At first, the resin films are respectively sandwiched between a plurality of ceramic green sheets 11 so as to press bond them. If the ceramic green sheets 11 are cut in the lamination direction along the peripheral edge of the protruding part 2 or the recessed part 3 formed on or in the press bonded green sheet laminated wiring board 10, it is possible to easily remove the cut ceramic green sheets 11 together with the resin films 12, 13.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种能够精确地形成陶瓷层叠布线板的陶瓷层叠布线板的制造方法，其具有具有期望的高度或深度的突出部分或凹部，而不会降低表面强度陶瓷层压布线板。＆lt; P＆gt;解决方案：陶瓷层叠电路板1的制造方法如下。树脂膜12,13分别具有与通过形成突出部2或凹部3新露出的陶瓷布线基板1的表面1a或背面1b相同的形状。首先，树脂膜分别夹在多个陶瓷生片11之间，以便压合它们。如果陶瓷生片11沿着突出部2的周缘或形成在压接的生片叠层电路板10上或其中的凹部3的层叠方向切断，则可以容易地除去切割的陶瓷绿片材11与树脂膜12,13一起。版权所有（C）2009，JPO＆INPIT

8. 发明专利

JP2006147912A Thick film resistance element and its manufacturing method 审中-公开
标题翻译：厚膜电阻元件及其制造方法
公开(公告)号：JP2006147912A
公开(公告)日：2006-06-08
申请号：JP2004337262
申请日：2004-11-22
申请人： Alps Electric Co Ltd , アルプス電気株式会社
发明人： MIURA HISAO
IPC分类号： H05K1/16
摘要： PROBLEM TO BE SOLVED: To provide a thick film resistance element where a crack does not occur and a resistor and an electrode are certainly connected, and also to provide the manufacturing method of the element.
SOLUTION: The thick film resistance element is provided with a calcined ceramic substrate 1, the resistor 2 buried in the ceramic substrate 1 in a state where a surface is exposed, and the electrodes 3 formed on the ceramic substrate 1 in a state where they are connected to the resistor 2. The surface of the resistor 2 is formed in a flush state with the surface of the ceramic substrate 1. The electrodes 3 are formed on the ceramic substrate 1 and the resistor 2. Thus, the electrodes 3 are formed on the ceramic substrate 1 and the resistor 2 in the flush state. Consequently, the electrodes 3, can be connected to the resistor 2 without a level difference, the crack does not occur in the electrodes 3, and the electrodes 3 and the connector 2 are securely connected.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了提供不发生裂纹的厚膜电阻元件，并且电阻器和电极确实连接，并且还提供元件的制造方法。解决方案：厚膜电阻元件设置有煅烧陶瓷基板1，在暴露表面的状态下埋入陶瓷基板1中的电阻器2，并且在状态下形成在陶瓷基板1上的电极3 其中它们连接到电阻器2.电阻器2的表面形成为与陶瓷基板1的表面齐平的状态。电极3形成在陶瓷基板1和电阻器2上。因此，电极3 形成在陶瓷基板1和处于冲洗状态的电阻器2上。因此，可以将电极3连接到电阻器2而没有电平差，电极3中不会发生裂纹，电极3和连接器2牢固地连接。版权所有（C）2006，JPO＆NCIPI

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