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    • 2. 发明专利
    • Semiconductor device, and manufacturing method thereof
    • 半导体器件及其制造方法
    • JP2010171253A
    • 2010-08-05
    • JP2009013140
    • 2009-01-23
    • Toshiba Corp株式会社東芝
    • YAMAYORI YUKUGIMIYA TETSUYAHIROHATA KENJI
    • H01L21/60
    • H01L2224/11
    • PROBLEM TO BE SOLVED: To provide a semiconductor device which is high in reliability by reducing stress concentration due to singularity of an end of an interface between an under-bump metal layer and an insulating film at a junction part between a semiconductor chip and a package substrate, and to provide a manufacturing method thereof. SOLUTION: The semiconductor device includes: a semiconductor chip 20 having a plurality of electrode pads 23 for semiconductor formed on a surface of a multilayer wiring layer 22 on a semiconductor substrate 21, an insulating film 24 having openings wherein the electrode pads 23 are exposed, and a plurality of under-bump metal layers 25 formed from on the electrode pads 23 to regions reaching the insulating film 24 nearby the openings corresponding to the pads 23; and a substrate 31 having solder bumps 26 formed on the under-bump metal layer 25 and a plurality of electrode pads 32 for substrate formed at the electrode pads 23, the solder bumps 26 being joined to the electrode pads 32 for substrate. A groove 27 having a cavity inside is formed in the insulating film 24 to be right below an end of the under-bump metal layer 25. COPYRIGHT: (C)2010,JPO&INPIT
    • 要解决的问题:提供一种半导体器件,其通过在半导体芯片之间的接合部分处减小由凸块状金属层和绝缘膜之间的界面的端部的奇异性引起的应力集中,从而可靠性高 和封装基板,并提供其制造方法。 解决方案:半导体器件包括:具有形成在半导体衬底21上的多层布线层22的表面上的多个用于半导体的电极焊盘23的半导体芯片20,具有开口的绝缘膜24,其中电极焊盘23 以及从电极焊盘23形成的多个凸块下金属层25到达与焊盘23对应的开口附近的到达绝缘膜24的区域; 以及形成在凸块状金属层25上的焊料凸块26和形成在电极焊盘23上的多个用于基板的电极焊盘32的基板31,焊料凸点26与基板用电极焊盘32接合。 在绝缘膜24内形成有内腔的凹槽27,其正好位于凸块下金属层25的正下方。版权所有:(C)2010,JPO&INPIT
    • 3. 发明专利
    • Semiconductor device, life estimation device and life estimation method
    • 半导体器件,寿命估计器件和寿命估算方法
    • JP2014072460A
    • 2014-04-21
    • JP2012218786
    • 2012-09-28
    • Toshiba Corp株式会社東芝
    • YAMAYORI YUHIROHATA KENJI
    • H01L21/60H01L25/065H01L25/07H01L25/18
    • G01R31/31924G01R31/318513H01L2224/16145
    • PROBLEM TO BE SOLVED: To provide a semiconductor device, a life estimation device and a life estimation method, which can detect cracks occurring at a bump in an early stage.SOLUTION: A semiconductor device of an embodiment comprises: a plurality of semiconductor chips laminated above a circuit board; a first bump and a second bump arranged at a distance from a peripheral part of the semiconductor chip farther than the first bump, which are provided in any of gaps between the circuit board and the semiconductor chips and a gap between two semiconductor chips; a third bump provided in any gap different from the gaps where the first bump and the second bump are provided; a fourth bump arranged at a distance from the peripheral part of the semiconductor chip farther than the third bump; a first detection part for detecting a breakage of the first bump and creating a first signal indicating the breakage of the first bump; and a second detection part for detecting a breakage of the third bump and creating a second signal indicating the breakage of the third bump.
    • 要解决的问题:提供一种半导体器件,寿命估计器件和寿命估计方法,其可以在早期阶段检测在凸点处发生的裂纹。解决方案:一个实施例的半导体器件包括:多个半导体芯片层压 电路板上方 设置在比所述第一凸块更远的所述半导体芯片的周边部分的距离处设置在所述电路板和所述半导体芯片之间的间隙中的第一凸块和第二凸块以及两个半导体芯片之间的间隙; 设置在与设置有第一凸起和第二凸起的间隙不同的任何间隙中的第三凸起; 第四凸起,其布置在比所述第三凸起更远离所述半导体芯片的周边部分的距离处; 第一检测部分,用于检测第一凸起的断裂并产生指示第一凸起断裂的第一信号; 以及第二检测部,用于检测第三凸起的断裂并产生指示第三凸起的断裂的第二信号。