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    • 2. 发明专利
    • Systems and methods for obtaining and using nonvolatile memory health information
    • 用于获取和使用非易失性记忆健康信息的系统和方法
    • JP2013097789A
    • 2013-05-20
    • JP2012230293
    • 2012-09-28
    • Apple Incアップル インコーポレイテッド
    • NICHOLAS SEROVANTHONY FAINIR JACOB WAKRAT
    • G06F12/16
    • G06F3/0614G06F3/064G06F3/0679G06F11/3034G06F11/3055G06F11/3409G06F11/3485
    • PROBLEM TO BE SOLVED: To provide systems and methods for obtaining and using nonvolatile memory ("NVM") health information.SOLUTION: Health information can include a variety of information associated with the performance and reliability of portions of an NVM device, such as the number of errors detected in a portion of NVM or the amount of time required to read from a portion of nonvolatile memory or program the portion of nonvolatile memory. During operation, address specific health information may be stored passively on a host device and provided as part of a command to a memory controller. The memory controller may extract the health information from the command and use the information to execute access requests. After an access request is completed, the memory controller can update the health information and transmit the information back to the host device.
    • 要解决的问题:提供获取和使用非易失性存储器(“NVM”)健康信息的系统和方法。

      解决方案:健康信息可以包括与NVM设备的部分的性能和可靠性相关的各种信息,例如在NVM的一部分中检测到的错误的数量或从一部分的NVM中读取的时间量 非易失性存储器或非易失性存储器的部分编程。 在操作期间,地址特定的健康信息可以在主机设备上被动存储并作为命令的一部分提供给存储器控制器。 存储器控制器可以从命令中提取健康信息并使用该信息来执行访问请求。 在访问请求完成之后,存储器控制器可以更新健康信息并将信息发送回主机设备。 版权所有(C)2013,JPO&INPIT

    • 3. 发明专利
    • Booting memory device from host
    • 从主机触发存储器设备
    • JP2013016182A
    • 2013-01-24
    • JP2012160952
    • 2012-07-02
    • Apple Incアップル インコーポレイテッド
    • ANTHONY FAINEAR JACOB WACRATNICHOLAS SEROV
    • G06F9/445G06F12/00G06F12/06
    • G06F3/0604G06F3/0632G06F3/0655G06F3/0679G06F9/4416G06F12/0246
    • PROBLEM TO BE SOLVED: To provide a system and method to boot a memory device from a host device.SOLUTION: In one implementation, a method includes receiving, at a memory device, an instruction to boot the memory device, in which the memory device includes a non-volatile memory accessible by a controller of the memory device and, in response to receiving the instruction to boot the memory device, obtaining, by the memory device, firmware from a host device, in which the host device is separate from and communicatively coupled to the memory device. The method can also include booting the memory device using the firmware from the host device, in which the memory device boots separately from the host device, and the host device performs operations using data or instructions stored in the non-volatile memory and obtained through communication with the memory controller of the memory device.
    • 要解决的问题:提供从主机设备引导存储设备的系统和方法。 解决方案:在一个实现中,一种方法包括在存储器设备处接收引导存储器设备的指令,其中存储器设备包括可由存储器件的控制器访问的非易失性存储器,并且作为响应 接收引导存储器设备的指令,由存储器设备从主机设备获取固件,其中主机设备与存储器设备分离并且通信地耦合到存储器设备。 该方法还可以包括使用来自主机设备的固件引导存储设备,其中存储器设备与主机设备分开启动,并且主机设备使用存储在非易失性存储器中的数据或指令来执行操作,并通过通信 与存储器件的存储器控​​制器。 版权所有(C)2013,JPO&INPIT
    • 4. 发明专利
    • Variable impedance control for memory devices
    • 用于存储器件的可变阻抗控制
    • JP2012174281A
    • 2012-09-10
    • JP2012053736
    • 2012-02-22
    • Apple Incアップル インコーポレイテッド
    • ANTHONY FAINICHOLAS SEROV
    • G06F13/16G06F12/00
    • G11C7/1057G06F2213/0038G11C7/1084G11C8/10
    • PROBLEM TO BE SOLVED: To provide systems, devices, methods, and techniques for variably controlling impedance for a memory device where multiple NVM units are accessible over a shared bus.SOLUTION: Impedance can be varied using switches that are configured to switch between an NVM unit and an impedance terminal. Switches can be adjusted during operation of a memory device such that a memory controller is connected over a shared bus to a selected single NVM unit and one or more impedance terminals. Impedance terminals can be configured to provide a relatively small load (a smaller load than an NVM unit) that is impedance matched (alone or in combination with other impedance terminals and/or an NVM unit) with a source impedance on a shared bus that is provided by a memory controller.
    • 要解决的问题:提供用于可变地控制存储器件的阻抗的系统,设备,方法和技术,其中多个NVM单元可通过共享总线访问。

      解决方案:可以使用配置为在NVM单元和阻抗端子之间切换的开关来改变阻抗。 可以在存储器件的操作期间调整开关,使得存储器控制器通过共享总线连接到所选择的单个NVM单元和一个或多个阻抗端子。 阻抗端子可以配置为提供与共享总线上的源阻抗阻抗匹配(单独或与其他阻抗端子和/或NVM单元组合)相对较小的负载(比NVM单元更小的负载) 由存储器控制器提供。 版权所有(C)2012,JPO&INPIT