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1. 发明专利

JP2009206555A Receiver 审中-公开
标题翻译：接收器
公开(公告)号：JP2009206555A
公开(公告)日：2009-09-10
申请号：JP2008044007
申请日：2008-02-26
申请人： Nsc Co Ltd , Nsc株式会社
发明人： IKEDA TAKESHI , MIYAGI HIROSHI
IPC分类号： H04B1/26 , H04B1/30
CPC分类号： H04B1/18 , H04B1/0007
摘要： PROBLEM TO BE SOLVED: To effectively suppress an image component by suppressing the occurrence of an error in the phase and amplitude between I and Q signals as much as possible.
SOLUTION: Switch sections 8a, 8b for changing the I, Q signals for outputting to one A/D converter 9 are provided, and the A/D converter 9 successively converts the I, Q signals output from the switch sections 8a, 8b to digital signals for supplying to a DSP 10, thus enabling the A/D conversion processing of the I, Q signals to be performed by the same A/D converter 9, and hence inhibiting inconvenience where variations in A/D conversion characteristics cause an error in the amplitude and phase between the I and Q signals.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：通过尽可能地抑制I和Q信号之间的相位和幅度的误差的发生来有效地抑制图像分量。解决方案：提供用于改变用于输出到一个A / D转换器9的I，Q信号的开关部分8a，8b，并且A / D转换器9连续地转换从开关部分8a输出的I，Q信号， 8b到用于提供给DSP 10的数字信号，从而使得能够由相同的A / D转换器9执行I，Q信号的A / D转换处理，从而抑制A / D转换特性的变化导致的不便 I和Q信号之间的幅度和相位误差。版权所有（C）2009，JPO＆INPIT

2. 发明专利

JP2009177580A Receiver and semiconductor integrated circuit used therefor 审中-公开
标题翻译：接收器和半导体集成电路
公开(公告)号：JP2009177580A
公开(公告)日：2009-08-06
申请号：JP2008014783
申请日：2008-01-25
申请人： Nsc Co Ltd , Nsc株式会社
发明人： ISHIGURO KAZUHISA
IPC分类号： H04B1/16 , H04B1/18
摘要： PROBLEM TO BE SOLVED: To surely tune to a required frequency, even when a capacitance value is varied, in a receiver where a capacitor of a tuner circuit is built in a semiconductor chip.
SOLUTION: The tuner circuit 2 is configured by providing capacitors C1-Cm, more than the number of actual receiving channels, including a capacitor having a capacitance value for a margin in addition to a capacitor having a logical capacitance value determined from a reception frequency. A signal of a reference frequency having a difference just by an intermediate frequency (10.7 MHz) from a local oscillation frequency FL is supplied to the tuner circuit 2 and then, a tracking section 10c detects a tuning point while switching the selection of the capacitors C1-Cm. Thus, even when the capacitance value is varied on a semiconductor chip with the capacitors C1-Cm built therein, the capacitance value of the capacitor really required for tuning can be specified by tracking.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：即使在电容值变化的情况下，在调谐器电路的电容器被构建在半导体芯片中的接收器中，也可以确定地调谐到所需频率。解决方案：调谐器电路2通过提供比实际接收通道数更多的电容器C1-Cm，除了具有由从接收频率。具有与本地振荡频率FL相当的中间频率（10.7MHz）的基准频率的信号被提供给调谐器电路2，然后，跟踪部分10c在切换电容器C1的选择的同时检测调谐点 -厘米。因此，即使在内置电容器C1-Cm的半导体芯片上电容值变化的情况下，也可以通过跟踪来确定电容器真正需要的电容值。版权所有（C）2009，JPO＆INPIT

3. 发明专利

JP2009124190A Tuning circuit, and radio receiver using the same 审中-公开
标题翻译：调谐电路和使用它的无线电接收器
公开(公告)号：JP2009124190A
公开(公告)日：2009-06-04
申请号：JP2007292500
申请日：2007-11-09
申请人： Nsc Co Ltd , Nsc株式会社
发明人： ISHIGURO KAZUHISA , TAKAHASHI YOSHIAKI
IPC分类号： H04B1/18
CPC分类号： H03H7/42 , H03H2007/013
摘要： PROBLEM TO BE SOLVED: To provide a π type tuning circuit which can be built in an IC chip by reducing the capacitance value of a capacitor and can reduce the difference in level between two output signals.
SOLUTION: In the tuning circuit constituted by connecting a coil L and two capacitors C1 and C2 into a π type, a total capacitance value obtained by adding respective capacitance values of an input capacitance Cin and the first capacitor C1 which are connected to one of terminals of the coil L is set to be equal to a capacitance value of the second capacitor C2 connected to the other terminal of the coil L (C2=Cin+C1). In this way, a capacitance value on one terminal side of the coil L and a capacitance value on the other terminal side are set to be equal to each other and are thus balanced, and a level difference between two output signals on a parallel resonance point of the π type tuning circuit can be reduced even if the capacitance values of the two capacitors C1 and C2 are decreased.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：通过减小电容器的电容值来提供可以内置在IC芯片中的π型调谐电路，并且可以减少两个输出信号之间的电平差。解决方案：在通过将线圈L和两个电容器C1和C2连接成π型构成的调谐电路中，通过将输入电容Cin和第一电容器C1的相应电容值相加而获得的总电容值线圈L的端子中的一个被设置为等于连接到线圈L的另一个端子（C2 = Cin + C1）的第二电容器C2的电容值。以这种方式，线圈L的一个端子侧的电容值和另一个端子侧的电容值被设定为彼此相等并因此平衡，并且在并联谐振点上的两个输出信号之间的电平差即使两个电容器C1和C2的电容值减小，也可以减小π型调谐电路。版权所有（C）2009，JPO＆INPIT

4. 发明专利

JP2009118114A Receiver 审中-公开
标题翻译：接收器
公开(公告)号：JP2009118114A
公开(公告)日：2009-05-28
申请号：JP2007288116
申请日：2007-11-06
申请人： Nsc Co Ltd , Nsc株式会社
发明人： IKEDA TAKESHI , MIYAGI HIROSHI
IPC分类号： H04B1/26 , H04L27/38
CPC分类号： H04B1/28 , H04B1/0039 , H04L27/0014 , H04L2027/0028 , H04L2027/003 , H04L2027/0055
摘要： PROBLEM TO BE SOLVED: To accurately correct a phase error and an amplitude error between I and Q signals, thereby suppressing an image noise effectively. SOLUTION: The receiver includes an IF signal generating portion 10 for generating an intermediate frequency signal, and an amplitude error correcting portion 15 for setting a gain of an amplitude correcting portion 12 to eliminate the amplitude error between a signal processed by a first signal processing system for an I signal and a signal processed by a second signal processing system for a Q signal when the intermediate frequency signal generated by the IF signal generating portion 10 is selected by switches 7I and 7Q, by correcting the amplitude error using the intermediate frequency signal generated by the IF signal generating portion 10 in place of an intermediate frequency signal generated by processing an actual received signal, it is possible to accurately detect the amplitude error without being affected by a phase error by using a signal which does not include a phase error caused by variations in elements of mixers 4I and 4Q and a 90 DEG phase shifter 6 themselves. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了精确地校正I和Q信号之间的相位误差和幅度误差，从而有效抑制图像噪声。解决方案：接收机包括用于产生中频信号的IF信号产生部分10和用于设置幅度校正部分12的增益的幅度误差校正部分15，以消除由第一信号处理的信号之间的振幅误差当由IF信号产生部分10产生的中频信号由开关7I和7Q选择时，I信号的信号处理系统和由Q信号的第二信号处理系统处理的信号，通过使用中间件由IF信号产生部分10产生的频率信号代替通过处理实际接收信号而产生的中频信号，可以通过使用不包括一个信号的信号来精确地检测振幅误差而不受相位误差的影响由混合器4I和4Q以及90°移相器6本身的元件的变化引起的相位误差。版权所有（C）2009，JPO＆INPIT

5. 发明专利

JP2009111848A Intermodulation disturbance detection circuit 审中-公开
标题翻译：互连干扰检测电路
公开(公告)号：JP2009111848A
公开(公告)日：2009-05-21
申请号：JP2007283607
申请日：2007-10-31
申请人： Nsc Co Ltd , Nsc株式会社
发明人： ISHIGURO KAZUHISA
IPC分类号： H04B1/10
CPC分类号： H04B1/109 , H04B1/1027
摘要： PROBLEM TO BE SOLVED: To enable easily detecting an intermodulation disturbance, irrespective of the level of a received signal or a desirable wave included therein.
SOLUTION: An intermodulation disturbance detection circuit includes: a notch filter 21 for inputting a broadband IF signal to be outputted from a frequency conversion circuit 4 and executing filtering processing for attenuating a frequency component of a desired wave; and an amplifier 22 for amplifying a signal outputted from the notch filter 21 and outputting the amplified signal, wherein the presence or absence of an intermodulation disturbance is detected on the basis of whether or not a signal equal to a frequency of a desired wave attenuated by the notch filter 21 is outputted from the amplifier 22 although the desired wave is attenuated, and thus, the intermodulation disturbance can be easily detected irrespective of the level of a reception signal or a desired wave included therein without executing complicated processing such as amplitude modulation of the reception signal.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了容易地检测互调干扰，不管接收信号的电平或其中包含的期望的波形如何。互调扰动检测电路包括：陷波滤波器21，用于输入要从频率转换电路4输出的宽带IF信号，并执行用于衰减期望波的频率分量的滤波处理; 以及放大器22，用于放大从陷波滤波器21输出的信号并输出放大的信号，其中基于是否等于所需波的频率的信号是否被衰减的期望波的信号被检测到是否存在互调干扰陷波滤波器21虽然期望的波衰减而从放大器22输出，并且因此无需执行诸如幅度调制等复杂处理的接收信号或期望波的电平而容易地检测互调干扰。接收信号。版权所有（C）2009，JPO＆INPIT

6. 发明专利

JP2009164980A Receiver 审中-公开
标题翻译：接收器
公开(公告)号：JP2009164980A
公开(公告)日：2009-07-23
申请号：JP2008001791
申请日：2008-01-09
申请人： Nsc Co Ltd , Nsc株式会社
发明人： ISHIGURO KAZUHISA
IPC分类号： H04B1/26
CPC分类号： H04B1/1027
摘要： PROBLEM TO BE SOLVED: To satisfy both improvement of reception sensitivity with that of an interference characteristic even in a receiver without having an LNA.
SOLUTION: This receiver includes a first FE circuit 1 having a first mixer 1a and a second FE circuit 2 having a second mixer 2a. By selectively using either of the first FE circuit 1 and the second FE circuit 2 in response to the level of interfering waves included in a received high-frequency signal, reception sensitivity can be increased by using the first mixer 1a having large mutual conductance when the level of the interfering waves is smaller than a predetermined threshold value (when the improvement of the reception sensitivity is more important than that of the interference characteristic), and the interference characteristic can be improved by using the second mixer 2a having small conductance when the level of the interfering waves is not smaller than the predetermined threshold value (when the improvement of the interference characteristic is more important than that of the reception sensitivity).
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：即使在没有LNA的接收机中，也能够兼容提高接收灵敏度与干扰特性的接收灵敏度。解决方案：该接收机包括具有第一混频器1a的第一FE电路1和具有第二混频器2a的第二FE电路2。通过选择性地使用第一FE电路1和第二FE电路2中的任一个来响应包括在接收的高频信号中的干扰波的电平，可以通过使用具有大的互导的第一混频器1a来增加接收灵敏度干扰波的电平小于预定的阈值（当接收灵敏度的改善比干扰特性的改善更重要时），并且可以通过使用电平小的第二混频器2a来提高干扰特性的干扰波不小于预定阈值（当干扰特性的改善比接收灵敏度的改善更重要时）。版权所有（C）2009，JPO＆INPIT

7. 发明专利

JP2009159439A Communication equipment 审中-公开
标题翻译：通讯设备
公开(公告)号：JP2009159439A
公开(公告)日：2009-07-16
申请号：JP2007337075
申请日：2007-12-27
申请人： Micro Research Laboratory Inc , Nsc Co Ltd , Nsc株式会社 , 株式会社マイクロ総合研究所
发明人： IZAWA MAKOTO , NARITA HIROMITSU
IPC分类号： H04M11/00 , H04L12/46 , H04L12/66 , H04M3/00 , H04W4/00
摘要： PROBLEM TO BE SOLVED: To provide communication equipment connectable to a plurality of communication lines and freely and properly using the communication lines according to purposes and uses, with a simple constitution.
SOLUTION: The communication equipment includes: a plurality of interfaces 11a-11c provided for two or more kinds of communication lines, an A/D conversion part 12 for analog/digital converting analog information input from the interface parts 11a-11c, a DSP 31 for performing information processing to digital information output from the A/D conversion part 12, and an input switch part 14 for selecting one of the plurality of interface parts 11a-11c and supplying the analog information input from the selected interface part to the A/D conversion part 12. It is not required to provide two or more pieces of communication equipment nor the plurality of A/D conversion parts for the two or more kinds of communication lines.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：以简单的结构，提供可连接到多条通信线路的通信设备，并且可以根据目的和用途自由且适当地使用通信线路。解决方案：通信设备包括：为两种或多种通信线路提供的多个接口11a-11c，用于模拟/数字转换从接口部分11a-11c输入的模拟信息的A / D转换部分12，用于对从A / D转换部分12输出的数字信息进行信息处理的DSP31和用于选择多个接口部分11a-11c中的一个的输入开关部分14，并将从所选接口部分输入的模拟信息提供给 A / D转换部分12.不需要为两种或更多种通信线路提供两个或更多个通信设备和多个A / D转换部件。版权所有（C）2009，JPO＆INPIT

8. 发明专利

JP2009111849A Intermodulation disturbance detecting circuit 审中-公开
标题翻译：互连干扰检测电路
公开(公告)号：JP2009111849A
公开(公告)日：2009-05-21
申请号：JP2007283608
申请日：2007-10-31
申请人： Nsc Co Ltd , Nsc株式会社
发明人： ISHIGURO KAZUHISA
IPC分类号： H04B1/26 , H03G3/20 , H04B1/10
CPC分类号： H04B1/1018
摘要： PROBLEM TO BE SOLVED: To enable easily detecting an intermodulation disturbance irrespective of a level of a received signals or a desirable wave included therein.
SOLUTION: An intermodulation disturbance detecting circuit includes: a frequency converting circuit 21 for inputting a broadband IF signal which includes a disturbing wave and carrying out a frequency conversion with an oscillating signal having a frequency of a desirable wave, and outputting a signal including a sum frequency component of a frequency component of a disturbing wave which is included in the IF signal and a frequency component of a desirable wave of the oscillating signal and a difference frequency component therebetween; and a low-pass filter 22 for attenuating the sum frequency component to output a signal of the difference frequency component, wherein the presence or absence of an intermodulation disturbance is detected based on a frequency relationship between two difference frequency components outputted from the low-pass filter 22. With this configuration, it is possible to easily detect the intermodulation disturbance irrespective of the level of a received signal or a desirable wave included therein without carrying out a processing for amplitude modulating the received signal.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：无论接收信号的电平或其中包含的期望波的电平如何，都能够容易地检测互调干扰。互调扰动检测电路包括：频率转换电路21，用于输入包括干扰波的宽带IF信号，并用具有期望波频率的振荡信号进行频率转换，并输出信号包括包含在IF信号中的干扰波的频率分量的和频分量和振荡信号的期望波的频率分量和它们之间的差频分量; 以及低通滤波器22，用于衰减和频分量以输出差频分量的信号，其中基于从低通输出的两个差频分量之间的频率关系来检测是否存在互调干扰通过这种配置，无需对接收到的信号的电平或包含在其中的期望波的电平进行调制，就可以容易地检测互调干扰，而不进行用于幅度调制的接收信号的处理。版权所有（C）2009，JPO＆INPIT

9. 发明专利

JP2009206127A Semiconductor integrated circuit 审中-公开
标题翻译：半导体集成电路
公开(公告)号：JP2009206127A
公开(公告)日：2009-09-10
申请号：JP2008044006
申请日：2008-02-26
申请人： Nsc Co Ltd , Nsc株式会社
发明人： IKEDA TAKESHI , MIYAGI HIROSHI
IPC分类号： H01L21/822 , H01L21/82 , H01L27/04 , H04B15/00
CPC分类号： H01L21/823871 , H01L27/0207
摘要： PROBLEM TO BE SOLVED: To prevent such inconvenience that an S/N of a signal processed by an analog circuit is deteriorated by power source noise put on a signal output from a digital circuit to the analog circuit and scattered in an analog circuit region.
SOLUTION: Signal lines 13 and 14 are wired in a region different from power source/ground lines 11 and 12 to prevent the signal lines 13 and 14 for use in supplying signals between the analog circuit and the digital circuit from intersecting with the power source/ground lines 11 and 12 for use in supplying power to the analog and digital circuits. For example, the power source/ground lines 11 and 12 are wired along a circumference of a semiconductor chip 10, also the analog and digital circuits are provided inside the lines 11 and 12, and the signal lines 13 and 14 are wired between the analog circuit and the digital circuit.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了防止由模拟电路处理的信号的S / N由于从数字电路输出到模拟电路的信号的电源噪声而劣化并且散射在模拟电路中的不便地区。解决方案：信号线13和14被布线在与电源/接地线11和12不同的区域中，以防止用于在模拟电路和数字电路之间提供信号的信号线13和14与用于向模拟和数字电路供电的电源/接地线11和12。例如，电源/接地线11和12沿着半导体芯片10的圆周布线，并且模拟和数字电路设置在线路11和12内部，并且信号线13和14被布线在模拟电路和数字电路。版权所有（C）2009，JPO＆INPIT

10. 发明专利

JP2009177579A Receiver and semiconductor integrated circuit used therefor 审中-公开
标题翻译：接收器和半导体集成电路
公开(公告)号：JP2009177579A
公开(公告)日：2009-08-06
申请号：JP2008014782
申请日：2008-01-25
申请人： Nsc Co Ltd , Nsc株式会社
发明人： ISHIGURO KAZUHISA
IPC分类号： H03J3/20 , H03H7/12 , H04B1/18
摘要： PROBLEM TO BE SOLVED: To easily tune to another receiving band without performing tracking again when switching from one receiving band to the relevant other receiving band.
SOLUTION: As for FM radio band, a tuning point is tracked while switching capacitors C1-Cm and a capacitor at the time when the tuning point is obtained, is specified. Whereas for weather band, a variation degree of capacitance values is obtained from a logic value of tuning capacitance and a capacitance value of the capacitor specified by tracking, and switches SW1-SWm are controlled so as to select a capacitor of the capacitance value having a difference approximately equal to the variation degree with respect to the logic value of tuning capacitance of the weather band. Thus, tuning in the weather band is performed by capacitor selection based on the variation degree determined by tracking on the FM radio band, so that it is not necessary to perform tracking again in the weather band.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：当从一个接收频带切换到相关的其他接收频带时，可以轻松地调谐到另一个接收频带，而不再次进行跟踪。解决方案：对于FM无线电频带，指定在获得调谐点时切换电容器C1-Cm和电容器时调谐点。而对于天气带，由调谐电容的逻辑值和通过跟踪指定的电容器的电容值获得电容值的变化程度，并且控制开关SW1-SWm，以选择具有电容值的电容值的电容器差异近似等于相对于天气带调谐电容的逻辑值的变化程度。因此，通过基于通过在FM无线电频带上的跟踪确定的变化程度的电容器选择来执行气象带中的调谐，使得不需要在气象带中再次执行跟踪。版权所有（C）2009，JPO＆INPIT

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