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1. 发明专利

JP2005051496A Signal transmission system and signal transmission line 审中-公开
标题翻译：信号传输系统和信号传输线
公开(公告)号：JP2005051496A
公开(公告)日：2005-02-24
申请号：JP2003281188
申请日：2003-07-28
申请人： Fujitsu Ltd , Matsushita Electric Ind Co Ltd , Nec Corp , Oki Electric Ind Co Ltd , Kanji Otsuka , Renesas Technology Corp , Rohm Co Ltd , Sanyo Electric Co Ltd , Sharp Corp , Sony Corp , Toshiba Corp , Tamotsu Usami , シャープ株式会社 , ソニー株式会社 , ローム株式会社 , 三洋電機株式会社 , 寛治大塚 , 保宇佐美 , 富士通株式会社 , 日本電気株式会社 , 松下電器産業株式会社 , 株式会社ルネサステクノロジ , 株式会社東芝 , 沖電気工業株式会社
发明人： OTSUKA KANJI , USAMI TAMOTSU , NISHIYAMA KAZUO
IPC分类号： H01P3/02 , G08C19/00 , H01P5/02 , H01P5/08 , H03K17/041 , H03K19/0175 , H04B3/02 , H04L25/02 , H04L25/08
CPC分类号： H04L25/08 , H03K17/04106
摘要： PROBLEM TO BE SOLVED: To provide a system transmitting, through differential lines, a several ten GHz-band digital high-speed signal by connecting the differential line referring to ground to the differential line referring to no ground. SOLUTION: In a signal transmission system transmitting, through a signal transmission line, a digital signal between circuit blocks, each of the circuit blocks has such a basic constitution that each circuit block is provided with a reception and transmission circuit constituted to separate from a function circuit and an impedance-matched signal transmission line 115 is provided between a reception end and a transmission end. The differential line 105 referring to the ground derived from a differential output driver has constitution in which the lines of a differential signal are arranged symmetrically with the ground 110 as a center in the circuit block. In the signal transmission line 115, only the differential pair lines 111, 112 referring to no ground 110 are directly extended from the symmetrical structure line with the ground 110 as the center. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种通过差分线路传输几十GHz频带数字高速信号的系统，其通过将参考地的差分线连接到不具有接地的差分线路。解决方案：在信号传输系统中，通过信号传输线传输电路块之间的数字信号，每个电路块具有这样的基本结构：每个电路块设置有接收和传输电路，其被构造成分离来自功能电路和阻抗匹配信号传输线115设置在接收端和发送端之间。参考从差分输出驱动器得到的接地的差分线105具有差分信号的线对称地布置在电路块中的接地110为中心的结构。在信号传输线路115中，只有没有接地线110的差分对线路111,112从以地面110为中心的对称结构线直接延伸。版权所有（C）2005，JPO＆NCIPI

2. 发明专利

JP2004254155A Signal transmitter and wiring structure 审中-公开
公开(公告)号：JP2004254155A
公开(公告)日：2004-09-09
申请号：JP2003043652
申请日：2003-02-21
申请人： Fujitsu Ltd , Hitachi Ltd , Matsushita Electric Ind Co Ltd , Mitsubishi Electric Corp , Nec Corp , Oki Electric Ind Co Ltd , Kanji Otsuka , Rohm Co Ltd , Sanyo Electric Co Ltd , Sharp Corp , Sony Corp , Toshiba Corp , Tamotsu Usami , シャープ株式会社 , ソニー株式会社 , ローム株式会社 , 三洋電機株式会社 , 三菱電機株式会社 , 寛治大塚 , 保宇佐美 , 富士通株式会社 , 日本電気株式会社 , 松下電器産業株式会社 , 株式会社日立製作所 , 株式会社東芝 , 沖電気工業株式会社
发明人： OTSUKA KANJI , USAMI TAMOTSU
IPC分类号： H01P1/00 , H01P1/22 , H01P3/02 , H01P3/08 , H01P5/18 , H04L5/14 , H04L25/02
CPC分类号： H04L5/1461
摘要： PROBLEM TO BE SOLVED: To reduce power consumption of a transmitter of a digital signal. SOLUTION: The signal transmitter is constituted by making wiring in which the PC delay cannot be disregarded into transmission line structure, and is provided with: a signal transmission line 1 which transmits a digital signal inputted on an transmitting end; a driver 2 of inverter structure which outputs the digital signal; a power source grand pair transmission line 3 which is a transmission line for supplying power to the driver and with characteristic impedance capable of driving the sum of on-state resistance of the driver and the characteristic impedance of the signal transmission line; a receiver 4 of differential amplifier structure which detects the digital signal inputted via a receiving end of the signal transmission line; and a directional coupler 5a which is provided on the receiving end of the signal transmission line, blocks DC components of the inputted digital signal, and passes a wide band AC components. The directional coupler can also be provided between the transmitting end of the signal transmission line and the driver or between the transmitting end and the driver and the receiving end, respectively. COPYRIGHT: (C)2004,JPO&NCIPI

3. 发明专利

JP2013223138A Signal transmission line and manufacturing method thereof 有权
标题翻译：信号传输线及其制造方法
公开(公告)号：JP2013223138A
公开(公告)日：2013-10-28
申请号：JP2012094134
申请日：2012-04-17
申请人： Kanji Otsuka , 寛治大塚 , Yutaka Akiyama , 豊秋山 , Fumiaki Fujii , 文明藤井 , Renesas Electronics Corp , ルネサスエレクトロニクス株式会社 , Fuji Xerox Co Ltd , 富士ゼロックス株式会社
发明人： OTSUKA KANJI , AKIYAMA YUTAKA , FUJII FUMIAKI
IPC分类号： H01P3/08 , H01L23/02 , H01L23/12 , H01P3/02 , H01P11/00
摘要： PROBLEM TO BE SOLVED: To provide a signal transmission line of which the characteristic impedance is fixed in a view from an input side according to a method simplified in comparison with the prior arts, and a manufacturing method thereof, the signal transmission line being capable of transmitting a broadband high-speed signal using a clock frequency equal to or higher than e.g., 1 GHz.SOLUTION: A signal transmission line comprises at least a pair of line conductors each including DC resistance between a line input terminal and a line output terminal, and transmits signals unidirectionally from the line input terminal to the line output terminal. In the signal transmission line, a line width of each line conductor is made wider gradually in a length direction of each line conductor to substantially fix characteristic impedance from the line input terminal to the line output terminal by using a time domain reflection method, and each line conductor is made thicker gradually in the length direction of each line conductor or a dielectric body between the line conductors is made thinner gradually in the length direction of each line conductor, such that the characteristic impedance in a view from a line input side is prevented from being increased by the DC resistance of each line conductor.
摘要翻译：要解决的问题：根据与现有技术相比简化的方法，从输入侧提供其特性阻抗固定的信号传输线及其制造方法，该信号传输线能够使用等于或高于例如1GHz的时钟频率发送宽带高速信号。解决方案：信号传输线包括至少一对线路导体，每条线路导线在线路输入端子和线路输出端子之间包括直流电阻，并且将线路输入端子单向地发送到线路输出端子。在信号传输线路中，通过使用时域反射法，使线路导体的线宽度在各线导体的长度方向上逐渐变宽，从而将线路输入端子到线路输出端子的特性阻抗基本上固定，线导体在每个线导体的长度方向上逐渐变厚，或者线导体之间的电介质体在每条线路导体的长度方向上逐渐变薄，使得从线路输入侧的视图中的特性阻抗被阻止不受每线导体的直流电阻的影响。

4. 发明专利

JP2008294837A Signal transmission circuit and system 有权
标题翻译：信号传输电路和系统
公开(公告)号：JP2008294837A
公开(公告)日：2008-12-04
申请号：JP2007139403
申请日：2007-05-25
申请人： Yutaka Akiyama , Fuji Xerox Co Ltd , Fujitsu Ltd , Ibiden Co Ltd , Kyocera Corp , Oki Electric Ind Co Ltd , Kanji Otsuka , Renesas Technology Corp , Toshiba Corp , イビデン株式会社 , 京セラ株式会社 , 寛治大塚 , 富士ゼロックス株式会社 , 富士通株式会社 , 株式会社ルネサステクノロジ , 株式会社東芝 , 沖電気工業株式会社 , 豊秋山
发明人： OTSUKA KANJI , AKIYAMA YUTAKA
IPC分类号： H04B3/04 , H03H7/01 , H04B3/50
CPC分类号： H04L25/028
摘要： PROBLEM TO BE SOLVED: To provide a signal transmission circuit which allows high band transmission through a metallic transmission line.
SOLUTION: A transmission signal is output from a driver 11 to a receiver 30 via a single end transmission line 30. A parallel circuit composed of a capacitor 12 and a first resistor 13 is connected between an output terminal of the driver 11 and the single end transmission line 30, and a serial circuit comprised of an inductor 16 and a second resistor 17 is connected between an output side connection point 14 of the capacitor 12 and the first resistor 13 and the ground 15. The parallel circuit and the serial circuit constitute a passive equalizer 1.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供允许通过金属传输线进行高频带传输的信号传输电路。解决方案：传输信号通过单端传输线路30从驱动器11输出到接收器30.由电容器12和第一电阻器13构成的并联电路连接在驱动器11的输出端和单端传输线30和由电感器16和第二电阻器17组成的串联电路连接在电容器12的输出侧连接点14和第一电阻器13与接地端15之间。并联电路和串联电路电路构成无源均衡器1.版权所有（C）2009，JPO＆INPIT

5. 发明专利

JP2008288614A Electronic circuit apparatus 有权
标题翻译：电子电路设备
公开(公告)号：JP2008288614A
公开(公告)日：2008-11-27
申请号：JP2008201740
申请日：2008-08-05
申请人： Fujitsu Ltd , Nec Corp , Oki Electric Ind Co Ltd , Kanji Otsuka , Panasonic Corp , Renesas Technology Corp , Rohm Co Ltd , Sanyo Electric Co Ltd , Sharp Corp , Sony Corp , Toshiba Corp , Tamotsu Usami , シャープ株式会社 , ソニー株式会社 , パナソニック株式会社 , ローム株式会社 , 三洋電機株式会社 , 寛治大塚 , 保宇佐美 , 富士通株式会社 , 日本電気株式会社 , 株式会社ルネサステクノロジ , 株式会社東芝 , 沖電気工業株式会社
发明人： OTSUKA KANJI , USAMI TAMOTSU
IPC分类号： H01L21/822 , H01L27/04 , H01P3/08 , H05K1/02
摘要： PROBLEM TO BE SOLVED: To provide an electronic circuit apparatus having a power supplying structure which can handle a high-speed signal over GHz band. SOLUTION: An electronic circuit apparatus comprises a source power supply ground pair transmission line 50 having a power supply line and a ground line arranged while facing each other, three branched power supply ground pair transmission lines 51, 52, and 53 branched from the source power supply ground pair transmission line 50, respectively composed of a power supply line and a ground pair line arranged while facing each other, three driver transistors 55, 56, and 57 connected to these branched power supply ground pair transmission lines 51, 52, and 53, respectively, three signal ground pair transmission lines 58, 59, and 60 each of which is driven by output signals from the driver transistors 55, 56, and 57 and composed of a signal line and a ground line arranged while facing each other, and a receiver circuit which receives signals transmitted from these signal ground pair transmission lines. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种具有能够处理GHz频带上的高速信号的供电结构的电子电路装置。解决方案：一种电子电路装置包括：源电源地对传输线50，具有电源线和彼此相对配置的接地线;三个分支电源地对对传输线51,52和53，从分别由彼此相对配置的电源线和接地对线构成的源电源地对对传输线50，与这些分支电源地对对传输线51,52连接的3个驱动晶体管55,56,57 和53，分别是三个信号接地对传输线路58,59和60，每个信号接地对传输线路58,59和60由来自驱动器晶体管55,56和57的输出信号驱动，并且由信号线和接地线组成，以及接收从这些信号接地对传输线传输的信号的接收机电路。版权所有（C）2009，JPO＆INPIT

6. 发明专利

JP2008010542A Electrostatic discharge protection circuit, and terminal resistance circuit 有权
标题翻译：静电放电保护电路和端子电阻电路
公开(公告)号：JP2008010542A
公开(公告)日：2008-01-17
申请号：JP2006177842
申请日：2006-06-28
申请人： Yutaka Akiyama , Fuji Xerox Co Ltd , Fujitsu Ltd , Tsuneo Ito , Kyocera Corp , Oki Electric Ind Co Ltd , Kanji Otsuka , Renesas Technology Corp , Hiroko Tanba , Toshiba Corp , Tamotsu Usami , 裕子丹場 , 京セラ株式会社 , 恒夫伊藤 , 寛治大塚 , 保宇佐美 , 富士ゼロックス株式会社 , 富士通株式会社 , 株式会社ルネサステクノロジ , 株式会社東芝 , 沖電気工業株式会社 , 豊秋山
发明人： OTSUKA KANJI , USAMI TAMOTSU , AKIYAMA YUTAKA , ITO TSUNEO , TANBA HIROKO
IPC分类号： H01L21/822 , H01L21/8238 , H01L27/04 , H01L27/06 , H01L27/092
CPC分类号： H01L27/0266
摘要： PROBLEM TO BE SOLVED: To reduce capacity of an ESD protection circuit connected to wiring through which a differential signal is transmitted in order to speed up the differential signal. SOLUTION: Transmission lines 14a and 14b are connected to an IN terminal and an INBar terminal, and the differential signals are inputted to them. The ESD protection circuit 11 is connected to the transmission lines 14a and 14b, and it protects an inner circuit from surges applied to the IN terminal and the INBar terminal. Transistors M1 and M2 of the ESD protection circuit 11 are formed in the same well. Transistors M3 and M4 are formed in the same well. When the differential signal transits, charges of drains move in the same well in the transistors M1 to M4 holding a state before transition. Capacity of the drains of the transistors M1 to M4 with respect to transition of the differential signal is reduced, and the differential signal can be speeded up. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了减少连接到传输差分信号的布线的ESD保护电路的容量，以加速差分信号。
解决方案：传输线14a和14b连接到IN端子和INBar端子，并且差分信号被输入到它们。 ESD保护电路11连接到传输线14a和14b，并且保护内部电路免受施加到IN端子和INBar端子的浪涌。 ESD保护电路11的晶体管M1和M2形成在同一个阱中。晶体管M3和M4形成在同一个阱中。当差分信号转换时，排水管的电荷在保持转变之前的状态的晶体管M1至M4的同一阱中移动。相对于差分信号的转换，晶体管M1〜M4的漏极容量减小，差分信号可以加快。版权所有（C）2008，JPO＆INPIT

7. 发明专利

JP2006237330A Semiconductor memory device 有权
标题翻译：半导体存储器件
公开(公告)号：JP2006237330A
公开(公告)日：2006-09-07
申请号：JP2005050632
申请日：2005-02-25
申请人： Fujitsu Ltd , Matsushita Electric Ind Co Ltd , Nec Corp , Oki Electric Ind Co Ltd , Kanji Otsuka , Renesas Technology Corp , Rohm Co Ltd , Sanyo Electric Co Ltd , Sharp Corp , Sony Corp , Toshiba Corp , Tamotsu Usami , シャープ株式会社 , ソニー株式会社 , ローム株式会社 , 三洋電機株式会社 , 寛治大塚 , 保宇佐美 , 富士通株式会社 , 日本電気株式会社 , 松下電器産業株式会社 , 株式会社ルネサステクノロジ , 株式会社東芝 , 沖電気工業株式会社
发明人： OTSUKA KANJI , USAMI TAMOTSU
IPC分类号： H01L27/11 , G11C11/401 , G11C11/41 , H01L21/8242 , H01L21/8244 , H01L27/108
CPC分类号： H01L27/108 , G11C5/063 , G11C7/12 , G11C7/18 , G11C11/405 , G11C11/4094 , G11C11/4097
摘要： PROBLEM TO BE SOLVED: To achieve the high-speed operation and reduce power consumption by effectively utilizing stored electric charges wastefully consumed in switching operation of a transistor. SOLUTION: A memory cell MC comprises nMOS transistors 11a, 11b for transfer gate constituting a paired transistor, and one data storing capacitor 12 connected to the nMOS transistor 11a. The gate electrode of the nMOS transistor 11a in the memory cell MC is connected to a word line WL with its drain connected to a bit line BL. The gate electrode of the nMOS transistor 11b is connected to the word line WL with its drain and source connected to ground. A capacitor 12 is connected between the source of the nMOS transistor 11a and the ground. A Y selecting circuit 13 is connected between a differential bit line BL/BL and a differential data line DL/DL. The Y selecting circuit 13 includes two sets of nMOS transistors 14a, 14b and 15a, 15b respectively constituting paired transistor. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：通过有效利用在晶体管的开关操作中浪费的消耗的电荷来实现高速操作并降低功耗。解决方案：存储单元MC包括用于构成一对晶体管的传输门的nMOS晶体管11a，11b和连接到nMOS晶体管11a的一个数据存储电容器12。存储单元MC中的nMOS晶体管11a的栅电极连接到字线WL，其漏极连接到位线BL。 nMOS晶体管11b的栅电极连接到字线WL，其漏极和源极连接到地。电容器12连接在nMOS晶体管11a的源极和地之间。 Y选择电路13连接在差分位线BL / BL和差分数据线DL / DL之间。 Y选择电路13包括分别构成成对晶体管的两组nMOS晶体管14a，14b，15a，15b。版权所有（C）2006，JPO＆NCIPI

8. 发明专利

JP2004259722A Electronic circuit device 有权
公开(公告)号：JP2004259722A
公开(公告)日：2004-09-16
申请号：JP2003045422
申请日：2003-02-24
申请人： Fujitsu Ltd , Hitachi Ltd , Matsushita Electric Ind Co Ltd , Mitsubishi Electric Corp , Nec Corp , Oki Electric Ind Co Ltd , Kanji Otsuka , Rohm Co Ltd , Sanyo Electric Co Ltd , Sharp Corp , Sony Corp , Toshiba Corp , Tamotsu Usami , シャープ株式会社 , ソニー株式会社 , ローム株式会社 , 三洋電機株式会社 , 三菱電機株式会社 , 寛治大塚 , 宇佐美保 , 富士通株式会社 , 日本電気株式会社 , 松下電器産業株式会社 , 株式会社日立製作所 , 株式会社東芝 , 沖電気工業株式会社
发明人： OTSUKA KANJI , USAMI TAMOTSU
IPC分类号： H01L21/822 , G06F13/40 , H01L23/528 , H01L23/66 , H01L27/04 , H01P3/00 , H01P3/08
CPC分类号： H01P3/081 , H01L23/5286 , H01L23/66 , H01L2223/6627 , H01L2924/0002 , H01L2924/1903 , H01L2924/3011 , H01P3/026 , H01P3/08 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide an electronic circuit device having a power supply structure that can cope with high-speed signals exceeding the GHz band. SOLUTION: A driver transistor 10 is formed on the surface of a semiconductor substrate 1. A power supply ground-pair transmission line 20 which supplies electric power to the driver transistor 10, and a signal ground-pair transmission line 30 which transmits signals to a receiver, are also formed on the semiconductor substrate. The power supply ground-pair transmission line 20 is connected to the drain layer 3 of the driver transistor 10 and a P + -type layer 7 in a P-type well 2. In addition, the signal ground-pair transmission line 30 is connected to the source layer 4 of the transistor 10 and a P + -type layer 8 in the P-type well 2. COPYRIGHT: (C)2004,JPO&NCIPI

9. 发明专利

JP2008301062A Transmission line opening type antenna device 有权
标题翻译：传输线开路型天线装置
公开(公告)号：JP2008301062A
公开(公告)日：2008-12-11
申请号：JP2007143565
申请日：2007-05-30
申请人： Yutaka Akiyama , Fuji Xerox Co Ltd , Fujitsu Ltd , Ibiden Co Ltd , Kyocera Corp , Kanji Otsuka , Renesas Technology Corp , Toshiba Corp , Senju Ueda , Tamotsu Usami , イビデン株式会社 , 千寿上田 , 京セラ株式会社 , 寛治大塚 , 保宇佐美 , 富士ゼロックス株式会社 , 富士通株式会社 , 株式会社ルネサステクノロジ , 株式会社東芝 , 豊秋山
发明人： OTSUKA KANJI , USAMI TAMOTSU , AKIYAMA YUTAKA , UEDA SENJU
IPC分类号： H01Q13/00
CPC分类号： H01Q13/06
摘要： PROBLEM TO BE SOLVED: To provide an antenna device connected to a transmission line, simple in constitution, having narrow directivity with almost no change of frequency characteristics and capable of communicating even in a comparatively long distance.
SOLUTION: This transmission line opening type antenna device connected to a stacked pair line 1 having predetermined characteristic impedance includes a tapered line section 2 connected to one end of the stacked pair line 1, including a transmission line formed of a pair of line conductors 2a, 2b, and constituting at least one of a line width and a clearance to be enlarged in tapered shape at a predetermined tapered angle while holding predetermined characteristic impedance, and an opening 3 connected to one end of the tapered line section 2 and having a radial opening. The dimension of one side of the opening end face of the opening 3 is set to at least 1/4 wavelength of minimum operating frequency.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种连接到传输线的天线装置，结构简单，具有窄的方向性，几乎没有频率特性的变化并且甚至能够在较长的距离内进行通信。＆lt; P＆gt;解决方案：连接到具有预定特性阻抗的叠层对线1的传输线开路型天线装置包括连接到堆叠对线1的一端的锥形线部2，包括由一对线形成的传输线导体2a，2b，并且构成线宽度和间隙中的至少一个，以保持预定特性阻抗的方式以预定的锥形角度以锥形形状扩大;以及开口3，连接到锥形线部分2的一端并具有径向开口。开口3的开口端面的一侧的尺寸被设定为最小工作频率的至少1/4波长。版权所有（C）2009，JPO＆INPIT

10. 发明专利

JP2009064843A Semiconductor integrated circuit package, printed wiring board, semiconductor device, and power supply wiring structure 有权
标题翻译：半导体集成电路封装，印刷电路板，半导体器件和电源布线结构
公开(公告)号：JP2009064843A
公开(公告)日：2009-03-26
申请号：JP2007229497
申请日：2007-09-04
申请人： Yutaka Akiyama , Fuji Xerox Co Ltd , Fujitsu Ltd , Ibiden Co Ltd , Kyocera Corp , Oki Electric Ind Co Ltd , Kanji Otsuka , Renesas Technology Corp , Toshiba Corp , イビデン株式会社 , 京セラ株式会社 , 寛治大塚 , 富士ゼロックス株式会社 , 富士通株式会社 , 株式会社ルネサステクノロジ , 株式会社東芝 , 沖電気工業株式会社 , 豊秋山
发明人： OTSUKA KANJI , AKIYAMA YUTAKA
IPC分类号： H01L23/52 , H01L23/12 , H01L23/538 , H05K1/02
CPC分类号： H05K1/0231 , H01L23/50 , H01L23/5286 , H01L23/552 , H01L23/66 , H01L2223/6638 , H01L2224/16225 , H01L2924/19051 , H01L2924/3011 , H05K1/0263 , H05K2201/09672 , H05K2201/10545 , H05K2201/10734
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit package which does not resonate even in a high-frequency band and achieves stable power supply and ground wirings, and to provide a printed wiring board, a semiconductor device and a power supply wiring structure thereof. SOLUTION: Pair wiring 12 comprises the power supply wiring 10 and the ground wiring 11 which are arranged side by side at a specified spacing in a package 1 so that they may be electromagnetically coupled. Furthermore, multiple sets of pair wirings 12 are assembled, and the assembled sets are arranged in a zigzag manner in a cross section vertical to the extending direction of the wirings. The pair wiring structure is preferably made in the same manner as the package 1, even in the inside of the silicon chip and in the inside of the printed wiring board. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了提供即使在高频带中也不谐振并实现稳定的电源和接地布线的半导体集成电路封装，并且提供印刷线路板，半导体器件和电源布线结构。解决方案：配线12包括电源布线10和接地布线11，电源布线10和接地布线11在封装1中以指定的间隔并排布置，使得它们可以是电磁耦合的。此外，组合多组对配线12，并且组装的组在垂直于配线的延伸方向的横截面中以锯齿形的方式布置。即使在硅芯片的内部和印刷电路板的内部，也优选以与封装1相同的方式制造该对布线结构。版权所有（C）2009，JPO＆INPIT

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