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    • 85. 发明专利
    • DISPLAY UNIT
    • JPS558157A
    • 1980-01-21
    • JP8109878
    • 1978-07-04
    • SUWA SEIKOSHA KK
    • IKEDA KATSUYUKIHOSOKAWA MINORUYAZAWA SATORU
    • H04N5/66H04N3/12
    • PURPOSE:To obtain the excellent picture quality by averaging the information value having the plural adjacent picture elements feature and then displaying the averaged value in the form of one picture element. CONSTITUTION:The video signal drawn out at video detection circuit 401 undergoes the A/D conversion through A/D converter 404 and is then memorized temporarily in auxiliary memory circuit 403. And the contents is memorized in main memory circuit 406 within the blanking time of each scan line. Then the adjacent information of the necessary number in the vertical, horizontal and oblique directions of each picture element are read out and then averaged through process circuit 414 in a digital way. The averaged signal undergoes the D/A conversion through D/A converter 409 to be returned to the original video signal. And row driver 410 scans each row in sequence. Then the lines are also scanned sequentially via line driver 411 and based on the reading velocity. For each picture element thus driven, the peripheral information to be sampled are also averaged to be displayed. Thus, the high-quality picture can be obtained even with a small number of picture elements.
    • 87. 发明专利
    • MATRIX DISPLAY UNIT
    • JPS54137232A
    • 1979-10-24
    • JP7356878
    • 1978-06-14
    • SANYO ELECTRIC CO
    • KOMEI HIROSHI
    • H04N5/66G09G3/20H04N3/12
    • PURPOSE:To increase the resolution of the TV video signals by defining the NH of even-number times as much as the H period of the original TV video signal as one horizontal display period and then applying the coding signals of one horizontal period obtained through sampling every NH/M to each picture element. CONSTITUTION:Gated oscillator circuit f1 is triggered by the inverse output of preset pulse P1 to have oscillation with frequency f1. While gated oscillator circuit f2 is triggered by the output of NAND circuit N1 to have oscillation with frequency f2. And binary counter CT2 delivers the output to circuit N1 after counting the pulse of frequency f1 by the fixed times. Thus, the output corresponding to frequency f1 and f2 applied to AND circuit A1 and A2 via FF2 is obtained through the OR circuit. Here, the NH of even-number times as much as the H period of the original TV video signal is defined a one horizontal display period, and the coding signals of one horizontal period obtained through sampling every HN/M are applied to each picture element signl for display. Thus, the resolution of the TV video signals can be increased.
    • 88. 发明专利
    • MATRIX PANEL DISPLAY UNIT
    • JPS54136227A
    • 1979-10-23
    • JP4465578
    • 1978-04-14
    • SANYO ELECTRIC CO
    • YAMANO MASARUKURODA SAKUROUKOMEI HIROSHI
    • H04N3/12G09F9/30G09G3/20G09G3/32
    • PURPOSE:To give the zoom effect and to perform the display with high resolution, by displaying the entire or a part of the original picture with sampling, in the unit in which the number of the light emitting elements constituting the video elements is less than the number of the video elements constituting the original video signal. CONSTITUTION:In the display unit in which the number of the light emitting elements constituting the matrix panel MP is less than the number of video elements of the original video signal, the timing of the sampling pulse Sc of the clock pulse generating circuit Sc fed to the sampling hold circuit SPH of the AD conversion circuit AD is controlled to set the leading edge of the horizontal direction display by the panel MP of picture specified with the original picture. Moreover, the preset pulse of the horizonal synchronous signal counter H for shift pulse generation of vertical scanning signal is formed. The display leading edge of the panel MP is set by delaying the delay amount of the vertical synchronizing signal separated with the synchronous separation SYS from the original video signal with the scan pulse generating circuit SG.