专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

81. 发明专利

JPS5793577A INSULATED GATE TYPE TRANSISTOR 失效
公开(公告)号：JPS5793577A
公开(公告)日：1982-06-10
申请号：JP17118980
申请日：1980-12-03
申请人： MITSUBISHI ELECTRIC CORP
发明人： KOTANI KIYOUHIKO , MIHASHI JIYUNICHI , KOMORI NOBUFUMI , KAWAZU SATORU
IPC分类号： H01L27/112 , H01L21/8246 , H01L21/8247 , H01L29/788 , H01L29/792
摘要： PURPOSE:To enable the direct injection of charge from the second gate to the first gate by providing means for forming an insulated gate type field effect transistor of double structure between the first gate and the second gate. CONSTITUTION:Different conductive type source 2 from a silicon substrate 1, drain 3 and the first gate insulator 4 formed of silicon oxidized film and the first gate electrode 5 are formed by a method of manufacturing an ordinary MIS transistor, a thin insulatng film 6 the second gate electrode 7 are formed thereon, an oxidized film having a thickness less then 100Angstrom is formed by thermal oxidization or natural oxidization on the upper surface of the first gate 5 of polysilicon or the like, and the second gate 7 is superposed thereon. When approx. 5V is applied to the gate 7, the charge is moved due to tunnel effect to the first gate, and a current between the source 2 and the drain 3 can be controlled due to the potential.

82. 发明专利

JPS5732633A Resist developing apparatus 失效
标题翻译：耐用开发设备
公开(公告)号：JPS5732633A
公开(公告)日：1982-02-22
申请号：JP10855480
申请日：1980-08-04
申请人： Mitsubishi Electric Corp
发明人： NAGATOMO MASAO , WAKAMIYA WATARU , UOTANI SHIGEO , HARADA HIROJI , NISHIOKA KIYUUSAKU , KOMORI NOBUFUMI
IPC分类号： H01L21/30 , G03F7/30 , H01L21/027
CPC分类号： G03F7/30
摘要： PURPOSE:To enable strict temperature control and accurate control of pattern dimensions in a substrate surface and the edge shape thereof by moving a number of substrates housed in a cassette with vibration through a developer in a thermostatic oven. CONSTITUTION:The cassette 7 in which a substrate 8 is fixed is immersed in a developer 1 set at a given temperature as retained with a magic hand 10 and moved therethrough along a guide rail 9 with vibration. The developing time is adjusted by the forward dimensions of the thermostatic oven 4 and the magic hand 10. When reaching the boundary with the thermostatic oven, the cassette 7 is lifted with a link mechanism and immersed in a rising liquid 2 stored in the adjacent thermostatic oven 5. Then, likewise, it is moved in a highly pure water 3 to wash. Accordingly, a fresh liquid of limited fatigue is fed to the resist surface thereby accomplishing a quick and even development of the resist.
摘要翻译：目的：通过使带有振动的容纳在盒中的多个基板通过恒温箱中的显影剂移动，能够对基板表面及其边缘形状进行严格的温度控制和图形尺寸的精确控制。构成：其中固定有基板8的盒式磁带7浸入设置在用魔术手10保持的给定温度的显影剂1中，并沿着导轨9振动地移动。显影时间通过恒温炉4和魔术手10的前进尺寸来调节。当与恒温炉到达边界时，盒7用连杆机构提升，并浸没在存储在相邻恒温器中的上升液体2中然后，同样地，将其在高纯度的水3中移动以进行洗涤。因此，将有限疲劳的新鲜液体供给到抗蚀剂表面，从而实现抗蚀剂的快速且均匀的显影。

83. 发明专利

JPS571228A RESIST DEVELOPING DEVICE 失效
公开(公告)号：JPS571228A
公开(公告)日：1982-01-06
申请号：JP7520780
申请日：1980-06-03
申请人： MITSUBISHI ELECTRIC CORP
发明人： KOMORI NOBUFUMI , UOTANI SHIGEO , WAKAMIYA WATARU , NAGATOMO MASAO , NISHIOKA KIYUUSAKU , HARADA HIROJI
IPC分类号： H01L21/30 , G03F7/30 , H01L21/027
摘要： PURPOSE:To prevent the dripping of developing solution from a nozzle to a resist surface as well as to improve the uniformity of the developing in a spray type developing device by a method wherein a nozzle is provided at the lower section of the surface where resist is applied and the developing solution is vaporized. CONSTITUTION:In the spray type developing device, a wafer 2 is fixed on the supporting stand 1 of the device in such manner that the face 2, whereon a resist layer 3 was applied, is facing downward. A nozzle 5 is provided at the lower part of the device facing the resist layer 3 and the developing of the resist layer 3 is performed by spraying a developing solution 4 from the nozzle 5. The number of nozzle 5, to be provided in the device, may be increased to the plural. Through these procedures, the over-developing caused by dripping of the developing solution on the resist layer 3 from the nozzle 5 can be prevented, thereby enabling to improve the uniformity of developing.

84. 发明专利

JP2001223792A PORTABLE TELEPHONE SET 失效
公开(公告)号：JP2001223792A
公开(公告)日：2001-08-17
申请号：JP2000031630
申请日：2000-02-09
申请人： MITSUBISHI ELECTRIC CORP
发明人： MAKITA JUNKO , TSUBOTA HIRONO , KOMORI NOBUFUMI
IPC分类号： H04M1/73 , H04M1/00 , H04M1/725
摘要： PROBLEM TO BE SOLVED: To provide a potable telephone set with small power consumption. SOLUTION: In this portable telephone set 1, a control circuit 7 picks up an image of the circumference by using an image sensor 5 and detects the illuminance of the circumferential environment based on the image. Then the control circuit 7 turns off a liquid crystal back light 4b by turning off a switch 8 when the detected illumination is higher than a specific level and makes the liquid crystal back light 4b continue to light by turning on the switch 8 when being lower. The liquid crystal bask light 4b is therefore prevented from lighting when not necessary and the power consumption is reducible.

85. 发明专利

JPH086815A DEBUGGING DEVICE, COMPILER, AND STATISTICAL ANALYZING DEVICE 失效
公开(公告)号：JPH086815A
公开(公告)日：1996-01-12
申请号：JP13919194
申请日：1994-06-21
申请人： MITSUBISHI ELECTRIC CORP
发明人： TSUBOTA HIRONO , TAMURA TOSHIYUKI , KOMORI NOBUFUMI
IPC分类号： G06F9/06 , G06F9/45 , G06F11/28
摘要： PURPOSE:To provide a debugging device which can grasp the accurate execution state of, specially, a parallel processing system. CONSTITUTION:A debugging information relative table generating means 12 generates a debugging information relative table group D12 on the basis of a source program D1 and an execution program D2 (including debugging information). A debugging information relative table contents updating means 13 receives program execution information including variable update execution information from the parallel processing system when an instruction corresponding to variable update on the source program D1 is executed by the parallel processing system, and updates the contents of the debugging information relative table group D12 on the basis of the variable update execution information in the program execution information. A debugging information display means 14 displays debugging display information which is easy to visually recognize on the basis of the debugging information relative table group D12.

86. 发明专利

JPH05159083A PROGRAM EXECUTION SYSTEM 失效
公开(公告)号：JPH05159083A
公开(公告)日：1993-06-25
申请号：JP34886891
申请日：1991-12-05
申请人： MITSUBISHI ELECTRIC CORP
发明人： KOMORI NOBUFUMI , TAMURA TOSHIYUKI , SATO HISAKAZU , ONO AKIRA
IPC分类号： G06F9/45 , G06F15/82
摘要： PURPOSE:To improve the processing speed of a program by deleting and reduc ing the obtaining processing of color identification data so as to attain function execution. CONSTITUTION:At the time of compiling, a color allocation table consisting of a shared function existing in a source program and a calling source calling the shared function is prepared (S1), a virtual color is allocated to the color allocation table (S2), an object code is generated in accordance with the color allocation table (S3), an object program including a color relocation table coordinating an address in the object code expected to be colored with the color allocation table is prepared from the color allocation table (S4), the address is fetched from the object program at the time of loading the object program to a microcomputer (S5), a usable/actual color is found (S6) and exchanged with the virtual color in the color relocation table to respectively write the actual colors into the respective fetched addresses (S7).

87. 发明专利

JPH04314161A INFORMATION PROCESSOR 失效
公开(公告)号：JPH04314161A
公开(公告)日：1992-11-05
申请号：JP10682691
申请日：1991-04-11
申请人： MITSUBISHI ELECTRIC CORP
发明人： KOMORI NOBUFUMI
IPC分类号： G06F9/38 , G06F13/42
摘要： PURPOSE:To eliminate malfunction, to simplify a circuit scale and a transfer control, and to accelerate transfer speed by providing a voltage controlled delay circuit on a transfer request signal line between transfer controllers. CONSTITUTION:The voltage controlled delay circuit 11 is provided on the transfer request signal line between transfer control circuits C1 and C2. When long processing time is required, a code representing external memory access is decoded by a decoder Decode 1 at the front stage, and a value representing large delay is latched with a data latch LATCH1 in a state of active '1' with another data. Therefore. a P-channel transistor P3 is turned off, and a P-channel transistor P4 is turned on, and a high control voltage V1 set corresponding to a time required for the external memory access is impressed to the gate of the P-channel transistor P2 of the delay circuit 11, which reduces the amount of current between a power source and the ground. Therefore, the delay time of the delay circuit can be increased, which delays only the start of a transfer request signal S10.

88. 发明专利

JPH04145567A SIGNAL WAVEFORM SHAPING CIRCUIT AND INFORMATION PROCESSOR 失效
公开(公告)号：JPH04145567A
公开(公告)日：1992-05-19
申请号：JP26882190
申请日：1990-10-05
申请人： MITSUBISHI ELECTRIC CORP
发明人： ASAI FUMIYASU , KOMORI NOBUFUMI , TAMURA TOSHIYUKI , TSUBOTA HIRONO
IPC分类号： G06F13/42
摘要： PURPOSE:To safely convert the duty ratio of an input signal by connecting output terminals and trigger input terminals of cascade-connected flip flops to each other and commonly connecting the trigger input terminal of the initial- stage flip flop to the reset terminals of all flip flops. CONSTITUTION:When a master reset signal RST is set to a high level and an input signal IN rises to a high level, a flip flop 11 is set and its output Q1 becomes a high level. Then another flip flop 12 is set by the rise of the signal Q1 and the output Q2 of the flip flop 12 becomes a high level. Thus flip flops are successively set and the output signal OUT of a waveform shaping circuit becomes a high level after delay time tau corresponding to the number of stages of the cascade-connected flip flops. When the input signal IN drops to a low level thereafter, the flip flops 11-1N are reset at once and the output signal OUT drops to a low level. Therefore, even when the input signal has a large duty ratio, the duty ratio can be converted stably.

89. 发明专利

JPH0415854A WORD NUMBER CONVERSION CONTROLLER 失效
公开(公告)号：JPH0415854A
公开(公告)日：1992-01-21
申请号：JP12075390
申请日：1990-05-09
申请人： MITSUBISHI ELECTRIC CORP
发明人： ASAI FUMIYASU , KOMORI NOBUFUMI , TAMURA TOSHIYUKI , TSUBOTA HIRONO
IPC分类号： G06F13/36 , G06F5/00 , G06F13/38
摘要： PURPOSE:To reduce the number of input/output pins by providing a word number conversion control circuit and a data transfer control circuit. CONSTITUTION:Data latches L11, L21, L22, L31 and L32 being the temporary storage means of data, data transfer lines A, B and C, data transfer control circuits C11, C21, C22 and C31 transferring data by handshake control, and the word number conversion control circuit 33 are provided. In such a case, data on plural words are converted into one word by the word number conversion control circuit 33, and the arbitrary fields of one converted word are respectively outputted to plural data paths by the data transfer control circuit C11-C31 in accordance with a handshake procedure. Thus, the number of the input/output pins can be reduced and the processing circuit of a long processing bit length can easily be realized in single LSI.

90. 发明专利

JPH03230283A DATA PROCESSING METHOD AND DATA DRIVING TYPE COMPUTER 失效
公开(公告)号：JPH03230283A
公开(公告)日：1991-10-14
申请号：JP2681390
申请日：1990-02-05
申请人： MITSUBISHI ELECTRIC CORP
发明人： KOMORI NOBUFUMI , TSUBOTA HIRONO
IPC分类号： G06F15/82
摘要： PURPOSE:To make it possible to complete the execution of a program within a short time by outputting fixed data in order to abort the execution of data processing independently of inputted data. CONSTITUTION:In the case of aborting the execution of the program, an instruction for deciding repeating processing e.g. in the program stored in a rewritable storage means is rewritten to an instruction for outputting always constant data independently of inputted data and the rewritten instruction is executed. Thus, processing such as repeating processing requiring a long processing time is inhibited and the execution of the program is forcedly allowed to get out of the repeating processing to end the execution within a short time.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式