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71. 发明专利

JPS61234066A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS61234066A
公开(公告)日：1986-10-18
申请号：JP7422285
申请日：1985-04-10
申请人： HITACHI LTD
发明人： SAGARA KAZUHIKO , TAMAOKI YOICHI
IPC分类号： H01L27/10 , H01L21/8242 , H01L27/108 , H01L29/78
摘要： PURPOSE:To remarkably reduce the prescribed area by storing charge directly under a longitudinal transistor. CONSTITUTION:After an N-type epitaxial layer 2, a thermal oxide film 20 and a silicon nitride film 21 are formed on a P-type Si substrate 1, and unnecessary portion is selectively removed to form a partly projected structure. Then, after a polycrystalline silicon 5 is accumulated in a recess, the surface is oxidized to form a silicon dioxide film 7, a polycrystalline silicon 6 is further accumulated in the recess, flattened, and boron is doped in the silicon film 6 by ion implanting technique. Thereafter, when a heat treatment is executed, boron doped in the film 6 is diffused in the layer 2 from the side to form a P-type diffused layer 3, the desired portion of the film 6 is selectively oxidized, silicon dioxide films 7, 8 are formed. Thereafter, an arsenic is doped to form an N-type doped region 4, a contacting hole is formed at the film 8, and A1 electrodes 9-12 are formed.

72. 发明专利

JPS61104655A Semiconductor memory cell 失效
标题翻译：半导体存储器单元
公开(公告)号：JPS61104655A
公开(公告)日：1986-05-22
申请号：JP22573884
申请日：1984-10-29
申请人： Hitachi Ltd
发明人： HONMA NORIYUKI , NAKAMURA TORU , NAKAZATO KAZUO , MATSUMOTO MASAAKI , HAYASHIDA TETSUYA , KUBO SEIJI , SAGARA KAZUHIKO
IPC分类号： H01L29/73 , G11C11/41 , H01L21/331 , H01L21/8229 , H01L27/10 , H01L27/102 , H01L29/732
CPC分类号： H01L27/1025
摘要： PURPOSE:To obtain the small-sized memory cell reinforced in alpha-ray resistance which needs of addition of capacitors, by a method wherein a transistor is set in reverse action. CONSTITUTION:The conventional collector is used as the emitter of a transistor, and the conventional emitter as the collector. Therefore, a region n BL50 corresponds to an emitter 60 of the circuit diagram, and a region n BL51 to an emitter 61. (the emitters 60, 61 are regions n BL, which is shown by bold lines). This shows that electrons collecting to the regions n BL51, 51 collect to a bit line 62 and a word line 63, respectively; accordingly, these charges do not contribute to information breakdown. Then, with respect to the soft error caused by alpha rays, only charges generating in transistor parts (n , p, n parts) above the regions n BL can be considered, and the amount of charges generating in this part is much smaller than that in the Si p-substrate. Consequently, the title element becomes substantially strong to the soft error caused by alpha rays.
摘要翻译：目的：为了获得需要添加电容器的α射线电阻增强的小型存储单元，通过其中晶体管被设置为反向动作的方法。构成：传统的集电极用作晶体管的发射极，常规的发射极用作集电极。因此，区域n + BL50对应于电路图的发射极60，和发射极61的区域n + BL51（发射极60,61是区域n + BL，由粗线）。这表明收集到区域n + BL51,51的电子分别收集到位线62和字线63; 因此，这些费用不会对信息进行破坏。然后，对于由α射线引起的软误差，仅考虑在区域n + BL以上的晶体管部分（n +，p，n - ）部分产生的电荷，并且电荷量在该部分中的产生比Si p基板中的产生要小得多。因此，标题元素对于由α射线引起的软误差变得基本上很强。

73. 发明专利

JPS60194539A Manufacture of semiconductor device 失效
标题翻译：半导体器件的制造
公开(公告)号：JPS60194539A
公开(公告)日：1985-10-03
申请号：JP4906184
申请日：1984-03-16
申请人： Hitachi Ltd
发明人： SAGARA KAZUHIKO , TAMAOKI YOUICHI , ISOMAE SEIICHI
IPC分类号： H01L21/31 , H01L21/76
CPC分类号： H01L21/76
摘要： PURPOSE:To prevent a defect generated in a substrate by bringing the thickness of a silicon nitride film immediately before selective oxidation to a specific value or less and limiting the range of the temperature of selective oxidation. CONSTITUTION:A silicon dioxide film formed on a silicon substrate and a silicon nitride film shaped on the silicon dioxide film are used as masks for selective oxidation, the temperature of selective oxidation is brought to a temperature to 1,150 deg.C from 1,050 deg.C, and the thickness of a silicon nitride film is brought to 150nm or less. On a bipolar LSI, an N type collector buried layer 8 is formed to a silicon single crystal substrate 6, and an epitaxial layer 7 is grown on the layer 8. The whole is oxidized in a dried oxidizing atmosphere to form a silicon dioxide film 2, and a silicon nitride film 3 is deposited on the film 2 by using a CVD method. A pattern is shaped by employing a normal photoetching technique, element isolation grooves are formed by using a reactive ion etching technique, and a silicon dioxide film 5 is shaped through a wet oxygen atmosphere at 1,100 deg.C. The element isolation isolation grooves are filled with a silicon nitride film 9 and polycrystalline silicon 8, and the surfaces are coated with silicon dioxide films 13.
摘要翻译：目的：通过将氮化硅膜的紧密选择氧化之前的厚度设定在特定值以下，并限制选择氧化温度的范围，来防止在基板中产生的缺陷。构成：将形成在硅基板上的二氧化硅膜和形成在二氧化硅膜上的氮化硅膜用作选择性氧化的掩模，选择性氧化的温度从1050℃升至1150℃ ，氮化硅膜的厚度为150nm以下。在双极型LSI上，在硅单晶衬底6上形成N型集电极掩埋层8，在层8上生长外延层7.整体在干燥的氧化气氛中被氧化，形成二氧化硅膜2 并且通过使用CVD方法在膜2上沉积氮化硅膜3。通过使用正常的光刻技术对图案进行成形，通过使用反应离子蚀刻技术形成元件隔离槽，并且在1100℃下通过湿氧气氛成形二氧化硅膜5。元件隔离隔离槽填充有氮化硅膜9和多晶硅8，并且表面涂覆有二氧化硅膜13。

74. 发明专利

JPS5958838A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：JPS5958838A
公开(公告)日：1984-04-04
申请号：JP16835582
申请日：1982-09-29
申请人： Hitachi Ltd
发明人： TAMAOKI YOUICHI , SHIBA TAKEO , SAGARA KAZUHIKO , KAWAMURA MASAO
IPC分类号： H01L21/302 , H01L21/3065 , H01L21/331 , H01L21/76 , H01L21/762 , H01L21/763 , H01L29/73
CPC分类号： H01L21/76224 , H01L21/76 , H01L21/763
摘要： PURPOSE: To reduce wiring capacitance through a simple method by forming a shallow groove, an upper section thereof is coated with an insulating film, between deep narrow grooves for isolating an element, the surfaces thereof are coated with dielectrics.
CONSTITUTION: A buried collector layer 2 and an active layer 3 are superposed on the (100) face of an Si substrate 1, an Si
3 N
4 mask 5 is executed to the SiO
2 film 4 of the surface and windows 6, 8 are bored, and window width is made narrower than depth. The vertical grooves 9 are formed through reactive sputtering etching, SiO
2 4 is removed selectively, and the groove 10 shallower than the layer 2 and grooves 11 deeper than that are formed through second etching. The surface is coated with SiO
2 12, the film 5 is removed, and poly Si 14 is deposited through novel Si
3 N
4 13 to fill the grooves. The layer 14 is removed through isotropic etching, Si
3 N
4 13 is exposed, and SiO
2 15 is formed to the surface of the poly Si 14 and coated with Si
3 N
4 16. A transistor is manufactured through a predetermined method. In a bipolar device by the constitution, wiring capacitance is reduced because there are thick oxide films 12, 15 in an isolation region, and a circuit is accelerated by approximately 50%.
COPYRIGHT: (C)1984,JPO&Japio
摘要翻译：目的：为了通过简单的方法通过形成浅沟槽来减少布线电容，其上部分覆盖有用于隔离元件的深窄沟槽之间的绝缘膜，其表面被电介质涂覆。构成：将掩埋集电极层2和有源层3重叠在Si衬底1的（100）面上，对表面的SiO 2膜4施加Si 3 N 4掩模5，并且窗口6,8被钻孔，并且窗口宽度比深度更窄。通过反应性溅射蚀刻形成垂直槽9，选择性地除去SiO 2，并且比第二蚀刻浅的槽10和比第二蚀刻形成的槽11更深的沟槽10。表面涂有SiO 2 12，除去膜5，通过新颖的Si 3 N 4 13沉积多晶硅14以填充凹槽。通过各向同性蚀刻去除层14，暴露Si 3 N 4 13，并且在多晶Si 14的表面上形成SiO 15并涂覆有Si 3 N 4 16.通过预定方法制造晶体管。在通过该结构的双极型器件中，由于在隔离区域中存在厚的氧化物膜12,15，并且电路加速了大约50％，所以布线电容减小。

75. 发明专利

JP2007259386A Communication system and communication device 有权
标题翻译：通信系统和通信设备
公开(公告)号：JP2007259386A
公开(公告)日：2007-10-04
申请号：JP2006084673
申请日：2006-03-27
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： OKUBO KEIKO , MIYAGI MORIHITO , SAGARA KAZUHIKO
IPC分类号： H04L9/32 , G09C1/00 , H04L9/08 , H04L12/28
摘要： PROBLEM TO BE SOLVED: To provide high security by preventing eavesdropping, an unauthorized use of an access point (AP), and impersonation of the AP in a wireless LAN system. SOLUTION: Key information upon previous communication is recorded in an AP 101 and a terminal device (STA) 103 to be used as authentication information upon new communication. For example, the STA 103 reads the previous key information recorded upon new communication negotiation to be transmitted to the AP 101. The AP 101 authenticates the STA 103 based on the key information received and the key information recorded in its own device. Also, a PMK generation function is provided to the STA 103, so that different PMK is used per communication. Furthermore, a pair of asymmetric keys of a public key cryptosystem is set to the AP 101 and the STA 103, and the public key cryptosystem is used upon transmission and reception of the PMK and the authentication information (including previous key information) between both of the AP 101 and the STA 103, so that eavesdropping and impersonation are prevented. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：通过防止窃听，未经授权的使用接入点（AP）和在无线LAN系统中模拟AP来提供高安全性。解决方案：先前通信中的密钥信息被记录在AP 101和终端设备（STA）103中，以在新的通信时用作认证信息。例如，STA103读取在新的通信协商中记录的要发送给AP 101的密钥信息.AP 101根据接收到的密钥信息和记录在其自己的设备中的密钥信息来认证STA 103。此外，向STA 103提供PMK生成功能，使得每个通信使用不同的PMK。此外，将公开密钥密码系统的一对非对称密钥设置到AP 101和STA 103，并且在发送和接收PMK时使用公共密钥密码系统，并且在两者之间的认证信息（包括先前密钥信息） AP 101和STA 103，从而防止窃听和冒充。版权所有（C）2008，JPO＆INPIT

76. 发明专利

JP2007110377A Network system 审中-公开
标题翻译：网络系统
公开(公告)号：JP2007110377A
公开(公告)日：2007-04-26
申请号：JP2005298579
申请日：2005-10-13
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： OKUBO KEIKO , MIYAGI MORIHITO , SAGARA KAZUHIKO , YAMAOKA RYOJI
IPC分类号： H04L9/32
摘要： PROBLEM TO BE SOLVED: To provide a network system capable of authenticating a client even in an authentication server at a movement destination retaining no authentication data of the client concerned, by making cooperation between authentication servers.
SOLUTION: A wide area network system includes a plurality of authentication domains, each having one or more authentication servers, connected through a network. The authentication server retains the relationship of reliability formed between each authentication server, issues an authentication ticket having a validity period to the client of which authentication data are retained in the self-server, examines the validity of the authentication ticket issued by another authentication server to which the relationship of reliability is being formed, and decides to be a successful authentication when the validity of the above authentication ticket is confirmed.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：通过在认证服务器之间进行协作，提供即使在移动目的地的认证服务器中也能够认证客户端的认证数据的网络系统。解决方案：广域网系统包括多个认证域，每个认证域具有通过网络连接的一个或多个认证服务器。认证服务器保留在每个认证服务器之间形成的可靠性的关系，向自身服务器中保留认证数据的客户端发出具有有效期的认证券，检查由另一认证服务器发出的认证券的有效性确定可靠性的关系，并且当确认上述认证券的有效性时，决定成功地进行认证。版权所有（C）2007，JPO＆INPIT

77. 发明专利

JP2005244405A Communication controller, communication network and method for updating packet transfer control information 有权
标题翻译：通信控制器，通信网络和用于更新分组传送控制信息的方法
公开(公告)号：JP2005244405A
公开(公告)日：2005-09-08
申请号：JP2004049121
申请日：2004-02-25
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： SAGARA KAZUHIKO
IPC分类号： H04L12/70 , H04L29/02 , H04L12/56
CPC分类号： H04L45/50 , H04L45/02 , H04L45/64
摘要： PROBLEM TO BE SOLVED: To provide a communication controller arranged to control packet transfer dynamically in a communication network while conforming to communication system and quality specified by a user. SOLUTION: A control node having a function for updating packet transfer control information in response to a control packet transmitted from a user terminal prior to data communication and broadcasting (advertising) the updated packet transfer control information to other node in a packet communication network is arranged in the packet communication network. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种通信控制器，其被设置为在符合用户指定的通信系统和质量的同时在通信网络中动态地控制分组传送。解决方案：控制节点具有响应于在数据通信之前从用户终端发送的控制分组来更新分组传送控制信息的功能，并且在分组通信中广播（广告）更新的分组传送控制信息到其他节点网络被布置在分组通信网络中。版权所有（C）2005，JPO＆NCIPI

78. 发明专利

JPH09270801A DYNAMIC PATH CONTROL SYSTEM 失效
公开(公告)号：JPH09270801A
公开(公告)日：1997-10-14
申请号：JP7857596
申请日：1996-04-01
申请人： HITACHI LTD
发明人： SAGARA KAZUHIKO , OTA MASATAKA
IPC分类号： H04Q3/00 , H04L12/28
摘要： PROBLEM TO BE SOLVED: To control a bypass route even on the occurrence of a link fault in real time in the case of a network large in the number of switching nodes. SOLUTION: A link 16 in which congestion is most probably caused in a network is estimated, and a congestion monitor point is set to a switch of the link 16. Furthermore, an optimum route and a route when the link 16 is interrupted are calculated in advance, and a routing table for them is arranged distributedly in each node. A congestion notice is conducted by a network manager in the case of a packet network and by using a congestion notice cell 15 in the case an ATM network.

79. 发明专利

JPH098812A ATM EXCHANGE SYSTEM 失效
公开(公告)号：JPH098812A
公开(公告)日：1997-01-10
申请号：JP15294795
申请日：1995-06-20
申请人： HITACHI LTD
发明人： SAGARA KAZUHIKO , TAKASE MASAHIKO
IPC分类号： H04Q3/00 , H04L12/28
摘要： PURPOSE: To provide an ATM switch which can set a cell loss less than a prescribed value. CONSTITUTION: Output interfaces 3 connected to the respective output ports 5 of the ATM switch 1 are provided with separation circuits 13 for branching an output cell into plural exit paths and observation circuits 12 provided for the entrances of the separation circuits. When the concentration of traffic to the specified exit path is predicted in the observation circuit 12, cell abolishment in an output buffer can be avoided or reduced by dynamically increasing the capacity of the buffer accumulating the output cells to the specified exit path in the separation circuit. Thus, the cell loss in traffic can be set less than the prescribed value by dynamically changing the capacity of the buffer in the separation circuit.

80. 发明专利

JPH06176000A NEUROCOMPUTER 失效
公开(公告)号：JPH06176000A
公开(公告)日：1994-06-24
申请号：JP33020192
申请日：1992-12-10
申请人： HITACHI LTD
发明人： ANSONII SUMISU , SAGARA KAZUHIKO
IPC分类号： G06F15/18 , G06G7/60 , G06N3/10 , G06N99/00
摘要： PURPOSE:To effectively utilize a memory space by compressing input data in terms of hardwares based on a certain algorithm considering that the effective utilization of the memory space for preserving weighted values is required at the time of constituting a large scale neural network. CONSTITUTION:A main memory unit, a compression unit and an extension unit are added to a neurocomputer. By classifying the weighted value input data of 16 bits into four levels and allocating them to low-order bits in the descending order of an appearance frequency, the data are compressed. As for the hardwares, only a memory LSI equivalent to 10K bytes is added. By using this system, approximately 16% of a memory area can be compressed. Also, since a symbol table or the like is not required and the system can be realized by a simple circuit, an execution speed is fast and the system is extremely suitable for the realization of a real-time neurocomputer.

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