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71. 发明专利

JP2000244053A OPTICAL OUTPUT CONTROL CIRCUIT 失效
公开(公告)号：JP2000244053A
公开(公告)日：2000-09-08
申请号：JP4217899
申请日：1999-02-19
申请人： FUJITSU LTD
发明人： INOUE TADAO , IKEUCHI AKIRA , MUTSUKAWA HIROYUKI , KAWAI MASAAKI , UENO NORIO , MURAKAMI NORIO , MATSUYAMA SATORU , MIKI MAKOTO , TAKAUJI TOSHIYUKI
IPC分类号： H01L33/00 , H01S5/00 , H01S5/068 , H01S5/0683
摘要： PROBLEM TO BE SOLVED: To shorten the rising time of operation by performing rising mode control through an optical output controller until the number of controlling times reached a predetermined value after starting control and performing safety mode control through the optical output controller upon reaching the predetermined value. SOLUTION: Coarse/fine operation of a counter 16 is controlled by a signal from a coarse/fine switching circuit 26 which is controlled by a clock and a reset signal 27. The coarse operation mode is finished after the count of a counter in the coarse/fine switching circuit 26 reaches 32 and then the output from the circuit 26 goes Low to cause a switching to fine operation mode. In the fine operation mode, the counter 16 changes by a minimum unit at a time and the drive current is varied and eventually settled. After a target value is reached, the current reciprocates between two values closest to the target value. The number of times for updating the counter 16 is 32 or less after the fine operation mode is entered before the final value is settled.

72. 发明专利

JP2530368B2 失效
公开(公告)号：JP2530368B2
公开(公告)日：1996-09-04
申请号：JP9704089
申请日：1989-04-17
申请人： FUJITSU LTD
发明人： NAITO HIDETOSHI , OOTSUKA TOMOYUKI , KAWAI MASAAKI , KONDO RYUICHI
IPC分类号： H01L33/00

73. 发明专利

JPH08167906A EXCHANGE 失效
公开(公告)号：JPH08167906A
公开(公告)日：1996-06-25
申请号：JP31141294
申请日：1994-12-15
申请人： FUJITSU LTD
发明人： TOMONAGA HIROSHI , MATSUOKA NAOKI , KAWAI MASAAKI
IPC分类号： H04Q3/42 , H04L12/70 , H04L12/813 , H04L12/931 , H04Q3/00 , H04L12/28
摘要： PURPOSE: To make a line interface device small in size. CONSTITUTION: The exchange is provided with a line adaptor section 10 accommodating lines and processing information from the lines in the unit of cells, and the line adaptor section 10 is provided with a basic processing section 5 applying basic processing to cells and with an adaptive processing section 7 mounted removably to the basic processing section 5 and applying adaptive processing section to cells.

74. 发明专利

JPH06276185A SYNCHRONIZATION PROTECTIVE CIRCUIT 失效
公开(公告)号：JPH06276185A
公开(公告)日：1994-09-30
申请号：JP6444193
申请日：1993-03-24
申请人： FUJITSU LTD
发明人： HIGUCHI HIROKI , KAWAI MASAAKI
IPC分类号： H04J3/00 , H04J3/06 , H04L7/08 , H04L12/48
摘要： PURPOSE:To provide the synchronization protective circuit of a small circuit scale by outputting synchronization/asynchronization flags from a flag inversion part when a frame pattern is detected at a prescribed position and when it is not detected by a control condition output circuit. CONSTITUTION:Whether or not FP is detected at the prescribed position is judged by a frame pattern FP detection circuit 20, a master counter 21, a decoder 10 and the control condition output circuit 24. When the FP is detected at the prescribed position during a rear protective operation by the control of the circuit 24, a sub counter 22 is counted up. When the prescribed FP is detected at the prescribed position over (m) frames, it is defined that synchronization is attained and the circuit 24 sends a flag inversion signal to a flag inversion blade 23 and lets the synchronization flag outputted. Also, when the prescribed FP is not detected at the prescribed position over (n) frames in a synchronous state, it is defined that asynchronization is attained and the circuit 24 sends the flag inversion signal to the flag inversion part 23 and lets the asynchronization flag outputted. Thus, regardless of the number of frames, the synchronization protective circuit of the small circuit scale with two counters can be obtained.

75. 发明专利

JPH06204633A CORRECTION OF PRINTED WIRING 失效
公开(公告)号：JPH06204633A
公开(公告)日：1994-07-22
申请号：JP100493
申请日：1993-01-07
申请人： FUJITSU LTD
发明人： IKEDA TOSHIMI , KAWAI MASAAKI , NAITO HIDETOSHI , TAKIZAWA YUJI , TAJIMA KAZUYUKI , SATO HIROYUKI
IPC分类号： H05K1/11 , H05K1/14 , H05K3/22
摘要： PURPOSE:To simplify the correcting work and to perform the correcting work positively with regard to the correcting method of a printed wiring for performing the correction of the printed wiring, which is formed on a printed wiring board, on which electronic parts are mounted, by electroless plating, and etching, and becomes the electric interconnection line between the terminals of individual parts based on the intended constitution of an electronic circuit. CONSTITUTION:In the correcting method of a printed wire, by which correction is performed in the intended sections of printed wiring 13 formed on a printed wiring board 11, a shape, wherein the overlapping with an already mounted part in a region held with the terminating parts of the section on the printed wiring board 11 is avoided, and a wiring 15, which is formed in parallel with the terminating parts in the overlapped arrangement and associated with the correction, are provided. A substrate 17, which is stuck on the printed wiring board 11 and aids the correcting work, is provided.

76. 发明专利

JPH06152378A INPUT/OUTPUT INTERFACE CIRCUIT 失效
公开(公告)号：JPH06152378A
公开(公告)日：1994-05-31
申请号：JP30330892
申请日：1992-11-13
申请人： FUJITSU LTD
发明人： KAWAI MASAAKI , NAITO HIDETOSHI , TAKIZAWA YUJI , TAJIMA KAZUYUKI , IKEDA TOSHIMI , SATO HIROYUKI
IPC分类号： H03K19/018
摘要： PURPOSE:To prevent the influence of variation in power supply voltage by simple constitution in respect to an I/O interface circuit consisting of ECL circuits to be driven by single positive power supply voltage. CONSTITUTION:In the I/O interface circuit provided with an output interface part 3 having an output buffer 1 and an output transistor(TR) 2 consisting of an ECL circuit and an input interface part 6 having an input buffer 4 and a reference circuit 5 consisting of an ECL circuit and allowed to be driven by single positive power supply voltage, a band gap reference circuit 7 for impressing stabilized operation voltage VCC to the ground GND is provided to the buffer 1 and the TR 2 of the output interface 3.

77. 发明专利

JPH0669988A ALARM TRANSFER SYSTEM 失效
公开(公告)号：JPH0669988A
公开(公告)日：1994-03-11
申请号：JP22379192
申请日：1992-08-24
申请人： FUJITSU LTD
发明人： TAKIZAWA YUJI , KAWAI MASAAKI , NAITO HIDETOSHI , TAJIMA KAZUYUKI , IKEDA TOSHIMI
IPC分类号： G08B25/00 , H04L29/14 , H04Q9/00
摘要： PURPOSE:To provide the alarm transfer system in which generated alarms are all collected through the use of a communication line with a low transmission capacity concerning to the system transferring the alarm to a high-order monitor system. CONSTITUTION:The alarm transfer system transferring an alarm generated in an alarm generating source 1 to a high-order monitor system is provided with an alarm pattern detection section 2, which compares an alarm pattern registered in advance with a pattern of an inputted alarm and with a detection alarm mask section 3 generating information representing the detection of a registered pattern when the registered pattern is a partial set of the input alarm generated within a same period of time, and with an alarm individual transfer section 4 masking a part corresponding to the registered pattern in the input alarm on the occurrence of the registered pattern detection information to transfer the information representing the detection of the registered pattern and the residual alarm not masked in the input alarm to a high-order monitor system.

78. 发明专利

JPH04247711A CURRENT COMBINING CIRCUIT 失效
公开(公告)号：JPH04247711A
公开(公告)日：1992-09-03
申请号：JP1310591
申请日：1991-02-04
申请人： FUJITSU LTD
发明人： WATABE HISAKO , KAWAI MASAAKI
IPC分类号： H03H11/16 , H04L27/18
摘要： PURPOSE:To maintain the level for the signal unchanged even when an emitter- follower circuit is connected with the side of the input for the signal regarding the current combining circuit which is used by the plural cascade connection in the phase variable circuit for adjusting the signal phase by the voltage control continuously. CONSTITUTION:The current combining circuit combines the output signals So1, So2 having the different phases from the input signals Si1-Si4 from them by changing the ratio of current combining in accordance with the voltage control signals Vc1, Vc2. A couple of the differential amplifiers 11, 12 performs the current combining for the input signals Si1-Si4 supplied to each base for the two couples of switching transistors 111, 112 and 121, 122. Current control circuits 13-16 are connected with each switching transistors 111, 112, 121 and 122 in the each differential amplifiers 11, 12 on the side of the collector and controlled by the voltage control signals Vc1 and Vc2.

79. 发明专利

JPH0490207A OUTPUT OPERATING POINT VARYING SYSTEM 失效
公开(公告)号：JPH0490207A
公开(公告)日：1992-03-24
申请号：JP20239290
申请日：1990-08-01
申请人： FUJITSU LTD
发明人： KAWAI MASAAKI , KITAGAWA SHOJI , IMAI KEISUKE
IPC分类号： H03F3/21 , H03F3/20
摘要： PURPOSE:To vary an output operating point of an amplifier circuit without changing a cut-off frequency by providing an intermediate stage amplifier circuit comprising a source follower circuit whose source side load is made variable between an output of a pre-stage amplifier circuit and an amplifier circuit of an output stage. CONSTITUTION:An intermediate stage amplifier circuit 3 comprising a source follower circuit whose source side load is made variable between an output of a pre-stage amplifier circuit 1 having a common source circuit at its first stage and an amplifier circuit 2 of an output stage comprising a source follower circuit. FETs Q6A, Q6B of the amplifier circuit 3 are connected in parallel to form a source follower circuit and drains of FETs Q7A, Q7B are connected in common to the Q6A, Q6B and sources of the Q6A, Q6B are connected to a load. When a gate voltage VCONT' of the Q7B is changed, a current I1 is going to change and the current I1 is kept constant by the Q6A, Q6B. Thus, when the controlling voltage VCONT' is increased, a VDS of the Q7A is decreased, the potential at a point D is decreased, and when the voltage VCONT' is lowered conversely, the potential at the point D is increased to make an output operating point variable.

80. 发明专利

JPH0485980A OPTICAL OUTPUT CONTROL SYSTEM 失效
公开(公告)号：JPH0485980A
公开(公告)日：1992-03-18
申请号：JP19909790
申请日：1990-07-30
申请人： FUJITSU LTD
发明人： KAWAI MASAAKI , TAJIMA KAZUYUKI , WATABE HISAKO
IPC分类号： H01S5/068
摘要： PURPOSE:To facilitate regulation of a pulse current controller by controlling to generate a control voltage of a pulse current so as to become a predetermined ratio to a current for monitoring a bias current of a laser element, and supplying the pulse current to the element in amplitude to be decided in response to the control voltage of the pulse current. CONSTITUTION:The optical output of a laser element 1 is monitored by bias current supply means 2, a bias current is supplied to the element 1 so that the output becomes constant, and a current for monitoring the bias current of the element 1 is generated by bias current monitoring means 3. Control means 4 so controls as to generate a control voltage of the pulse current as to become a predetermined ratio to the current for monitoring the bias current of the element 1. Then, the pulse current is supplied to the element 1 in amplitude to be decided in response to the control voltage of the pulse current by pulse current supply means 5. Thus, the variation amount of the bias current is directly used to regulate the pulse current controller, and hence the regulation of the controller is facilitated.

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