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71. 发明专利

JP2012186408A Semiconductor device manufacturing method and semiconductor device manufacturing apparatus 审中-公开
标题翻译：半导体器件制造方法和半导体器件制造设备
公开(公告)号：JP2012186408A
公开(公告)日：2012-09-27
申请号：JP2011049880
申请日：2011-03-08
申请人： Teramikros Inc , 株式会社テラミクロス
发明人： SHIODA JUNJI
IPC分类号： H01L23/12
CPC分类号： H01L2224/11
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor manufacturing method which can inhibit, in calcination processing of an encapsulation layer, formation of voids during the encapsulation and density ununiformity of a filler for an encapsulation material, and to provide a semiconductor device manufacturing apparatus used for the manufacturing method.SOLUTION: Prior to formation of an encapsulation layer 17 on a top face of a semiconductor wafer 21, degasification processing for discharging and removing a gas composition such as moisture adsorbed or contained in the semiconductor wafer 21, a protection film 14 and the like is performed. The degasification processing is performed by performing heat treatment on the semiconductor wafer 21 under a predetermined condition and a time condition, under an atmosphere where a nitrogen concentration is increased, for example, and in a state of facing the top face side (device surface side) of the semiconductor wafer 21, on which wiring 15, an external connection electrode 16 and the like are formed, downward (reversed).
摘要翻译：要解决的问题：提供一种半导体制造方法，其可以在包封层的煅烧处理期间抑制在封装期间形成空隙，并且在封装材料的填充材料的密度不均匀性的作用下提供半导体器件制造用于制造方法的装置。解决方案：在半导体晶片21的顶面上形成封装层17之前，用于排出和除去吸附或包含在半导体晶片21中的气体组合物的脱气处理，保护膜14和喜欢执行。通过在预定条件和时间条件下，在氮浓度增加的气氛下，在半导体晶片21上进行热处理，并且在面对顶面（装置表面侧）的状态下进行脱气处理），其上形成布线15，外部连接电极16等的半导体晶片21向下（反向）。版权所有（C）2012，JPO＆INPIT

72. 发明专利

JP2012182307A Print mask, printing method using print mask, and manufacturing method of semiconductor device 审中-公开
标题翻译：打印掩模，使用打印掩模的印刷方法和半导体器件的制造方法
公开(公告)号：JP2012182307A
公开(公告)日：2012-09-20
申请号：JP2011044093
申请日：2011-03-01
申请人： Teramikros Inc , 株式会社テラミクロス
发明人： KIDO TOSHIHIRO
IPC分类号： H05K3/46 , H05K3/12
摘要： PROBLEM TO BE SOLVED: To enable stable solder printing to be performed on bottom surfaces of recessed parts even though there are variations in the depth of each recessed part provided on the upper surface side of a multilayer printed board.SOLUTION: A print mask includes: a plate like print mask body 22; a dish like part 23 provided on the print mask body 22 so as to be recessed; multiple first openings 24 provided on a bottom plate of the dish like part 23; an elastically deformable heigh adjustment film 25 provided on a lower surface of the bottom plate of the dish like part 23 and formed by urethane rubber or the like; second openings 26 provided on the heigh adjustment film 25 so as to correspond to the first openings 24 of the dish like part 23. The print mask is used as a print mask 21. Even though there are variations in the depth of the recessed parts 4 of multilayer printed boards 1, this structure absorbs the variations in the depth of the recessed parts 4 of the multilayer printed boards 1 with elastic deformation of the heigh adjustment film 25. Hence, stable solder printing is performed.
摘要翻译：要解决的问题：即使在设置在多层印刷电路板的上表面侧的每个凹部的深度方面存在变化，也能够使凹部的底面上进行稳定的焊锡印刷。解决方案：打印面罩包括：板状印刷面罩主体22; 设置在打印面罩主体22上以凹进的盘状部分23; 多个第一开口24设置在盘状底部的板状部分23上; 设置在盘状部分23的底板的下表面上并由聚氨酯橡胶等形成的可弹性变形的高度调节膜25; 第二开口26设置在高度调节膜25上，以对应于盘状部分23的第一开口24.打印掩模用作打印掩模21.即使凹陷部分4的深度有变化的多层印刷电路板1，这种结构利用高度调节膜25的弹性变形吸收多层印刷电路板1的凹部4的深度变化。因此，进行稳定的焊锡印刷。版权所有（C）2012，JPO＆INPIT

73. 发明专利

JP2012164837A Wiring pattern, manufacturing method of the same and semiconductor device 审中-公开
标题翻译：接线图及其制造方法及半导体器件
公开(公告)号：JP2012164837A
公开(公告)日：2012-08-30
申请号：JP2011024542
申请日：2011-02-08
申请人： Teramikros Inc , 株式会社テラミクロス
发明人： ISHIWATARI SHINYA
IPC分类号： H05K1/02 , H01L21/3205 , H01L21/768 , H01L23/12 , H01L23/522
CPC分类号： H01L2224/04105 , H01L2224/12105 , H01L2224/20 , H01L2224/32225 , H01L2224/73267 , H01L2224/19 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To thin an insulation layer covering a wiring pattern as much as possible.SOLUTION: A wiring pattern 1 comprises first wiring 2 having a first pair of terminals 3, 4 and a plurality of first routing parts 5 connecting the first pair of terminals 3, 4, and second wiring 6 having a second pair of terminals 7, 8 and at least one second routing part 9 connecting the second pair of terminals 7, 8.
摘要翻译：要解决的问题：尽可能薄化覆盖布线图案的绝缘层。解决方案：布线图案1包括具有第一对端子3,4的第一布线2和连接第一对端子3,4的多个第一路由部分5和具有第二对端子的第二布线6 7，8以及连接第二对终端7,8的至少一个第二路由部分9.版权所有：（C）2012，JPO＆INPIT

74. 发明专利

JP4990492B2 Semiconductor device 有权
公开(公告)号：JP4990492B2
公开(公告)日：2012-08-01
申请号：JP2004335712
申请日：2004-11-19
申请人：株式会社テラミクロス
发明人：裕康定別当
IPC分类号： H01L23/12 , H01L27/14
CPC分类号： H01L2224/12105 , H01L2224/19 , H01L2224/73267 , H01L2924/14 , H01L2924/00 , H01L2924/00012

75. 发明专利

JP4987910B2 Process for producing a solder layer of a semiconductor device, a dicing method of a manufacturing method and a semiconductor device of a mark of a semiconductor device 有权
公开(公告)号：JP4987910B2
公开(公告)日：2012-08-01
申请号：JP2009122618
申请日：2009-05-21
申请人：株式会社テラミクロス
发明人：智宏伊藤 , 伸治脇坂
IPC分类号： H01L23/12
CPC分类号： H01L2224/11 , H01L2924/014 , H01L2924/14

76. 发明专利

JP4977169B2 Semiconductor device and a method of manufacturing the same 有权
公开(公告)号：JP4977169B2
公开(公告)日：2012-07-18
申请号：JP2009124512
申请日：2009-05-22
申请人：株式会社テラミクロス
发明人：裕康定別当
IPC分类号： H01L23/12
CPC分类号： H01L24/97 , H01L2224/04105 , H01L2224/12105 , H01L2224/18 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/92244 , H01L2224/97 , H01L2224/83
摘要： PROBLEM TO BE SOLVED: To easily form a through-hole for forming a vertical conduction portion with respect to a semiconductor device provided with the vertical conduction portion in an insulating layer made of a prepreg material at a periphery of a semiconductor constitution body called a CSP. SOLUTION: A ground layer 2 is provided on a base plate 1, and the semiconductor constitution body 3 is provided thereupon; and first and second insulating layers 15 and 18 are provided at a periphery thereof, and upper-layer wiring 22 is provided thereupon with an upper-layer insulating film 19 interposed. In this case, the first insulating layer 15 is made of the prepreg material, and the second insulating layer 18 is made of only a thermosetting resin extruded from the prepreg material. The first insulating layer has a plurality of slits 16a formed to communicate the outside thereof with the inside of an opening 16, and the second insulating layer 18 is provided in the slits 16a. COPYRIGHT: (C)2009,JPO&INPIT

77. 发明专利

JP4974384B2 A method of manufacturing a semiconductor device 有权
公开(公告)号：JP4974384B2
公开(公告)日：2012-07-11
申请号：JP2008228822
申请日：2008-09-05
申请人：株式会社テラミクロス
发明人：一郎三原 , 猛若林
IPC分类号： H01L23/12 , H01L21/301 , H01L21/304 , H01L21/3205 , H01L21/768 , H01L23/522
CPC分类号： H01L2224/11

78. 发明专利

JP4956465B2 A method of manufacturing a semiconductor device 有权
公开(公告)号：JP4956465B2
公开(公告)日：2012-06-20
申请号：JP2008053082
申请日：2008-03-04
申请人：株式会社テラミクロス
发明人：員拓増田
IPC分类号： H01L23/12 , H01L21/3205 , H01L21/768 , H01L21/822 , H01L23/522 , H01L23/532 , H01L27/04
CPC分类号： H01L2224/11

79. 发明专利

JP4956048B2 Semiconductor device and a method of manufacturing the same 有权
公开(公告)号：JP4956048B2
公开(公告)日：2012-06-20
申请号：JP2006139683
申请日：2006-05-19
申请人：株式会社テラミクロス
发明人：伸治脇坂
IPC分类号： H01L25/10 , H01L23/12 , H01L25/11 , H01L25/18
CPC分类号： H01L2224/12105 , H01L2224/16225 , H01L2224/19 , H01L2224/32245 , H01L2224/73267 , H01L2224/92244 , H01L2924/14 , H01L2924/15311 , H01L2924/00 , H01L2924/00012

80. 发明专利

JP2012079867A Semiconductor device and manufacturing method therefor 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2012079867A
公开(公告)日：2012-04-19
申请号：JP2010222699
申请日：2010-09-30
申请人： Teramikros Inc , 株式会社テラミクロス
发明人： FURUYA AIKO
IPC分类号： H01L21/02 , H01L21/301 , H01L23/12 , H01L25/065 , H01L25/07 , H01L25/18
CPC分类号： H01L2224/48091 , H01L2224/73204 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To decrease the number of manufacturing processes in a semiconductor device having a structure in which two semiconductor components called a CSP (Chip Size Package) are laminated.SOLUTION: The lower surface of a first semiconductor wafer 21a on which a sealing film 12a or the like is formed is directly adhered to the upper surface of a second semiconductor wafer 21b below which a sealing film 12b or the like is formed. Then, the first and second semiconductor wafers are cut along a dicing street 22 to obtain a plurality of semiconductor devices having a structure in which two semiconductor components called CSP are laminated. With this manufacturing method, the number of manufacturing processes can be decreased compared to a case where two semiconductor components called a CSP are separately manufactured and then these two semiconductor components are laminated.
摘要翻译：要解决的问题：为了减少具有被称为CSP（芯片尺寸封装）的两个半导体部件的结构的半导体器件的制造工艺的数量。解决方案：其上形成有密封膜12a等的第一半导体晶片21a的下表面直接粘附到形成有密封膜12b等的第二半导体晶片21b的上表面。然后，沿着切割街22切割第一和第二半导体晶片，以获得具有被称为CSP的两个半导体部件层叠的结构的多个半导体器件。利用这种制造方法，与分别制造称为CSP的两个半导体部件并且然后这两个半导体部件层叠的情况相比，可以减少制造工艺的数量。版权所有（C）2012，JPO＆INPIT

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