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61. 发明专利

JP2014022487A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2014022487A
公开(公告)日：2014-02-03
申请号：JP2012158405
申请日：2012-07-17
申请人： Fujitsu Semiconductor Ltd , 富士通セミコンダクター株式会社
发明人： ONODA MICHIHIRO
IPC分类号： H01L21/336 , H01L21/8234 , H01L27/088 , H01L29/78
CPC分类号： H01L29/7833 , H01L21/823814 , H01L27/0922 , H01L29/0611 , H01L29/0653 , H01L29/0696 , H01L29/086 , H01L29/1087 , H01L29/402 , H01L29/66689 , H01L29/7816
摘要： PROBLEM TO BE SOLVED: To provide a high-performance semiconductor device having an LDMOS transistor capable of achieving a desired withstand voltage in various purposes of use.SOLUTION: A semiconductor device comprises: a first-conductivity-type semiconductor substrate; a second-conductivity-type first region formed in the semiconductor substrate; a first-conductivity-type second region formed in the first region; a second-conductivity-type source region formed in the second region; a second-conductivity-type drain region formed in the first region; a first junction portion having a part of the interface between the first region and the second region at the drain region side; a second junction portion having a part of the interface between the first region and the second region at the different position of the first junction portion; a gate electrode formed above the first junction portion; and a conductor formed above the second junction portion and being electrically independent from the gate electrode.
摘要翻译：要解决的问题：提供具有能够在各种使用目的中实现期望耐受电压的LDMOS晶体管的高性能半导体器件。解决方案：半导体器件包括：第一导电型半导体衬底; 形成在所述半导体衬底中的第二导电型第一区域; 形成在所述第一区域中的第一导电型第二区域; 形成在所述第二区域中的第二导电型源极区域; 形成在所述第一区域中的第二导电型漏极区域; 第一接合部，其在所述漏极区侧具有在所述第一区域和所述第二区域之间的界面的一部分; 第二接合部分，其具有在所述第一接合部分的不同位置处的所述第一区域和所述第二区域之间的界面的一部分; 形成在所述第一接合部的上方的栅电极; 以及形成在第二接合部分上方并且与栅电极电独立的导体。

62. 发明专利

JP2013105898A Method for manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2013105898A
公开(公告)日：2013-05-30
申请号：JP2011248817
申请日：2011-11-14
申请人： Sumitomo Electric Device Innovations Inc , 住友電工デバイス・イノベーション株式会社
发明人： KOYAMA MASATOSHI , MATSUURA KAZUAKI , KOMATANI TSUTOMU
IPC分类号： H01L21/3065 , H01L21/336 , H01L21/338 , H01L29/778 , H01L29/78 , H01L29/786 , H01L29/812
CPC分类号： H01L29/0611 , H01L21/02104 , H01L21/02107 , H01L21/0217 , H01L21/31116 , H01L29/0649 , H01L29/0692 , H01L29/2003 , H01L29/41758 , H01L29/66045 , H01L29/66462 , H01L29/66568 , H01L29/7786
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device, which is capable of suppressing a leakage current and variations in threshold voltage due to charge-up.SOLUTION: The present invention is the method for manufacturing a semiconductor device, which comprises the steps of: providing, in a semiconductor layer, an FET 34 including an active region 30, a scribe line 36 comprising an active region 30, an inactive region 32 positioned between the FET 34 and the scribe line 36, and a connection region 38 electrically connecting the FET 34 and the scribe line 36 across the inactive region 32; forming an insulating film 20 on the semiconductor layer; and selectively forming an opening 21 in the insulating film 20 by a dry etching method.
摘要翻译：要解决的问题：提供一种能够抑制泄漏电流和由于充电引起的阈值电压的变化的半导体器件的制造方法。解决方案：本发明是一种制造半导体器件的方法，其包括以下步骤：在半导体层中提供包括有源区30的FET 34，包括有源区30的划线36，位于FET34和划线36之间的非活性区域32以及跨越非活性区域32电连接FET34和划线36的连接区域38; 在半导体层上形成绝缘膜20; 并通过干蚀刻方法在绝缘膜20中选择性地形成开口21。版权所有（C）2013，JPO＆INPIT

63. 发明专利

JP5167323B2 Semiconductor device 有权
公开(公告)号：JP5167323B2
公开(公告)日：2013-03-21
申请号：JP2010221534
申请日：2010-09-30
申请人：トヨタ自動車株式会社 , 株式会社豊田中央研究所
发明人：博臣江口 , 淳士小野木 , 峰司大川 , 清春早川
IPC分类号： H01L29/786 , H01L21/8234 , H01L27/06 , H01L27/08
CPC分类号： H01L29/0611 , H01L27/0676 , H01L29/0696 , H01L29/0834 , H01L29/1608 , H01L29/20 , H01L29/2003 , H01L29/7394 , H01L29/861

64. 发明专利

JP2011100992A Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2011100992A
公开(公告)日：2011-05-19
申请号：JP2010226397
申请日：2010-10-06
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： YAMAZAKI SHUNPEI , TAKAHASHI KEI , ITO YOSHIAKI
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/7869 , H01L27/1251 , H01L29/045 , H01L29/0611 , H01L29/24 , H01L29/41733 , H01L29/42384 , H01L29/66477 , H01L29/66969 , H01L29/78618 , H01L29/78642 , H01L29/78648 , H01L29/78693 , H01L29/78696
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device having a new structure using a new highly productive semiconductor material.
SOLUTION: The semiconductor device includes a first conductive layer over a substrate, a first insulating layer covering the first conductive layer, an oxide semiconductor layer over the first insulating layer, overlapping with part of the first conductive layer, and having a crystal region in a surface part, second and third conductive layers contacting the oxide semiconductor layer, an insulating layer covering the oxide semiconductor layer and the second and third conductive layers, and a fourth conductive layer over the insulating layer, overlapping with part of the oxide semiconductor layer.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供一种使用新的高效半导体材料的具有新结构的半导体器件。解决方案：半导体器件包括在衬底上的第一导电层，覆盖第一导电层的第一绝缘层，第一绝缘层上的氧化物半导体层，与第一导电层的一部分重叠，并且具有晶体与氧化物半导体层接触的表面部分，第二和第三导电层，覆盖氧化物半导体层和第二和第三导电层的绝缘层，以及绝缘层上的第四导电层，与氧化物半导体的一部分重叠层。版权所有（C）2011，JPO＆INPIT

66. 发明专利

JP2010510662A Circuit configuration and manufacturing process for the emi filter and the vertical direction transient voltage suppressor (tvs) 有权
公开(公告)号：JP2010510662A
公开(公告)日：2010-04-02
申请号：JP2009537234
申请日：2007-11-16
申请人：アルファアンドオメガセミコンダクター,リミテッドAlpha & Omega Semiconductor,Ltd.
发明人：ボブデ，マドゥール , マリカラリュナスワミ，シェーカル
IPC分类号： H01L27/06 , H01L21/822 , H01L21/8222 , H01L21/8234 , H01L21/8248 , H01L27/04 , H01L27/088 , H01L29/78 , H01L29/861
CPC分类号： H01L27/0727 , H01L29/0611 , H01L29/1004 , H01L29/407 , H01L29/66303 , H01L29/7304 , H01L29/7322 , H01L29/861 , H01L29/8618 , H01L29/866 , H01L29/945 , H01L2924/0002 , H01L2924/00
摘要：基板の底部まで及ぶ高濃度ドープ層を有し、その上にＶＴＶＳ装置を支持する半導体基板を含む、垂直方向ＴＶＳ（ＶＴＶＳ）回路。深さのあるトレンチが、マルチチャネルＶＴＶＳの間を絶縁するために設けられる。トレンチゲートもまた、組込型のＥＭＩフィルタを有するＶＴＶＳの静電容量を増加するために設けられる。

67. 发明专利

JP2004063990A Semiconductor device and its manufacturing method 有权
公开(公告)号：JP2004063990A
公开(公告)日：2004-02-26
申请号：JP2002223343
申请日：2002-07-31
申请人： Fujitsu Ltd , 富士通株式会社
发明人： WATANABE KENICHI
IPC分类号： H01L21/768 , H01L21/822 , H01L23/522 , H01L23/532 , H01L27/04
CPC分类号： H01L21/76877 , H01L21/76804 , H01L21/76843 , H01L23/481 , H01L23/485 , H01L23/522 , H01L23/5226 , H01L23/5227 , H01L23/528 , H01L23/5283 , H01L23/53204 , H01L23/53223 , H01L23/53228 , H01L23/53266 , H01L23/5329 , H01L23/53295 , H01L23/562 , H01L23/58 , H01L23/585 , H01L29/0607 , H01L29/0611 , H01L29/0619 , H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device that has a structure constructed by embedding conductors in bored patterns and grooved patterns formed in insulating films and can prevent the defective embedding of the conductors or the cracking of the insulating layers caused by the defective embedding, and to provide a method of manufacturing the device. SOLUTION: The semiconductor device has insulating films 40 and 42 which are formed on a substrate 20 and in which wiring layers 58 are embedded on at least the surface sides of the layers 40 and 42, insulating films 60 and 62 formed on the insulating film 42, and bored via holes 60 and grooved via holes 66a having perpendicularly bent grooved patterns. The semiconductor device also has embedded conductors 70 and 72 packed in the bored and grooved via holes 60 and 66a. In the semiconductor device, the grooved via holes 66a are formed so that their widths may become narrower than those of the bored via holes 66. COPYRIGHT: (C)2004,JPO

68. 发明专利

JPS5947477B2 JPS5947477B2 - 失效
公开(公告)号：JPS5947477B2
公开(公告)日：1984-11-19
申请号：JP6103074
申请日：1974-05-31
申请人： Raytheon Co
发明人： HAAMAN SUTATSUZU , UORUFUGANGU MAACHIN FUEISUTO
IPC分类号： H01J29/45 , H01L21/00 , H01L27/00 , H01L29/00 , H01L29/06 , H01L29/78 , H01L31/00 , H01L31/0216 , H01L31/10
CPC分类号： H01L31/0216 , H01J9/233 , H01J29/451 , H01J29/455 , H01L21/00 , H01L27/00 , H01L29/00 , H01L29/0611 , H01L29/78 , H01L31/00

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