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51. 发明专利

JP4850596B2 Liquid crystal display device 有权
公开(公告)号：JP4850596B2
公开(公告)日：2012-01-11
申请号：JP2006168743
申请日：2006-06-19
申请人：パナソニック液晶ディスプレイ株式会社 , 株式会社日立ディスプレイズ
发明人：直也白石
IPC分类号： G02F1/1345 , G02F1/1333
CPC分类号： H05K3/242 , G02F1/133308 , G02F1/13452 , G02F2201/46 , H05K1/0393 , H05K1/147 , H05K3/005 , H05K2201/056 , H05K2201/2018 , H05K2203/167 , H05K2203/175

52. 发明专利

JP2011216588A Light emitting element module-substrate, light emitting element module, and lighting device 审中-公开
标题翻译：发光元件元件基板，发光元件模块和照明装置
公开(公告)号：JP2011216588A
公开(公告)日：2011-10-27
申请号：JP2010081911
申请日：2010-03-31
申请人： Toshiba Corp , Toshiba Lighting & Technology Corp , 東芝ライテック株式会社 , 株式会社東芝
发明人： HAPPOYA AKIHIKO , IZUMI MASAHIRO , SANPEI TOMOHIRO
IPC分类号： H01L33/62 , F21S2/00 , F21V29/00 , F21Y101/02
CPC分类号： H01L33/405 , F21K9/232 , F21Y2115/10 , H01L25/0753 , H01L33/60 , H01L33/62 , H01L2224/48091 , H01L2224/48137 , H01L2224/49107 , H01L2924/3025 , H05K1/056 , H05K3/0097 , H05K3/242 , H05K2201/10106 , H05K2201/2054 , H01L2924/00014 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a light emitting element module-substrate that has a high degree of reflection and high bonding properties, and also has a packaging and bonding section excellent in electric insulation with an end part, and also to provide a light emitting element module and a lighting device.SOLUTION: Provided is a light emitting element module-substrate which has: a laminate 10 that includes a base metal board 11 and insulating layer 12 provided on the base metal board; and a metal layer 20 which is a metal layer provided on the insulating layer, and has a packaging section 25 where a light emitting element 50 is packaged, and a bonding section 26 where the wiring is bonded that is electrically connected to the light emitting element. The metal layer is at least the top layer of either of the packaging section and bonding section, and includes a silver layer 23 formed through electrolytic plating. The packaging and bonding sections are electrically isolated from the peripheral edge 10e of the laminated board.
摘要翻译：要解决的问题：提供具有高反射性和高粘合性的发光元件模块基板，并且还具有与端部电绝缘性优异的封装结合部，并且还提供发光元件模块和照明装置。解决方案：提供一种发光元件模块 - 基板，其具有：层叠体10，其包括基板金属板11和设置在基板上的绝缘层12; 以及金属层20，其是设置在绝缘层上的金属层，并且具有封装有发光元件50的封装部25和与发光元件电连接的布线的接合部26 。金属层至少是包装部分和接合部分中的任一个的顶层，并且包括通过电解电镀形成的银层23。封装和接合部分与层压板的周缘10e电隔离。

53. 发明专利

JP2011187922A Light emitting device, method of manufacturing light emitting device, and illumination device 审中-公开
标题翻译：发光装置，制造发光装置的方法和照明装置
公开(公告)号：JP2011187922A
公开(公告)日：2011-09-22
申请号：JP2010232291
申请日：2010-10-15
申请人： Toshiba Lighting & Technology Corp , 東芝ライテック株式会社
发明人： BETSUDA SOHIKO , OGAWA KOZO , NISHIMURA KIYOSHI , SHIBUSAWA SOICHI
IPC分类号： H01L33/62 , F21S8/04 , F21Y101/02
CPC分类号： H01L25/0753 , H01L33/56 , H01L33/60 , H01L33/62 , H01L2224/45144 , H01L2224/48091 , H01L2224/73265 , H01L2933/0066 , H05K3/242 , H05K2201/09036 , H05K2201/10106 , H05K2201/2054 , H05K2203/175 , H01L2924/00014 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a light emitting device efficiently taking out light and improving productivity.
SOLUTION: The light emitting device has: a substrate (2, 62); a plurality of pads (9, 72); and a plurality of light emitting elements (3, 63). The pads (9, 72) has electric conductance, and are arranged on the substrate (2, 62). A reflecting layer (22, 90) formed by electroplating is provided on a surface of each of the pads (9, 72). The light emitting elements (3, 63) are mounted on the pads (9, 72). A depressed part (33, 105, 204) is left on the substrate (2, 62). The depressed part (33, 105, 204) is formed on the substrate (2, 62) by removing a pattern (8, 71, 200) on the substrate (2, 62), to which the pads (9, 72) are electrically connected.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供一种有效地取出光并提高生产率的发光装置。解决方案：发光器件具有：基板（2,62）; 多个垫（9,72）; 和多个发光元件（3,63）。焊盘（9,72）具有导电性，并且布置在基板（2,62）上。通过电镀形成的反射层（22,90）设置在每个焊盘（9,72）的表面上。发光元件（3,63）安装在焊盘（9,72）上。凹陷部分（33,105,204）留在基底（2,62）上。通过去除衬垫（2,62）上的衬垫（9,72）所在的衬底（2,62）上的图案（8,71,200），在衬底（2,62）上形成凹陷部分（33,105,204）电连接。版权所有（C）2011，JPO＆INPIT

54. 发明专利

JP4728316B2 Tape and the cutting method used in a semiconductor package 有权
公开(公告)号：JP4728316B2
公开(公告)日：2011-07-20
申请号：JP2007326197
申请日：2007-12-18
申请人：北京京東方光電科技有限公司
发明人：宋行賓 , 王鵬
IPC分类号： H01L21/60
CPC分类号： H05K3/242 , H01L23/49838 , H01L23/4985 , H01L2924/0002 , H05K1/0393 , H05K3/0052 , H05K2201/09727 , H05K2201/10681 , H05K2203/175 , Y10T29/49155 , H01L2924/00

55. 发明专利

JP4669338B2 A printed wiring board and a method of manufacturing the same 有权
公开(公告)号：JP4669338B2
公开(公告)日：2011-04-13
申请号：JP2005212427
申请日：2005-07-22
申请人：富士通コンポーネント株式会社
发明人：治大工原 , 徹山上 , 敏弘草谷 , 孝宏近藤
IPC分类号： H05K1/11 , H05K3/22
CPC分类号： H05K3/242 , H05K1/117 , H05K3/0047 , H05K3/429 , H05K2201/0919 , H05K2201/0949 , H05K2203/0207 , H05K2203/175 , Y10T29/49117 , Y10T29/49155 , Y10T29/49165

56. 发明专利

JP2011049462A Printed circuit board and method of manufacturing the same 有权
标题翻译：印刷电路板及其制造方法
公开(公告)号：JP2011049462A
公开(公告)日：2011-03-10
申请号：JP2009198288
申请日：2009-08-28
申请人： Nitto Denko Corp , 日東電工株式会社
发明人： OSAWA TETSUYA , MOTOGAMI MITSURU , YAMAUCHI DAISUKE
IPC分类号： H05K3/18 , G11B5/60 , G11B21/21 , H05K1/02
CPC分类号： C25D5/02 , C25D5/06 , H05K1/0237 , H05K1/056 , H05K3/242 , H05K2201/09727
摘要： PROBLEM TO BE SOLVED: To provide a wiring circuit substrate in which influence imparted to the waveform of an electric signal by a plating lead wire is reduced, and to provide a method for manufacturing the substrate. SOLUTION: A plurality of wiring patterns 20 and a plurality of plating lead wires S are formed on a base insulating layer. The plurality of wiring patterns 20 and the plurality of plating lead wires S are integrally connected to each other, respectively. An electrode pad 30 is provided to the end of each of the wiring patterns 20, and the plating lead wire S is provided so as to extend from each of the electrode pad 30 toward a direction that is opposite to the wiring pattern 20. The width H1 of each of plating lead wires S is set to be larger than the width H2 of the each of the wiring patterns 20. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供一种其中通过电镀引线对电信号的波形施加的影响减小的布线电路基板，并提供一种用于制造基板的方法。解决方案：在基底绝缘层上形成多个布线图案20和多个电镀引线S. 多个布线图案20和多个电镀引线S分别一体地连接。电极焊盘30设置在每个布线图案20的端部，电镀引线S设置成从电极焊盘30的每一个向与布线图案20相反的方向延伸。宽度每个电镀引线S的H1被设定为大于每个布线图案20的宽度H2。版权所有：（C）2011，JPO＆INPIT

57. 发明专利

JP4599132B2 Manufacturing method and a printed circuit board of a printed circuit board 有权
公开(公告)号：JP4599132B2
公开(公告)日：2010-12-15
申请号：JP2004303736
申请日：2004-10-19
申请人：富士通株式会社
发明人：隆中川
IPC分类号： H05K3/24 , H05K1/09 , H05K3/18 , H05K3/22
CPC分类号： C25D5/022 , H05K1/117 , H05K3/108 , H05K3/242 , H05K3/243 , H05K2203/0597 , H05K2203/0723 , H05K2203/1476 , Y10T29/49155 , Y10T29/49165 , Y10T428/24917

58. 发明专利

JP2009272549A Method of manufacturing wiring circuit board 有权
标题翻译：制造电路板的方法
公开(公告)号：JP2009272549A
公开(公告)日：2009-11-19
申请号：JP2008123613
申请日：2008-05-09
申请人： Nitto Denko Corp , 日東電工株式会社
发明人： ISHII ATSUSHI , KANEKAWA HITONORI
IPC分类号： H05K3/18 , H05K3/02
CPC分类号： H05K3/242 , H05K1/056 , H05K3/0023 , H05K3/0041 , H05K3/06 , H05K3/28 , H05K2201/0154 , H05K2201/0394 , H05K2201/09036 , H05K2201/0969 , H05K2203/0323 , H05K2203/175
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a wiring circuit board, which can decrease the number of man-hours and can increase production efficiency. SOLUTION: A method of manufacturing a wiring circuit board comprises: a step of forming a metal support substrate 7, a base insulating layer 8 provided on the metal support substrate 7, a conductor pattern 9 provided on the base insulating layer 8 and having terminals 14 and plated leads 16 contiguous with the terminals 14, and a cover insulating layer 10 provided on the base insulating layer 8 so as to cover the conductor pattern 9; a step of etching the metal support substrate 7; a step of etching the base insulating layer 8 so as to expose the plated leads 16 from the metal support substrate 7 and the base insulating layer 8; and a step of etching the exposed plated leads 16. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种制造布线电路板的方法，其可以减少工时数并且可以提高生产效率。解决方案：制造布线电路板的方法包括：形成金属支撑基板7，设置在金属支撑基板7上的基底绝缘层8，设置在基底绝缘层8上的导体图案9和具有端子14和与端子14相邻的电镀引线16以及设置在基底绝缘层8上以覆盖导体图案9的覆盖绝缘层10; 蚀刻金属支撑基板7的步骤; 蚀刻基底绝缘层8以从金属支撑基板7和基底绝缘层8露出电镀引线16的步骤; 以及蚀刻暴露的电镀引线16的步骤。（C）2010，JPO和INPIT

59. 发明专利

JP2009259357A Production method of suspension board with circuit 审中-公开
标题翻译：悬挂板与电路的生产方法
公开(公告)号：JP2009259357A
公开(公告)日：2009-11-05
申请号：JP2008109291
申请日：2008-04-18
申请人： Nitto Denko Corp , 日東電工株式会社
发明人： MIZUSHIMA AYA , NAITO TOSHIKI
IPC分类号： G11B5/60 , G11B21/21 , H05K3/44
CPC分类号： H05K3/243 , H05K1/056 , H05K3/06 , H05K3/242 , H05K3/4007 , H05K2201/0367 , H05K2201/09554 , H05K2201/0969 , H05K2201/09718
摘要： PROBLEM TO BE SOLVED: To provide a production method of a suspension board with a circuit wherein the layout of the conductive layer can be performed with high flexibility while ensuring reliability of conduction of a plating current in electrolytic plating using a metal supporting board as a lead.
SOLUTION: The production method of the suspension board with the circuit includes steps of forming, on the metal supporting board 32, an insulating base layer 3 wherein a first opening 11 is formed, forming a metal thin film 13, forming the conductive layer 4 on the surface thereof, forming a metal plating layer 16 on external connection terminal portions 9 by electrolytic plating, and forming a metal supporting layer 2 in a portion of the metal supporting board 32 facing the first opening 11 such that the second opening 12 surrounds the first opening 11, and is kept from contact with a peripheral edge of the first opening 11, and partially etching the metal supporting board 32 to form the suspension board 1 with the circuit and a supporting frame 33. Then, the first opening 11 is formed in the insulating base layer 3 in which the supporting frame 33 is formed.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：解决的问题：为了提供具有电路的悬挂板的制造方法，其中可以以高灵活性进行导电层的布局，同时确保使用金属支撑板的电解电镀中的电镀电流的导通的可靠性作为领导。解决方案：具有电路的悬挂板的制造方法包括以下步骤：在金属支撑板32上形成绝缘基层3，其中形成有第一开口11，形成金属薄膜13，形成导电层4在其表面上，通过电解电镀在外部连接端子部分9上形成金属镀层16，并且在金属支撑板32的面向第一开口11的部分中形成金属支撑层2，使得第二开口12 围绕第一开口11，与第一开口11的周边边缘保持接触，并且部分地蚀刻金属支撑板32以与电路和支撑框架33形成悬挂板1.然后，第一开口11 形成在其中形成有支撑框架33的绝缘基底层3中。版权所有（C）2010，JPO＆INPIT

60. 发明专利

JP2009170561A Wiring substrate and its manufacturing method 审中-公开
标题翻译：接线基板及其制造方法
公开(公告)号：JP2009170561A
公开(公告)日：2009-07-30
申请号：JP2008005135
申请日：2008-01-15
申请人： Panasonic Corp , パナソニック株式会社
发明人： SHIMIZU YOSHIAKI
IPC分类号： H01L23/12 , H05K3/42
CPC分类号： H05K3/242 , H01L2224/11 , H05K1/114 , H05K3/0038 , H05K3/0047 , H05K3/429 , H05K2201/09254 , H05K2201/09627 , H05K2201/10734 , H05K2203/0242 , H05K2203/175
摘要： PROBLEM TO BE SOLVED: To provide a wiring substrate and its manufacturing method that can obtain high-density wiring on a double-sided substrate that can suppress a cost increase, can expand design freedom when designing a double-sided substrate, and can promote the further improvement of the quality of a product.
SOLUTION: On a double-sided substrate 1, a plurality of through-holes 2 and wiring connected to one plated wiring 6 are collectively arranged in a narrow area near a connection part, and after the connection part has been plated, the plated through-holes 12 are formed and removed, and thus, each plated wiring 6 and each collectively-formed through-hole 2 become independent with no electrical conduction in each interval.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：解决的问题：为了提供能够抑制成本增加的双面基板上可以获得高密度布线的布线基板及其制造方法，可以在设计双面基板时扩大设计自由度，并且可以促进产品质量的进一步提高。解决方案：在双面基板1上，连接到一个电镀布线6的多个通孔2和布线被集中布置在连接部分附近的狭窄区域中，并且在连接部分被电镀之后电镀通孔12被形成和移除，因此每个电镀布线6和每个共同形成的通孔2在每个间隔中不导通，变得独立。版权所有（C）2009，JPO＆INPIT

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