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51. 发明专利

JPH07235542A SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH07235542A
公开(公告)日：1995-09-05
申请号：JP23773394
申请日：1994-09-30
申请人： TOSHIBA CORP
发明人： SUEHIRO SHINTARO , SUGURO KYOICHI , AKASAKA YASUSHI , NAKAJIMA KAZUAKI , IIJIMA TADASHI
IPC分类号： H01L29/43 , H01L21/3205 , H01L23/52 , H01L29/423 , H01L29/49 , H01L29/78
摘要： PURPOSE:To lessen the contact resistance between a polycrystalline silicon film and a tungsten film and to shorten the delay time of a semiconductor device by a method wherein a gate electrode is formed and a multilayer film, which consists of the polycrystalline silicon film, a silicon nitride film, in which the surface density of nitrogen is less than a specified value, and the tungsten film, is used for the formation of the gate electrode. CONSTITUTION:A silicon oxide film 2 and a conductive impurity-doped polycrystalline silicon film 3 are formed on a silicon substrate 1. Moreover, a tungsten nitride film 4 and a tungsten film 5 are formed. When heat treatment is conducted, nitrogen is redistributed in the film 3 from the film 4 and a high- concentration nitrogen-containing silicon film 6 is formed. The surface density of nitrogen in this film 6 is less than 8X10 cm and the contact resistance between the films 3 and 5 is reduced to less than 100OMEGAcm . Accordingly, the delay time of a semiconductor device can be significantly improved.

52. 发明专利

JP2000012838A MIS TRANSISTOR AND MANUFACTURE THEREOF 失效
公开(公告)号：JP2000012838A
公开(公告)日：2000-01-14
申请号：JP17481198
申请日：1998-06-22
申请人： TOSHIBA CORP
发明人： NAKAJIMA KAZUAKI
IPC分类号： H01L29/78
摘要： PROBLEM TO BE SOLVED: To improve hot electron resistance and impurity distribution accuracy over channel regions by constituting source-drain regions from an impurity-contg. Si and channel regions from a semiconductor material having a wider energy band gap than that of Si. SOLUTION: An Si nitride film and polycrystalline Si film are anisotropically etched to form dummy gate electrodes, As ions are implanted with a heat treatment followed to form a diffused layer 15 for forming source-drains, an Si oxide film 16 and Si nitride film 17 are laminated to surround the side wall of an electrode pattern with the Si nitride film 17, P+ ions are implanted to form a diffused layer 18 for forming source-drains, the Si nitride film and polycrystalline Si film are peeled off, and a GaP film 21 having a higher energy band gap than that of Si is formed to form the channel regions at etched regions of the Si substrate 10.

53. 发明专利

JPH11243197A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH11243197A
公开(公告)日：1999-09-07
申请号：JP4205898
申请日：1998-02-24
申请人： TOSHIBA CORP
发明人： NAKAJIMA KAZUAKI
IPC分类号： H01L21/28 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To selectively form a silicon having which is superior in reproducibility and mass productivity, etc. SOLUTION: This manufacturing method comprises a process in which the base region, having a single-crystal silicon regions 10, n-type impurity containing regions 14, 19 and 21 is formed, a process in which an amorphous silicon film 22 is formed on the whole part of the base region, a process in which the n-type impurities contained in the regions 14, 19 and 21 are introduced into the amorphous silicon film 22 in the n-type impurity regions, a process in which the amorphous silicon film 22 on the single-crystal silicon region is crystallized on a single-crystal silicon film 23, and a process in which n-type impurity introduced amorphous silicon films 24a and 24b are selectively removed.

54. 发明专利

JPH1154510A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH1154510A
公开(公告)日：1999-02-26
申请号：JP20909497
申请日：1997-08-04
申请人： TOSHIBA CORP
发明人： NAKAJIMA KAZUAKI , AKASAKA YASUSHI , MIYANO KIYOTAKA
IPC分类号： H01L21/28 , H01L21/3205 , H01L23/52 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To provide a highly reliable semiconductor device which causes no configurational change even when the device is heated up to 600 deg.C or higher. SOLUTION: First, a thin oxide film 12 of 5 nm in thickness is formed on a single crystal silicon substrate 11. Then, a tungsten nitride film 13 is deposited on the whole surface, and a tungsten film 14 of 100 nm in thickness is deposited on the whole surface. When the tungsten film 14 is taken out into the atmosphere from a reaction container after the film is deposited, the tungsten film 14 is reacted to the oxygen in the atomosphere, and a tungsten oxide layer 15 is formed on the tungsen film 14. Then, the tungsten oxide layer 15 is selectively removed by immersing it into a 20% diluted hydrosulfic acid solution, for example. A silicon nitride film 16 is deposited on the tungsten film 14 using a CVD method at the substrate temperature of 700 to 800 deg.C.

55. 发明专利

JPH0982686A PLASMA PROCESSING SYSTEM AND MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH0982686A
公开(公告)日：1997-03-28
申请号：JP23875395
申请日：1995-09-18
申请人： TOSHIBA CORP
发明人： NAKAJIMA KAZUAKI
IPC分类号： H05H1/46 , C23F4/00 , H01L21/302 , H01L21/3065
摘要： PROBLEM TO BE SOLVED: To enable a high-melting metal film to be easily and selectively etched to a polycrystalline silicon film by a method wherein a peripheral member formed of material which keeps the volume ratio of oxygen-containing gas to a mixed gas of halogen-containing gas and oxygen-containing gas staying in a prescribed range is provided in the vicinity of a substrate. SOLUTION: A silicon film and a high-melting metal film are successively formed on a substrate 11, the substrate 11 is introduced into a processing chamber 10, and plasma source gas comprising halogen-containing gas which contains at least either of fluorine and chlorine and oxygen-containing gas is turned into plasma in the processing chamber 10 to anisotropically etch the laminated film composed of the silicon film and the metal film. The volume ratio of the oxygen-containing gas to the mixed gas of the halogen-containing gas and the oxygen-containing gas is set to 50 to 80:100 when the oxygen-containing gas is calculated in terms of O2 gas. A peripheral member 19 formed of material selected out of silicon, aluminum, and high-melting metals is provided around the substrate 11.

56. 发明专利

JPH0964028A METHOD AND APPARATUS FOR MANUFACTURING SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH0964028A
公开(公告)日：1997-03-07
申请号：JP24073595
申请日：1995-08-25
申请人： TOSHIBA CORP
发明人： AKASAKA YASUSHI , SUGURO KYOICHI , NAKAJIMA KAZUAKI , MIYANO KIYOTAKA
IPC分类号： H01L29/78 , H01L21/31 , H01L21/316
摘要： PROBLEM TO BE SOLVED: To safely selectively oxidize silicon by introducing specific mixed gas into a treating vessel containing a base to be treated having the exposed part of the silicon, setting the partial pressure H2 gas in the vessel to less than specific value, and setting the temperature of the base to be treated to a specific value or more. SOLUTION: A base to be treated having the exposed part of silicon is contained in a treating vessel 115, and non-oxidative gas different from H2 gas, H2 O gas and H2 gas is introduced into the vessel 115. The partial pressure of the H2 gas in the vessel 115 is set to less than 4%, the temperature of the base to be treated is set to 600 deg.C or higher, and the exposed part of the silicon is selectively oxidized. For example, the non-oxidative gas different from the H2 gas is N2 gas, and the H2 O gas is supplied from a bubbler 123 with N2 gas as carrier gas. The H2 gas partial pressure in the vessel 115 is controlled by flow controllers 104 to 106, and the H2 O gas in the entire atmosphere is monitored by a moisture meter 113.

57. 发明专利

JPH08264531A SEMICONDUCTOR DEVICE AND FABRICATION THEREOF 失效
公开(公告)号：JPH08264531A
公开(公告)日：1996-10-11
申请号：JP6309995
申请日：1995-03-22
申请人： TOSHIBA CORP
发明人： NAKAJIMA KAZUAKI , SUGURO KYOICHI
IPC分类号： H01L21/28 , H01L21/3205 , H01L23/52 , H01L29/78
摘要： PURPOSE: To obtain a semiconductor device in which the reliability is enhanced while reducing the RC delay by improving the structure of electrode and interconnection. CONSTITUTION: The gate electrode of an MOSFET comprises a polysilicon 102 and a tungsten 112 deposited on the opposite sides of a reaction barrier wall, i.e., a tungsten nitride 111. The tungsten 112 is surrounded by an insulator, i.e., a silicon nitride 109, having coefficient of thermal expansion close to that of the tungsten 112. First, a trench having the bottom part of polysilicon 102 and the side part of silicon nitride 109 is made and then it is filled with the tungsten nitride 111 and the tungsten 112 thus forming an electrode having self-aligned laminar structure of polysilicon 102, tungsten nitride 111 and tungsten 112.

58. 发明专利

JPH08102462A SEMICONDUCTOR DEVICE AND ITS MANUFACTURE 失效
公开(公告)号：JPH08102462A
公开(公告)日：1996-04-16
申请号：JP23625694
申请日：1994-09-30
申请人： TOSHIBA CORP
发明人： NAKAJIMA KAZUAKI
IPC分类号： H01L21/28 , H01L21/3205 , H01L23/52 , H01L29/43 , H01L29/78
摘要： PURPOSE: To provide a semiconductor device having low resistance wiring or electrodes excellent in heat resistance and dimensional controllability, and its manufacturing method. CONSTITUTION: By adopting three-layered structure wherein a polycrystalline silicon film 12 is formed as the lowermost layer, and a silicon carbide layer 15 and a high melting point metal layer 13 are laminated in order on the film 13, the reaction of high melting point metal with polycrystalline silicon is restrained, and the high melting point metal film can be selectively worked.

59. 发明专利

JP2001015746A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JP2001015746A
公开(公告)日：2001-01-19
申请号：JP18698899
申请日：1999-06-30
申请人： TOSHIBA CORP
发明人： YAGISHITA JUNJI , NAKAJIMA KAZUAKI
IPC分类号： H01L29/78 , H01L21/336 , H01L21/60 , H01L21/768 , H01L29/423 , H01L29/43 , H01L29/49
摘要： PROBLEM TO BE SOLVED: To suppress parasitic capacitance between a gate electrode and a source/drain, in the manufacture of a MISFET having an embedded gate electrode. SOLUTION: An amorphous cerium dioxide film (CeO2) 112 is accumulated by, for example, CVD method (fig.f). Then, a single-crystalline film is grown epitaxially to a silicon substrate 11 from the amorphous CeO2 film 112 so as to form a single crystalline CeO2 film 111 only at the bottom of a trench 121 through heat treatment at, for example, 450 deg.C (g). Then, for example, a tungsten film is grown, and further the tungsten film and a low permittivity insulating film are flattened until the surface of a TEOS silicon oxide film 19 is exposed, and a gate electrode 15 is embedded within the trench 121 (h).

60. 发明专利

JP2000269430A INPUT PROTECTIVE CIRCUIT, MANUFACTURE OF SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR DEVICE AND MANUFACTURE OF THE SEMICONDUCTOR DEVICE 失效
公开(公告)号：JP2000269430A
公开(公告)日：2000-09-29
申请号：JP7307399
申请日：1999-03-18
申请人： TOSHIBA CORP
发明人： USHIKU YUKIHIRO , HIEDA KATSUHIKO , NAKAJIMA KAZUAKI
IPC分类号： H01L27/04 , H01L21/329 , H01L21/336 , H01L21/822 , H01L21/8234 , H01L21/8242 , H01L27/088 , H01L27/108 , H01L27/12 , H01L29/786 , H01L29/861 , H01L29/866
摘要： PROBLEM TO BE SOLVED: To input a large signal potential, even without providing two power sources or voltage conversion circuits in an input protective circuit. SOLUTION: Input signals inputted from an input pad 11 are connected via an input signal line 14 to an input gate 13. To the input signal line 14, this input protective circuit 12 is inserted. The input protective circuit is constituted of one p-n junction diode 20, whose one end is connected to the input signal line 14, and other end is connected to a ground potential VSS. The p-n junction diode 20 is constituted of a p-type silicon substrate 21 and a heavily doped region 23, formed by heavily doping n-type impurities on the surface of the p-type silicon substrate 21. Then, in the silicon substrate 21 at the lower part of the diode 20, a void 24 is formed.

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