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51. 发明专利

JPH11243108A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JPH11243108A
公开(公告)日：1999-09-07
申请号：JP33930398
申请日：1998-11-30
申请人： HITACHI LTD
发明人： OWADA NOBUO , OOGAYA KAORU , KOBAYASHI TORU , KAWAJI MOTONORI
IPC分类号： H01L21/82 , H01L21/3205 , H01L21/60
摘要： PROBLEM TO BE SOLVED: To improve the connection reliability of a solder bump. SOLUTION: Rectangular dummy patterns 8 formed of the same material as, for example, 3rd-layer Al wires 7a to 7d are provided at specific intervals in extra areas of the same wire layer with the 3rd-layer Al wires 7a to 7d. The dummy patterns 8 are arranged, where extra regions of the same layer with the 3rd-layer Al wires 7a to 7d and extra regions of the same layer with 2nd-layer Al wires 25a to 25f overlap with each other. Namely, the dummy patterns 8 are arranged individually on regions where wire channels of the same layer (3rd layer) and wire channels of the wire layer (2nd layer) directly below them cross each other. These dummy patterns 8 are formed in the same process by using the same mask as, for example, the 3rd-layer Al wires 7a to 7d.

52. 发明专利

JPH10223709A ELECTRONIC ELEMENT EVALUATION SYSTEM 失效
公开(公告)号：JPH10223709A
公开(公告)日：1998-08-21
申请号：JP2346897
申请日：1997-02-06
申请人： HITACHI LTD
发明人： HASEGAWA TAKESHI , KAWANAMI YOSHIMI , HOSOKI SHIGEYUKI , TOMIMATSU SATOSHI , IWAI HIDETOSHI , KOBAYASHI TORU
IPC分类号： G01R31/302 , H01L21/66
摘要： PROBLEM TO BE SOLVED: To make the potential contrast of an electron beam tester correspond to an actual potential with high precision. SOLUTION: Electron beams 2 emitted from an electronic source 1 are converged and deflected by lenses 3, 3' for scanning the surface of a specimen 4. At this time, secondary electrons emitted from the specimen 4 is detected by a secondary electron detector 5 to produce a potential contrast image 6. Further, a potential waveform 7 is obtained with a time change in the potential contrast at a specific position. Next, another potential waveform 11 on the position which is measured by an electron beam tester is measured. Finally, the potential contrast presented by an electron beam tester is made to correspond to the absolute potential.

53. 发明专利

JPH0979727A FREEZER/REFRIGERATOR 失效
公开(公告)号：JPH0979727A
公开(公告)日：1997-03-28
申请号：JP23813695
申请日：1995-09-18
申请人： HITACHI LTD
发明人： TAKEMOTO AKINOBU , KOBAYASHI TORU , ARAKAWA KENICHI , YOSHIDA HIDEKI , MATSUDA MICHIYA , NAKAMURA HIDEYUKI
IPC分类号： F25D17/06 , F25D11/00 , F25D19/00
摘要： PROBLEM TO BE SOLVED: To reduce a power consumption and to improve noise resistance and reliability on a life. SOLUTION: A DC motor for a DC fan 8 for cooling and a DC fan 10 for the interior of a chamber are employed as a fan motor for a refrigerator and efficiency is increased. Further, a switching regulator 13 is employed for a power source for the fan, and by providing a selective operation control means, an electronic control circuit is installed in a chamber. Thus, the efficiency of a fan motor and a source circuit are remarkably improved, and a power consumption of a refrigerator is eminently reduced. Further, provision of an electronic control circuit in a chamber provides a refrigerator which has extremely high reliability on noise resistance, noise emission, and a life.

54. 发明专利

JPH0979721A REFRIGERATOR WITH AUTOMATIC ICE MAKING DEVICE 失效
公开(公告)号：JPH0979721A
公开(公告)日：1997-03-28
申请号：JP23813595
申请日：1995-09-18
申请人： HITACHI LTD
发明人： ARAKAWA KENICHI , KOBAYASHI TORU
IPC分类号： F25C1/24
摘要： PROBLEM TO BE SOLVED: To improve reliability on an automatic ice making function through elimination of a feed water tank switch and to reduce a cost by a method wherein opening closing operation of a refrigerator door is detected in a feed water waiting state in which water in a feed water tank runs out and water is fed to an ice making part right after opening closing operation is effected. SOLUTION: Since the temperature of an ice making tray 14 is not increased when water in a feed water tank 10 is absent, it is confirmed from no change of the resistance value of an ice making tray temperature sensor 17 that water is not actually fed and a series of operation is stopped. A feed water waiting state wherein a customer effects operation to input and output the feed water tank 10 and supply of water to the feed water tank 10 is waited is entered. In which case, since, when water is supplied to the feed water tank 10, a refrigerator door 12 is released in terms of structure, by using a door opening closing switch 16 which, from the point of time, turns OFF a contact in synchronism with a time when the refrigerator door 12 is released, detection of opening closing operation of the refrigerator door 12 is started. At a point of time when opening closing operation of the refrigerator door 12 is effected, a water feed pump 8 is driven to perform water feed operation.

55. 发明专利

JPH0884075A SEMICONDUCTOR INTEGRATED CIRCUIT AND A/D CONVERSION CIRCUIT 失效
公开(公告)号：JPH0884075A
公开(公告)日：1996-03-26
申请号：JP24465194
申请日：1994-09-13
申请人： HITACHI LTD , HITACHI MICROCOMPUTER SYST
发明人： TAKEGAWA YOSHIHIKO , MASUMURA ATSUO , KOBAYASHI TORU , YOSHIDA TATSUJI
IPC分类号： H03M1/08 , H03K17/16 , H03K17/687 , H03M1/38
摘要： PURPOSE: To reduce noise at the time of switching analog switches. CONSTITUTION: Switches SA1, SB2 and SC2 for a high voltage for operating a (p) channel type MOS transistor parallelly connected to an (n) channel type MOS transistor after the (n) channel type MOS transistor and the switches SA2, SB1 and SC1 for a low voltage for operating the (n) channel type MOS transistor parallelly connected to the (p) channel type MOS transistor after the (p) channel type MOS transistor are selectively used corresponding to a signal level to be handled. By the switches for the high voltage, the (n) channel type MOS transistor is turned off during a period when the (p) channel type MOS transistor is stably on. Also, by the switches for the low voltage, the (p) channel type MOS transistor is turned off during the period when the (n) channel type MOS transistor is stably on.

56. 发明专利

JPH0877243A LOAD CAPACITY ARITHMETIC METHOD, DELAY ARITHMETIC METHOD, AND METHOD FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JPH0877243A
公开(公告)日：1996-03-22
申请号：JP14682495
申请日：1995-05-22
申请人： HITACHI LTD
发明人： ABE AKIO , TANAKA KAZUO , ISOMURA SATORU , ITO YUKO , KOBAYASHI TORU
IPC分类号： H01L21/82 , G06F17/50
摘要： PURPOSE: To improve the accuracy of delay arithmetic by dividing load capacity found from a delay table by capacity per unit length of a wire and finding the effective wire length of a wire coupled with the output terminal of a logic gate, and finding the load capacity of the logic gate on the basis of the effective wire length. CONSTITUTION: The rising time and falling time of an input signal and the load capacity are used as parameters to estimate the 1st delay value from the input terminal to the output terminal of the logic gate by circuit simulation (81). The delay table is formed on the basis of it and when a long wire is connected to the logic gate output terminal instead of the capacity load, the 2nd delay value of the logic gate with the wire load is estimated (82). The load capacity corresponding to the 2nd delay value is found from the delay table (83) and the corresponding load capacity is divided by the capacity per unit length of the wire to determine the effective wire length. Consequently, logic designing and the verification of an automatic arrangement wiring result can be made accurate.

57. 发明专利

JPH06334045A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JPH06334045A
公开(公告)日：1994-12-02
申请号：JP14425393
申请日：1993-05-24
申请人： HITACHI LTD
发明人： KOBAYASHI TORU , ISOMURA SATORU , SHIMIZU ATSUSHI , ITO YUKO , YAMADA TAKEO , MIYAZAWA KENGO
IPC分类号： H01L21/66 , H01L21/82 , H01L27/118
摘要： PURPOSE:To facilitate the circuit design by allowing read/write through selection of an arbitrary flip-flop circuit in an internal logic circuit constituting an I/O circuit thereby providing a failure diagnostic function. CONSTITUTION:Cells F constituting a flip-flop circuit and I/O cells are placed regularly. In order to allow failure diagnosis without applying a probe to an input terminal or an output terminal, the input circuit and the output circuit are constituted of a combination of the cell FF and the I/O cell, as shown by hatching. Since an arbitrary cell arranged in an array can be used as an input circuit or an output circuit, the circuit design is simplified and since the input or output signal is not routed, the operating speed and the operational margin can be improved.

58. 发明专利

JPH063015A COMBINATION REFRIGERATOR 失效
公开(公告)号：JPH063015A
公开(公告)日：1994-01-11
申请号：JP16487092
申请日：1992-06-23
申请人： HITACHI LTD
发明人： KOBAYASHI TORU , YAMAZAKI SUSUMU
IPC分类号： F25D11/00 , F25D23/00
摘要： PURPOSE:To relax limitation of the installation place of a combination refrigera tor composed of a plurality of refrigerators, to reduce the generation of a start ing current and noise during a starting, and to simplify operation. CONSTITUTION:A refrigerator 1 is provided with a cord 3 for a commercial source, a plug socket for a commercial source, and a control panel 6 for refrigerators 1 and 2, and a refrigerator 2 is also provided with the cord 4 for a commercial source and the plug socket for a commercial source. An input/output data line 5 is connected between the refrigerators 1 and 2. Further, a cooling operation control device is incorporated in each of the refrigerators 1 and 2. The cord 4 for a commercial source is inserted in the plug socket for a commercial source of the refrigerator 1, and the cord 3 for a commercial source is inserted in an indoor insertion plug socket 7. This constitution brings the refrigerators 1 and 2 into a state to be interconnected in parallel. The cooling operation control device monitors the operation states of the refrigerators 1 and 2 by means of data through the input/output data line 5 and prohibits the refrigerators from a simultaneous starting.

59. 发明专利

JPH05172909A LOGIC INTEGRATED CIRCUIT 失效
公开(公告)号：JPH05172909A
公开(公告)日：1993-07-13
申请号：JP35513591
申请日：1991-12-19
申请人： HITACHI LTD , HITACHI COMPUTER ENG
发明人： SHIMIZU ATSUSHI , ISOMURA SATORU , TANBA NOBUO , KOBAYASHI TORU , KISHIDA KUNIAKI , SAKAMOTO YORIYUKI
IPC分类号： G01R31/28 , H03K19/00
摘要： PURPOSE:To reduce the delay time of a signal by providing a latch circuit constituted as a bipolar transistor circuit, another latch circuit constituted as a CMOS circuit, and auxiliary circuit for diagnosis which outputs an auxiliary circuit output for diagnosis. CONSTITUTION:Combinatorial logic circuits 11-13 are respectively constituted of sequential circuits having no internal storage capacities and have prescribed logic. Data latching flip flops FF11-FF42 are provided among the circuits 11-13 and in the preceding and succeeding stages of the circuits 11-13. Auxiliary circuits 72 for diagnosis are added to the flip flops FF11-FF42. Of the flip flops FF11-FF42, those FF11-FF13 also work as input circuits and pass signals inputted from input pins 41-43 synchronously to an input clock CKi for diagnosis. The flip flops FF2l, FF22, FF3l, and FF32 latch signals transmitted among the circuits 11-13 based on system clocks CK1 and CK2. The flip flops FF41 and FF42 also work as output circuits and latch data based on the system clock CKi. The output signals of the flip flops FF41 and FF42 are outputted to output pins 51 and 52.

60. 发明专利

JPH0529456A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JPH0529456A
公开(公告)日：1993-02-05
申请号：JP18080791
申请日：1991-07-22
申请人： HITACHI LTD
发明人： SHIMIZU ATSUSHI , ISOMURA SATORU , YAMADA TAKEO , KOBAYASHI TORU , FUJIMURA YASUHIRO , ITO YUKO
IPC分类号： H01L21/82 , H01L21/822 , H01L27/04 , H01L27/118 , H03K19/173
摘要： PURPOSE:To make the acceleration of operational velocity and the high integration feasible in an ASIC provided with input output circuits and inner logic circuits as well as input/output circuits, inner logic circuits and clock amp. circuits. CONSTITUTION:Input/output circuits 2 and inner logic circuits 6 are respectively divided into multiple numbers in one direction so that the multiple numbers of the divided input/output circuits 2 may be arranged between respective multiple numbers of divided inner logic circuits 6. Furthermore, in an ASIC 1, clock amp. circuits 4 are divided into multiple numbers to be arranged from the central position to the peripheral positions and connected using the connecting wires in even length.

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