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51. 发明专利

JPS60245163A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS60245163A
公开(公告)日：1985-12-04
申请号：JP10154884
申请日：1984-05-18
申请人： FUJITSU LTD
发明人： OGAWA TSUTOMU , WADA KUNIHIKO , MIYAMOTO SHIYUUICHI , HASEGAWA HITOSHI , NIWAYAMA NOBUO , KOBAYASHI MASANORI
IPC分类号： G11C11/401 , H01L21/822 , H01L21/8242 , H01L27/04 , H01L27/10 , H01L27/108
摘要： PURPOSE:To enhance the density of a memory cell by commonly forming opposed electrodes of a capacitor and an element separating strip with a conductive region formed through a dielectric element in a groove formed with a matrix shape on a semiconductor substrate. CONSTITUTION:A P type Si layer 11 is epitaxially grown on a P type Si substrate 10, and a memory cell is formed in the layer 11. In this configuration, a capacitor insulating film 13 is interposed between a conductive region 12 and the layer 11 to enclose the layer 11, the region 12 is formed in a matrix shape, grounded at a reference popential to operate as the opposed electrodes of a capacitor, and also as an element separating strip. In other words, the films 13 disposed at both sides of the region 12 respectively operate as the capacitor insulating films of separate memory cells, and charge is stored in a charge storage regions 20a-20c. When an IC is formed of the structure of this memory cell, the area of the capacitor is increased to increase the capacity. Further, since the region 12 operates also as the element separating strip, the density can be enhanced.

52. 发明专利

JPS60224239A DEFECT DETECTING METHOD OF THIN FILM 失效
公开(公告)号：JPS60224239A
公开(公告)日：1985-11-08
申请号：JP7946684
申请日：1984-04-20
申请人： FUJITSU LTD
发明人： KOBAYASHI MASANORI , OGAWA TSUTOMU
IPC分类号： H01L21/316 , H01L21/66
摘要： PURPOSE:To readily detect a defect by visual observation using a microscope by forming an insulating film on a silicon substrate, then heat-treating in gas having oxygen partial pressure or steam pressure of the degree that an insulating film is not newly grown or in vacuum at the specific temperature to visualize the defect. CONSTITUTION:A heat treatment is performed at 600-1,250 deg.C in argon atmosphere in which H2O or O2 does not almost exist. At this time, since new SiO2 film is not almost grown in a boundary between a silicon substrate 11 and an SiO2 film 12, a reaction between Si+SiO2 2SiO occurs, but since no defect occurs on the SiO2 film, the thickness does not alter. However, if a local defect such as pinhole or metal ion exists on the film 12, the defect operates as a shortcircuit bus to the surface of the film from the boundary, and SiO having high vapor pressure is diffused in the atmosphere. Then, the equilibrium of reaction is displaced rightward, with the result that the silicon of the periphery of the defect and the SiO2 react and are consumed to form an etching pit 14 to be visually observed by a microscope.

53. 发明专利

JPS58108766A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS58108766A
公开(公告)日：1983-06-28
申请号：JP20782981
申请日：1981-12-22
申请人： FUJITSU LTD
发明人： FURUMURA YUUJI , OGAWA TSUTOMU , SATOU YASUHISA
IPC分类号： H01L21/8238 , H01L27/092 , H01L29/78
摘要： PURPOSE:To allow the fine formation in a large amount by a method wherein, in a CMOS structure, a metallic conductor layer provided over a substrate and a well is used in common as the both MOSFET drains, by forming a depletion layer region at a potential serving as inverse bias to both of the substrate and the well. CONSTITUTION:A gate oxide film 24 is selectively removed, then an aperture is provided over the P type substrate 2 and the N type well 22, and a Pt layer 25 approx. 3,000Angstrom thick is formed. This layer 25 and the oxide film 24 are formed after selective removal, then As ions are implanted, and successively B ions are implanted. Thereafter, by performing a heat treatment in nitrogen atmosphere, the implanted As and B ions are activated resulting in the formation of N regions 26 and 27, and P regions 29 and 30. Next, a selective etching is performed to the Pt layer 25, and accordingly the metallic conductor layer 31 serving as the drain used in common to an NMOSFET and PMOSFET is isolated from the gate electrode 32 of the NMOSFET and the gate electrode 35 of the PMOSFET. Thus, in the CMOS structure of this invention, the drain constituted of one metallic conductor layer is used in common to both FETs, and therefore the gate interval d is greatly reduced resulting in a simple structure.

54. 发明专利

JPS5814526A MANUFACTURING SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS5814526A
公开(公告)日：1983-01-27
申请号：JP11186881
申请日：1981-07-17
申请人： FUJITSU LTD
发明人： SAKURAI JIYUNJI , OGAWA TSUTOMU
IPC分类号： H01L21/20 , H01L21/316 , H01L21/3205 , H01L21/84 , H01L21/86
摘要： PURPOSE:To prevent the removal of laminated single crystal layers by a method wherein SixNyOz or Si3N4 is used for surface of a selective oxide film to obtain enough adherence. CONSTITUTION:An Si3N4 mask 3 is applied to SiO2 2 on a single crystal Si substrate 1 to form an SiO2 pad 4. Next, processed in NH3 on 1 air pressure at approximately 1,100 deg.C for an hour, SixNyOz is formed on the pad; the mask 3 is removed by thermal phosphoric acid treatment; the SiO2 2 on the surface other than that on the pad is removed via a mask 5 by etching with buffer HF, etc. to expose the single crystal of the substrate 1. A non-single crystal Si 6 is formed on this from SiH4, then the particle beam is irradiated on the film 6 to fuse and recrystallize, which progresses recrystallization in the single crystal of the substrate 1 and consecutively grows the single crystal Si 6 on the pad 4. In addition, adherence to the pad is strong enough to form stable semicondutor components on the layer 6.

55. 发明专利

JPS56157038A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS56157038A
公开(公告)日：1981-12-04
申请号：JP6086380
申请日：1980-05-08
申请人： FUJITSU LTD
发明人： SASAKI NOBUO , SATOU NORIAKI , OGAWA TSUTOMU
IPC分类号： H01L21/20 , H01L21/268 , H01L21/3205 , H01L23/52
摘要： PURPOSE:To make the semiconductor device to have low resistance and to enhance the electric characteristic by a method wherein a laser beam is irradiated in the silicon oxide film from the side face of the semiconductor chip to perform laser annealing to an impurity region of the semiconductor element. CONSTITUTION:The SiO2 insulating film 2, a polycrystalline silicon layer 5 are formed on a semiconductor substrate 1 having an impurity region 3, and after an Al wiring layer 7 is provided thereon interposing a PSG film 6 between them, the laser beam is irradiated through the SiO2 film 2. When wave length which is not absorbed in the SiO2 film is selected to irradiate, laser annealing can be performed through the SiO2 film up to the long distance, and the impurity region 3 and the polycrystalline silicon layer 5 are activated to reduce resistance. Accordingly the semiconductor element region becomes to have low resistance, and switching speed is improved.

56. 发明专利

JPH04184928A SUBSTRATE WASHING EQUIPMENT 失效
公开(公告)号：JPH04184928A
公开(公告)日：1992-07-01
申请号：JP31457390
申请日：1990-11-20
申请人： FUJITSU LTD
发明人： SUGINO SHIGEYUKI , KISA TOSHIMASA , OGAWA TSUTOMU
IPC分类号： H01L21/304 , H01L21/302 , H01L21/306
摘要： PURPOSE:To make gas flow on a substrate uniform, and enable uniform cleaning, by arranging a reaction gas introducing inlet at a position corresponding with the middle part between the bottom plates of two cylinders, and arranging exhaust vents at positions opposite to the inlet via a substrate, which positions face the cylindrical surface of the smaller cylinder. CONSTITUTION:A reaction chamber 1 is constituted of quartz. The outer diameter of a smaller cylinder is 250mm. The inner diameter of a larger cylinder is 300mm. The thickness of quartz is 20mm. The height of reaction chamber, i.e., the distance between bottom plates of both cylinders is 100mm. The inner diameter of the reaction gas introducing inlet 2 is 1/4 in., and the inner diameter of the exhaust vent 3 is 2 in., which are constituted of quartz pipes. The bottom plate of the smaller inner cylinder is used as a stage for mounting a wafer 4. The introducing inlet 2 has a height of 5mm from the wafer 4 surface. The exhaust vent 3 is positioned on the lower side of the substrate. Two exhaust vents are arranged in parallel on the side facing the inlet 2. The conditions for application are as follows; reaction gas is Cl2, flow rate is 50 SCCM, substrate 4 is an Si wafer having a diameter of 6 in., radiation light wavelength is 200-350nm, and light intensity if 30mW/cm .

57. 发明专利

JPH04177836A SEMICONDUCTOR SUBSTRATE PROCESSING DEVICE 失效
公开(公告)号：JPH04177836A
公开(公告)日：1992-06-25
申请号：JP30665390
申请日：1990-11-13
申请人： FUJITSU LTD
发明人： SUGINO SHIGEYUKI , OGAWA TSUTOMU , YANO HIROSHI
IPC分类号： H01L21/66 , H01L21/205 , H01L21/31 , H01L31/12
摘要： PURPOSE:To measure with good accuracy a condition of the surface of a semiconductor substrate even during a process in which the semiconductor substrate is required to be heated by measuring light or plasma condition for a place near the semiconductor substrate through a light lead-in member. CONSTITUTION:A light lead-in member 27 is constituted of a cylindrical rod 28 and a cover 29. The cylindrical rod 28, being made of quartz or sapphire, has a core and a clad and is so structured that light can pass through the inside. When the light lead-in member 27 is inserted into an insertion hole 31, an end (a light lead-in surface) 28a of the member 27 comes near a semiconductor substrate 26. Therefore, light which is led in to the light lead-in surface 28a is nearly in the same condition as the light on the surface of the semiconductor substrate 26. Eventually, a signal which is output from a photo detector 32 is the one which expresses a condition of the light on the semiconductor substrate 26. Consequently, a condition of the surface of the semiconductor substrate 26 can be measured even while the semiconductor substrate is being heated.

58. 发明专利

JPH03240992A ELECTROPLATING DEVICE 失效
公开(公告)号：JPH03240992A
公开(公告)日：1991-10-28
申请号：JP3547790
申请日：1990-02-15
申请人： FUJITSU LTD
发明人： SHIRAKAWA YOSHIMI , OGAWA TSUTOMU , HASEGAWA HITOSHI
IPC分类号： C25D5/08 , C25D7/12 , H01L21/321 , H01L21/60
摘要： PURPOSE:To form a plated film having uniform film thickness on the material to be plated by placing a granular plating member on a lamellate electrode having network holes in the midway part wherein plating liquid reaches the material to be plated. CONSTITUTION:An electroplating device is constituted of a first lamellate electrode 8 having network holes, a plurality of granular plating members 9 placed on the single face thereof, a second electrode 10 connected to the material 11 to be plated and a plating tank. The plating members 9 allowed to flow out into plating liquid uniformly reach the material 11 to be plated. A plated film having uniform film thickness is formed. Since the first electrode 8 is formed of material insoluble into plating liquid and the plating members 9 are made granular, the plane shape of the electrode constituted of the first electrode 8 and the plating members 9 is not changed even when plating is repeated. The electric field distribution between the material 11 to be plated and the first electrode 8 is held constant. The velocity wherein the plating members 9 are eluted is held constant.

59. 发明专利

JPH0371652A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH0371652A
公开(公告)日：1991-03-27
申请号：JP20700989
申请日：1989-08-11
申请人： FUJITSU LTD
发明人： UNO MASAAKI , OGAWA TSUTOMU , MORI HARUHISA , KANEDA HIROSHI , SUZUKI WAN , SHIRAKAWA YOSHIMI
IPC分类号： H01L21/76 , H01L21/265 , H01L21/266
摘要： PURPOSE:To enable the introduction of an element isolating impurity to be carried out little affecting an element region without decreasing a field transistor in threshold voltage by a method wherein a tungsten is selectively grown on a silicon nitride film, and the element isolating impurity is implanted using the nitride film concerned as a mask. CONSTITUTION:A silicon oxide film 5 is formed on a semiconductor substrate 4, SiN is deposited, and moreover a silicon nitride film 6 is patterned. In succession, a field oxidation is carried out through a wet oxidation method to form a field oxide film 5', tungsten is selectively grown using the silicon nitride film 6 as a mask to form a tungsten film 7 on the silicon nitride film 6. Element isolating impurity boron is implanted using the tungsten film 7 and the silicon nitride film 6 as a mask, the tungsten film 7 and the silicon nitride 6 are removed, and thus a semiconductor device is manufactured. By this setup, impurity can be introduced little affecting an element forming region without decreasing a field transistor in threshold voltage.

60. 发明专利

JPH0253950B2 失效
公开(公告)号：JPH0253950B2
公开(公告)日：1990-11-20
申请号：JP16653579
申请日：1979-12-21
申请人： FUJITSU LTD
发明人： MATSUMOTO TAKASHI , WADA KUNIHIKO , OGAWA TSUTOMU , SASAKI NOBUO
IPC分类号： H01L29/417 , H01L21/336 , H01L29/78

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