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    • 44. 发明专利
    • Thin-film transistor display plate and manufacturing method of the same
    • 薄膜晶体管显示板及其制造方法
    • JP2006080505A
    • 2006-03-23
    • JP2005233289
    • 2005-08-11
    • Samsung Electronics Co Ltd三星電子株式会社Samsung Electronics Co.,Ltd.
    • CHO BEOM-SEOKBAE YANG-HOLEE SEIKUNJEONG CHANG-OH
    • H01L29/786G02F1/1368H01L21/28H01L21/3205H01L23/52H01L51/50
    • G02F1/136286G02F2001/13629G02F2001/136295H01L27/3276Y10S438/924
    • PROBLEM TO BE SOLVED: To provide a manufacturing method of thin-film transistor display plate, having low resistance and including wiring ensuring superior contact with a pixel electrode or a semiconductor layer. SOLUTION: In the wiring of thin-film transistor display plate for a liquid crystal display or organic light-emitting display, a laminated structure of a molybdenum alloy layer containing predetermined amounts of niobium (Nb), vanadium (V) or titanium (Ti) into molybdenum (Mo) and aluminum layer is formed. As a result, the difference in the relative etching rates of the molybdenum alloy layer and aluminum layer is reduced more than that when the existing pure molybdenum (Mo) is used; and thereby undercutting, overhanging, and mouth biting or the like will not be generated during the etching process. In addition, the thin-film transistor display plate is improved in the contact characteristics with semiconductor layer or the pixel electrode, and simultaneously shows low resistance and chemical-proof properties. COPYRIGHT: (C)2006,JPO&NCIPI
    • 要解决的问题:提供薄膜晶体管显示板的制造方法,其具有低电阻并且包括确保与像素电极或半导体层的良好接触的布线。 解决方案:在用于液晶显示器或有机发光显示器的薄膜晶体管显示板的布线中,包含预定量的铌(Nb),钒(V)或钛的钼合金层的层叠结构 (Ti)形成钼(Mo)和铝层。 结果,钼合金层和铝层的相对蚀刻速度的差异大于使用现有纯钼(Mo)时的相对蚀刻速度差; 并且因此在蚀刻工艺期间不会产生底切,突出和口咬等。 此外,薄膜晶体管显示板与半导体层或像素电极的接触特性提高,同时显示出低电阻和耐化学腐蚀性。 版权所有(C)2006,JPO&NCIPI
    • 45. 发明专利
    • Pressure sensitive semiconductor device and manufacture thereof
    • 压力敏感半导体器件及其制造
    • JPS59136977A
    • 1984-08-06
    • JP980083
    • 1983-01-26
    • Hitachi Ltd
    • SHIMIZU ISAO
    • G01L9/00H01L21/306H01L29/84
    • H01L29/84G01L9/0042H01L21/30608Y10S438/924Y10T29/49103
    • PURPOSE:To equalize the change of gage diffusion resistance by diffusing an impurity to one part of one main surface of a silicon semiconductor substrate in high concentration in one main surface and forming a recessed section with a circular plane shape by utilizing the difference of impurity concentration. CONSTITUTION:A photo-resist mask 24 is formed on a P type layer 12a in a peripheral section on the back side of a substrate, and an indented section 22 is bored at a central section not masked through selective anisotropic etching using etching by alkali such as KOH. When impurity concentration exceeds 10 order, the central section of the substrate of low concentration is etched in succession or rapidly or the peripheral high-concentration diffusion section 12a is difficult to be etched because an etching rate lowers suddenly. Consequently, the indented section 22, an inlet 22a thereof is narrow along the shape of the side surface of said diffusion layer and is wider with a reaching to the inside 22b, is formed. When etching reaches an n type buried layer 13a of high concentration, the etching rate lowers quickly and stops, thus obtaining the flat bottom of the recessed section.
    • 目的:通过在一个主表面中将杂质扩散到硅半导体衬底的一个主表面的一个主表面的一部分,并通过利用杂质浓度的差异形成具有圆形平面形状的凹陷部分来均衡量规扩散阻力的变化 。 构成:在基板的背面的周边部分的P +型层12a上形成光刻胶掩模24,并且通过使用蚀刻的选择性各向异性蚀刻在未掩蔽的中心部分处凹入凹部22 通过碱如KOH。 当杂质浓度超过10 19次时,低浓度基板的中心部分被连续蚀刻或快速蚀刻,或者外围高浓度扩散部分12a难以蚀刻,因为蚀刻速率突然降低。 因此,凹入部分22,其入口22a沿着所述扩散层的侧表面的形状窄,并且形成到达到内侧22b的较宽。 当蚀刻达到高浓度的n +型埋层13a时,蚀刻速率快速降低并停止,从而获得凹部的平坦底部。