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41. 发明专利

JPH04343273A RESONANCE TUNNEL TYPE PHOTOTRANSISTOR AND OPTICAL BISTABLE ELEMENT 失效
公开(公告)号：JPH04343273A
公开(公告)日：1992-11-30
申请号：JP11503691
申请日：1991-05-20
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： KAWAMURA YUICHI , ASAI HIROMITSU , AMANO CHIKARA , MATSUO SHINJI
IPC分类号： G02F3/02 , H01L27/15 , H01L31/10 , H01L33/06 , H01L33/30
摘要： PURPOSE:To provide a resonance tunnel-type phototransistor, which is enhanced in capacity as a phototransistor and possesses functions that a conventional one has not, and an optical bistable element. CONSTITUTION:An N-type InGaAs emitter layer 2, a P-type InGaAs base layer 3, a laminate part where InAlAs barriers 4 of a double barrier resonant tunnel element and one or more InGaAs quantum well layers are alternately laminated, an N-type InGaAs collector layer 6, and an N-type InGaAs electrode layer are successively laminated on an N-type InP substrate 1 for the formation of a resonant channel-type phototransistor. An optical bistable element is provided, where the resonant channel type phototransistor and a semiconductor laser are integrated. Furthermore, another optical bistable element is provided, where the resonant channel type phototransistor and an optical modulator are integrated.

42. 发明专利

JPH04170526A LIGHT GATE ARRAY 失效
公开(公告)号：JPH04170526A
公开(公告)日：1992-06-18
申请号：JP29528390
申请日：1990-11-02
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： AMANO CHIKARA , KUROKAWA TAKASHI , MATSUO SHINJI
IPC分类号： G02F1/35 , G02F3/00 , H01L27/14 , H01L31/10
摘要： PURPOSE:To execute a logical operation among plural inputs by a single gate by providing a constitution including plural light detecting parts per gate. CONSTITUTION:A plurality of light detecting parts S are formed on an insulative substrate IS or a conductive semiconductor substrate CS, on one of the light detecting parts S a light modulating part M together with a pair of electrodes C are formed, and a constant voltage power supply is connected therebetween. A plurality of input rays Pin are irradiated on the light detecting parts S from a substrate side and output rays Pout are output as reflected rays of bias rays Pbias irradiated on the light modulating part S. In this case, four kinds of gates can be formed in accordance with a connection method between the light detecting part S and the light modulating part M, and a mutual connection method between plural light detecting parts. Since a plurality of light beams per gate can be input, a multivalued logical operation can be executed by a single gate.

43. 发明专利

JPH04110834A OPTICAL GATE ARRAY 失效
公开(公告)号：JPH04110834A
公开(公告)日：1992-04-13
申请号：JP22834990
申请日：1990-08-31
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： AMANO CHIKARA , KUROKAWA TAKASHI , YAMADA TAKESHI , MATSUO SHINJI
IPC分类号： G02F3/00 , G02F3/02 , H01L21/822 , H01L27/06 , H01L27/14 , H01L27/15
摘要： PURPOSE:To accurately perform logical arithmetic among pieces of two-dimensional information of plural light beams fast with simple constitution by using an MWQ-pin structure whose extinction ratio is larger than a specific value for the optical gate array. CONSTITUTION:On a p type semiconductor substrate 3, the pnpn structure photothyristor 1 consisting of a p layer 11, an n layer 12, a p layer 13, and an n layer 14 and the MQW-pin modulator 2 composed of an n-DBR structure 21, an i-MQW layer 22, and a p clad layer 23 are laminated. Then input light Pin is made incident on the photothyristor 1 from the side of the substrate 3 and output light Pout is guided out as the reflected light of bias light Pbais irradiating the pin modulator 2. Thus, the MQW-pin structure which has the specific extinction ratio is used to accurately perform the logical arithmetic among pieces of two-dimensional information of plural light beams fast with the simple constitution.

44. 发明专利

JPH0460525A OPTICAL OSCILLATOR AND ITS DRIVING METHOD 失效
公开(公告)号：JPH0460525A
公开(公告)日：1992-02-26
申请号：JP16997290
申请日：1990-06-29
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： MATSUO SHINJI , KUROKAWA TAKASHI , TSUDA HIROYUKI , AMANO CHIKARA
IPC分类号： G02F2/00
摘要： PURPOSE:To put the optical oscillator in operation by applying constant-voltage by branching modulated bias light into output light and control light which is made incident on a photoelectric converting means through a specific optical path. CONSTITUTION:When stationary bias light Pbias is inputted from an optical fiber F1 to an optical modulation part through an optical fiber coupler FC1, the bias light modulated by the optical modulation part is reflected by a high reflecting mirror part and then made incident on an optical fiber coupler FC2 from the optical fiber coupler FC1 through an optical fiber F3, so that the light is branched into the output light and control light. Further, the control light is delayed by an optical time by passing through an optical fiber F4, then fed back to a photodetection part from an optical fiber coupler FC2. Consequently, external electric control is required and the optical oscillator can operate with a constant voltage power source.

45. 发明专利

JPH02185108A OPTICAL BISTABLE CIRCUIT 失效
公开(公告)号：JPH02185108A
公开(公告)日：1990-07-19
申请号：JP564589
申请日：1989-01-12
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： AMANO CHIKARA , YAMADA TAKESHI
IPC分类号： H03K3/42 , G02F3/02 , H04B10/2507 , H04B10/40 , H04B10/50 , H04B10/58 , H04B10/60
摘要： PURPOSE:To obtain the stable states of two kinds of output light different in intensity for the same intensity of input light by connecting a control element, which is controlled by the output voltage of a light receiving circuit where a light emitting element is connected in parallel, in series. CONSTITUTION:In a light receiving circuit 10, a negative resistance circuit 13 consisting of a tunnel diode 14 as the negative resistance element is connected in parallel to a photo diode 11 as a light receiving element through a bias DC voltage source 12. The light receiving circuit 10 obtains stable states of two output voltages, whose values are different from each other and are between V1' and V1 and between V2' and V2 respectively, for the intensity between values E11 and E12 of input light L1. White light may be used, and consequently, the light source of input light L1 is not limited to a laser.

46. 发明专利

JPH0289032A OPTICAL BISTABLE CIRCUIT 失效
公开(公告)号：JPH0289032A
公开(公告)日：1990-03-29
申请号：JP24029788
申请日：1988-09-26
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： AMANO CHIKARA , HASUMI YUJI , TAKANASHI YOSHIFUMI
IPC分类号： G02F3/02 , H01L31/10
摘要： PURPOSE:To easily manufacture an optical bistable circuit by constituting a negative resistance circuit of a tunnel diode series circuit in which plural pieces of tunnel diodes are connected in series in the same direction to each other. CONSTITUTION:The title circuit has the same constitution as a conventional optical bistable circuit excluding a fact that a negative resistance circuit consists of a tunnel diode series circuit in which plural (n) pieces of tunnel diodes TD1, TD2...TDn are connected in series in the same direction to each other. Accordingly, in the same way as the case of a conventional optical bistable circuit, even if an input light to a pin type photodiode 1 has the same intensity, in accordance with its input light, an output light can be outputted as two output light beams having each different intensity. In such a manner, comparing with the case of the conventional optical bistable circuit, this circuit has a high ON/OFF ratio, and also, it is unnecessary to impose a constraint condition, and the optical bistable circuit can be easily obtained.

47. 发明专利

JP2000223659A SEMICONDUCTOR INTEGRATION STRUCTURE 失效
公开(公告)号：JP2000223659A
公开(公告)日：2000-08-11
申请号：JP2056299
申请日：1999-01-28
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： NAKAHARA TATSUSHI , TSUDA HIROYUKI , AMANO CHIKARA
IPC分类号： H01L27/00 , H01L27/146 , H01L31/02 , H01L33/30 , H01L33/44 , H01L33/64 , H01L33/00
摘要： PROBLEM TO BE SOLVED: To suppress strain being introduced into a semiconductor element layer by setting the strain reducing layer of an integrated structure with a coefficient of thermal expansion within a specified range of a semiconductor element layer and a specified Young's modulus of a bother board or above and then bonding the upper and lower layers of an adhesion layer mechanically. SOLUTION: A semiconductor circuit board having an insulation film is employed as a mother board 54, a heat dissipation layer and a strain reducing layer 53 are deposited on the mother board 54 under room temperature, an adhesive layer 52 is laminated thereon while hardening through temperature rise and then a semiconductor element layer 51 is bonded thereto. The strain reducing layer 53 in such a structure is set with a coefficient of thermal expansion in the range of 0.6-1.5 times that of the semiconductor element layer 51 and a Young's modulus equal to or higher than 2.5 times that of the mother board 54. The adhesive layer 52 having high temperature hardening properties is provided with a function for bonding the upper and lower strain reducing layer 53 of the adhesive layer 52 and the semiconductor element layer 51 mechanically.

48. 发明专利

JP2000221347A MIRROR STRUCTURE AND ITS PRODUCTION 失效
公开(公告)号：JP2000221347A
公开(公告)日：2000-08-11
申请号：JP2063099
申请日：1999-01-28
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： TSUDA HIROYUKI , NAKAHARA TATSUSHI , SAKAMOTO TAKASHI , AMANO CHIKARA , HIKITA MAKOTO , TOMARU AKIRA , ENBUTSU KOUJI
IPC分类号： G02B6/122 , G02B6/13
摘要： PROBLEM TO BE SOLVED: To produce a mirror plane in a desired place and in a desired direction on a waveguide substrate with high accuracy by forming a groove filled with a polymer material in a part of the waveguide in such a manner that at least one plane in the polymer material in the groove is formed as a reflection plane at a specified angle to the substrate. SOLUTION: A groove 10 is formed by, for example, a dry etching method in the region where the mirror structure is to be formed. Then a polymer material as an org. material such as a UV-curing material is poured into the groove 10. The groove 10 filled with the polymer material is exposed to light by using an exposing means 1 in the incident direction according to the angle of the mirror plane 106. By using the exposing means 1 to expose the photosensitive material 105 to the light through a varied optical path in the oblique direction to form the mirror plane, the mirror structure to convert the optical path can be produced at any position in a desired direction in the waveguide substrate 101 with high accuracy.

49. 发明专利

JPH1154830A SURFACE-EMTTING SEMICONDUCTOR LASER 失效
公开(公告)号：JPH1154830A
公开(公告)日：1999-02-26
申请号：JP20893697
申请日：1997-08-04
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： TAKENOUCHI HIROKAZU , TATENO KOUTA , OOISO YOSHITAKA , ITO YOSHIO , AMANO CHIKARA , KUROKAWA TAKASHI
IPC分类号： H01S5/00 , H01S5/125 , H01S3/18
摘要： PROBLEM TO BE SOLVED: To form a second light-reflecting layer by depositing a material on a clad layer by providing an active layer on a first clad layer formed on a first light-reflecting layer, a second clad layer on the active layer, and the second light-reflecting layer having a reflecting mirror structure composed of multiple amorphous compound semiconductor layers on the second clad layer. SOLUTION: On an n-type GaAs substrate 101, a light-reflecting layer 102 having a distributed Bragg reflection mirror (DBR) structure is formed by alternately epitaxially growing GaAs and AlAs. On an InP substrate 101a, an InGaAs etching stopper layer 110 is grown epitaxially and a clad layer 105, an active layer 104, and a clad layer 103 are epitaxially grown on the stopper layer 110. After the surface of the light-reflecting layer 102 has been exposed, the epitaxially grown surfaces of the clad layer 103 and light-reflecting layer 102 are adhered closely to each other and stuck to each other by annealing. Then, a light-reflecting layer 106 is formed on the clad layer 103 by alternately forming p-type GaAs and AlAs amporphous states. Therefore, the second light- reflecting layer 106 can be formed by depositing the materials.

50. 发明专利

JPH0519323A OPTICAL MEMORY ARRAY 失效
公开(公告)号：JPH0519323A
公开(公告)日：1993-01-29
申请号：JP19832791
申请日：1991-07-15
申请人： NIPPON TELEGRAPH & TELEPHONE
发明人： MATSUO SHINJI , KUROKAWA TAKASHI , AMANO CHIKARA
IPC分类号： G02F3/02 , G02F1/015
摘要： PURPOSE:To obtain a large extinction ratio and a fast response speed and to enable memorization even when the intensity of input light becomes zero. CONSTITUTION:The optical memory array is structured by laminating a phototransistor 2, which varies in electric output by irradiation with the input light Pin, and an MQW-pin modulator 3, which has a function varying in reflection factor to bias light Pbias with the electric output and has multiple quantum well structure in a layer (i), vertically on a semiconductor substrate 1; and the phototransistor 2 and MQW-pin modulator 3 are electrically connected in parallel and a load resistance 7 and a constant voltage source are connected in series.

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