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41. 发明专利

JP2004179341A Method for manufacturing printed wiring material 审中-公开
公开(公告)号：JP2004179341A
公开(公告)日：2004-06-24
申请号：JP2002342900
申请日：2002-11-26
申请人： Matsushita Electric Works Ltd , 松下電工株式会社
发明人： KANETANI DAISUKE , MAEDA SHUJI , NISHIMOTO SHINYA
IPC分类号： H05K3/38 , H05K3/18 , H05K3/22
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a printed wiring material for forming circuits with fine wiring, which ensures adhesiveness of circuits to an insulating layer.
SOLUTION: The method comprises steps of forming a B-stage insulating layer 3 on a surface of a substrate 2 by applying a resin film 1 having a thermosetting resin as a main component to the substrate 2, forming a circuit 4 by plating on a surface of the insulating layer 3, pressing the resultant to embed the circuit 4 into the insulating layer 3, and completely curing the insulating layer 3 up to a C-stage.
COPYRIGHT: (C)2004,JPO

42. 发明专利

JP2004050655A Forming method for insulating resin layer onto wiring board 审中-公开
公开(公告)号：JP2004050655A
公开(公告)日：2004-02-19
申请号：JP2002211910
申请日：2002-07-22
申请人： Matsushita Electric Works Ltd , 松下電工株式会社
发明人： NISHIMOTO SHINYA , MAEDA SHUJI , KANETANI DAISUKE
IPC分类号： B29C43/10 , B29C43/18 , B29C43/56 , B29K101/10 , B29L9/00 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To reduce the generation of voids in an insulating resin layer which is formed by hardening a thermosetting resin film. SOLUTION: A laminated article 5 is heated between hot platens 11 and 11 being confronted with each other under a pressure-reduced atmosphere. At the same time, a diaphragm 16 comprising an elastic body which is arranged in a manner to cover one hot platen 11 is expanded by compressed air, and the laminated article 5 is pressurized under a state being pressed to the other hot platen 11. Thus, the thermosetting resin film 3 forms the hardened insulating resin layer on the wiring board 2 by this forming method for the insulating resin layer onto the wiring board. At least to either one of molding platens 12 and 12 to which the confronted hot platens 11 and 11 are respectively attached, an oscillating member which applies a vibration is attached, and the vibration is applied to the laminated article 5 which is heat-pressurized between the hot platens 11 and 11 by the oscillating member. COPYRIGHT: (C)2004,JPO

43. 发明专利

JP2003347744A Resin film for manufacturing multilayer printed circuit board 审中-公开
标题翻译：用于制造多层印刷电路板的树脂膜
公开(公告)号：JP2003347744A
公开(公告)日：2003-12-05
申请号：JP2002154806
申请日：2002-05-28
申请人： Matsushita Electric Works Ltd , 松下電工株式会社
发明人： KANETANI DAISUKE , MAEDA SHUJI , NISHIMOTO SHINYA
IPC分类号： B32B27/20 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a resin film for manufacturing a multilayer printed circuit board, which enables formation of an insulating layer having excellent insulation reliability, without damaging its adhesion to a conductive layer.
SOLUTION: The resin film 3 for manufacturing a multilayer printed circuit board is adhered to the surface of a circuit board 4 by vacuum lamination. In the lamination, stacking is performed using a first layer consisting of a thermosetting resin composition which comprises rubber constituents soluble in alkali and inorganic fillers, and a second layer consisting of a thermosetting resin composition which comprises neither the rubber constituents nor the inorganic fillers.
COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提供一种用于制造多层印刷电路板的树脂膜，其能够形成具有优异绝缘可靠性的绝缘层，而不损害其对导电层的粘附性。解决方案：用于制造多层印刷电路板的树脂膜3通过真空层压粘合到电路板4的表面。在层压中，使用包含由可溶于碱和无机填料的橡胶成分的热固性树脂组合物构成的第一层和由既不包含橡胶成分也不包含无机填料的热固性树脂组合物构成的第二层进行堆叠。版权所有（C）2004，JPO

44. 发明专利

JP2003086941A PRINTED WIRING BOARD 审中-公开
公开(公告)号：JP2003086941A
公开(公告)日：2003-03-20
申请号：JP2001277903
申请日：2001-09-13
申请人： MATSUSHITA ELECTRIC WORKS LTD
发明人： KANETANI DAISUKE , MAEDA SHUJI , NISHIMOTO SHINYA
IPC分类号： B32B15/08 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a printed wiring board in which the occurrence of a wrap due to a heat history can be reduced and in which a conductor layer of an outermost layer can be easily formed in a fine pattern. SOLUTION: The printed wiring board is formed by alternatively building up a plurality of insulating resin layers 2a, 2b, etc., and conductor layers 3a, 3b, etc., on the surface of an inner layer circuit substrate 1. The layer 2b of the outermost layer is formed as a layer containing a main body of resin not containing a glass cloth 4 as a base, and the layer 2a of the second layer from the outermost layer is formed as a layer containing the glass cloth 4 as the base.

45. 发明专利

JP2002151840A MANUFACTURING METHOD FOR PRINTED-WIRING BOARD 失效
公开(公告)号：JP2002151840A
公开(公告)日：2002-05-24
申请号：JP2000348968
申请日：2000-11-16
申请人： MATSUSHITA ELECTRIC WORKS LTD
发明人： MAEDA SHUJI , KANETANI DAISUKE
IPC分类号： H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide the manufacturing method for a printed-wiring board for reducing the variation in the thickness of an insulating layer in the manufacturing method of the printed-wiring board for adhesively forming the insulating layer, by overlapping a resin sheet on a base substrate where a circuit is formed. SOLUTION: A laminate 1, where the resin sheet 3 is overlapped to the base substrate 2 is placed on a carrier sheet 5 of continuous length and introduced into a vacuum generating machine 31, the laminate 1 is heated and pressurized from the upper and lower portions by a plate board 1 under a reduced pressured, and the insulating layer 3a is adhered and formed onto the base substrate 2. The external dimensions of the base substrate 2, the resin plate 3, and the plate board 4 should be larger in the order of the resin sheet 3, the plate board 4, and the base substrate 2. When heating and pressurizing, the outer-periphery end of the resin sheet 3 is arranged at the inside of the plate board 4, and the outer-periphery end of the base substrate 2 is arranged in a state with its being projected from the plate board 4.

46. 发明专利

JP2002076591A PRINTED WIRING BOARD AND ITS PRODUCING METHOD 失效
公开(公告)号：JP2002076591A
公开(公告)日：2002-03-15
申请号：JP2000256642
申请日：2000-08-28
申请人： MATSUSHITA ELECTRIC WORKS LTD
发明人： KANETANI DAISUKE , MAEDA SHUJI
IPC分类号： C25D5/02 , C25D5/18 , C25D7/00 , H05K1/02 , H05K3/18 , H05K3/24 , H05K3/34
摘要： PROBLEM TO BE SOLVED: To provide a printed wiring board in which mountability of component can be enhanced by eliminating protrusions in the central part of lands formed in fine pattern. SOLUTION: Lands 1a having a pattern of 100 μm wide or less are formed on a basic material 2 and the surface of the land 1a is recessed 7. At the time of mounting a component, e.g. a semiconductor chip, on a printed wiring board, bumps or solder balls can be placed stably on the lands 1a in the step for mounting the component and the component can be mounted easily.

47. 发明专利

JP2001210932A METHOD OF MANUFACTURING PRINTED WIRING BOARD 失效
公开(公告)号：JP2001210932A
公开(公告)日：2001-08-03
申请号：JP2000016618
申请日：2000-01-26
申请人： MATSUSHITA ELECTRIC WORKS LTD
发明人： KANETANI DAISUKE , TAKAGI KOJI , MORIOKA KAZUNOBU , NISHIMOTO SHINYA
IPC分类号： H05K3/18 , C25D3/38 , C25D5/18 , C25D7/00
摘要： PROBLEM TO BE SOLVED: To provide a method by which such a printed wiring board can be manufactured that fine irregularities can be formed easily on the surface of a circuit through a simple step and, even when a fine pattern having narrow line widths and line intervals is formed, the deficit, such as the edge chipping, etc., of the circuit can be suppressed. SOLUTION: This method of manufacturing the printed wiring board 1 includes a process of forming a circuit 5 containing an electroplating step. Simultaneously with the formation of a plated layer 2 on a substrate 6 in the electroplating step, the fine irregularities are formed on the surface of the plated layer 2.

48. 发明专利

JP2000269644A MANUFACTURING BUILD-UP MULTILAYER WIRING BOARD 失效
公开(公告)号：JP2000269644A
公开(公告)日：2000-09-29
申请号：JP6919699
申请日：1999-03-15
申请人： MATSUSHITA ELECTRIC WORKS LTD
发明人： SATO KOJI , OGAWA HIROSHI , TASHIRO HIROSHI , KUBO MASAHARU , KAWASUMI KENGO , AOTSU MASAO , KANETANI DAISUKE , KAGAMI KANEO
IPC分类号： H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing build-up multilayer wiring board, whereby a plating layer having a sufficient thickness in vias can be formed without leaving deposition failure parts, and the conduction reliability with vias is high. SOLUTION: A resin layer 6 is formed on one surface of a metal foil 5 to form a metal foil 7 with resin, the resin layer of the foil 7 is laid on the surface of an inner layer board 3 with a circuit 4, it is hot pressureformed to laminate the metal foil 5 on the board 3 via the resin layer 6, vias 22 are bored into the resin layer 6 to expose the circuit 4 of the board 3 at the bottom, the panel plating is made including the inside of the vias 22, and the foil 5 is patterned to form a circuit, thus forming a build-up multilayer wiring board. The panel plating is repeated twice or more in the sequence of chemical plating pretreatment, chemical plating and electroplating.

49. 发明专利

JP2000049461A MANUFACTURE OF MULTILAYER PRINTED WIRING BOARD 失效
公开(公告)号：JP2000049461A
公开(公告)日：2000-02-18
申请号：JP21331498
申请日：1998-07-28
申请人： MATSUSHITA ELECTRIC WORKS LTD
发明人： HIRATA ISAO , KANETANI DAISUKE , ISHIHARA MASAYUKI
IPC分类号： H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a multilayer printed wiring board, which can fill a resin in through holes formed in an internal layer base material simply and the good filling efficiency of the resin, and raises the reliability of the formed multilayer printed wiring board. SOLUTION: When a filler is formed as a molded body by compression molding the filler only at 300 kg/cm2, the mean grain diameter of the filler before the compression is held also after the compression molding and as the filler, such a filler that the volume fraction of the filler in the above molded body becomes 70 volume % or higher is used. A resin composition 4 containing such the filler by 5 to 60 volume % is coated on a base material 3 to obtain a resin- attached base material 5. This resin-attached base material 5 is superposed on an internal layer material 2 formed with through holes 8 in such a way that the composition 4 provided with the resin-attached base material 5 opposes to the material 2, is laminated on the material 2 by heating, pressing and molding, and is formed integrally with the material 2.

50. 发明专利

JPH08153954A MANUFACTURE OF CERAMIC PRINTED WIRING BOARD 失效
公开(公告)号：JPH08153954A
公开(公告)日：1996-06-11
申请号：JP29619194
申请日：1994-11-30
申请人： MATSUSHITA ELECTRIC WORKS LTD
发明人： KANETANI DAISUKE , MORIOKA KAZUNOBU , FUKUYA NAOHITO
IPC分类号： H05K3/32 , H05K1/03 , H05K1/16 , H05K3/18 , H05K3/24
摘要： PURPOSE: To prevent the occurrence of a skip phenomenon which occurs at the time of performing electroless plating by heat-treating a ceramic printed wiring board after a thick resistor layer, terminal layer, and insulator layer are formed on the board and before an electroless-plated layer is formed. CONSTITUTION: After a thick resistor layer 2, terminal layer 3, and insulator layer 4 are formed on the surface of a ceramic board 1, the board 1 is heat- treated at 150 deg. or higher temperature for more than 3 hours. Consequently, the exposed section 3r of the layer 3 is reduced and the activity of the section 3r against the electroless plating to be performed in the succeeding process is improved. When the heat-treating temperature exceeds 400 deg.C, the layer 4 is apt to remelt and the glass components in the layers 4 and 3 cause a chemical reaction. As a result, the glass layer in the layer 3 is taken into the layer 4 and the possibility of occurring such a bleed out phenomenon that the layer 3 becomes porous and a disconnection fault occurs becomes higher. Thereafter, an electroless-plated layer 6 and electroplated layer 8 are formed on the board 1.

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