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41. 发明专利

JPS62221736A VIRTUAL COMPUTER SYSTEM 失效
公开(公告)号：JPS62221736A
公开(公告)日：1987-09-29
申请号：JP6405086
申请日：1986-03-24
申请人： HITACHI LTD
发明人： SAWAMOTO HIDEO
IPC分类号： G06F9/46 , G06F9/48 , G06F12/08 , G06F12/10
摘要： PURPOSE:To shorten the VM dispatch time by selecting a field to be loaded out of a VMIR according to a loading level when a VM start instruction is executed and then loading the selected field into a hardware. CONSTITUTION:A loading level indicating region LLIR 3 is set to a main storage MS 1 following a VM information region VMIR 2. Then a virtual machine monitor VMM decides previously the loading level and stores it in the area LLIR 3 before the start instruction of a virtual computer VM is produced. When the VM start instruction is executed, the LLIR 3 is read and then a field in a VMIR 2 corresponding to a bit '1' in those bits 0-23 is read. This read field is loaded to the prescribed hardware in a CPU 4.

42. 发明专利

JPS6037933B2 失效
公开(公告)号：JPS6037933B2
公开(公告)日：1985-08-29
申请号：JP15551180
申请日：1980-11-04
申请人： HITACHI LTD
发明人： IKEDA KOICHI , SAWAMOTO HIDEO
IPC分类号： G06F12/10

43. 发明专利

JPS60140437A VIRTUAL COMPUTER SYSTEM TIMER CONTROL SYSTEM 失效
公开(公告)号：JPS60140437A
公开(公告)日：1985-07-25
申请号：JP24628783
申请日：1983-12-28
申请人： HITACHI LTD
发明人： TANAKA TOSHIHARU , UMENO HIDENORI , SAWAMOTO HIDEO , KUBO TAKASHIGE
IPC分类号： G06F9/46 , G06F9/48 , G06F15/00
摘要： PURPOSE:To decrease the overhead of a control program (VMCP) writing a timer value updating request to a virtual computer (VM) under running to a clock comparator device directly exclusively for VM, not registering in a cue. CONSTITUTION:When the VMCP managing the operating system starts the VM while the VM mode flag 26 is zero, an address of a storage area (PSA) of the VMCP is set to a prefix register (PXR)11. When the VMCP starts VM3, the VMCP sets the timer value of timer (CKC) of a timer storage block of the VM3 to a CKC1. Then the VMCP retrieves whether or not a clock comparator interruption request of the VM3 is registered in the cue 3 and when retrieved, its request is eliminated from the cue 3. Moreover, the VMCP has a CKC interruption storage cause of the VM3 at the start of the VM3, the VMCP sets a pending flag to 1.

44. 发明专利

JPS60134360A INFORMATION PROCESSING DEVICE 失效
公开(公告)号：JPS60134360A
公开(公告)日：1985-07-17
申请号：JP24192383
申请日：1983-12-23
申请人： HITACHI LTD
发明人： YAMADA TAKAFUMI , SAWAMOTO HIDEO
IPC分类号： G06F12/10
摘要： PURPOSE:To prevent an overhead caused by a nullification of an adress converting buffer by setting a fact that a value of a prefix register of the time of an entry registration coincides with a value of the prefix register of the time of a reference, as a condition. CONSTITUTION:An address converting buffer TLB10 is referred to, and a part of a logical address register 9 is sent to the address converting buffer 10 through a signal line 31, and read out. A prefix part PX and a logical address part LA in an entry are compared with the higher rank parts of a prefix register 4 and the logical address register 9 by comparing circuits 5, 6, respectively, and when they coincide with each other, the contents of an absolute address register 11 in which a result converted by the address converting buffer 10 is stored are selected by a selector 8. In case of dissidence, an address converting circuit 2 and a prefix converting circuit 3 are started, and an address conversion and a prefix conversion are executed.

45. 发明专利

JPS59229649A VIRTUAL COMPUTER SYSTEM 失效
公开(公告)号：JPS59229649A
公开(公告)日：1984-12-24
申请号：JP10260383
申请日：1983-06-10
申请人： HITACHI LTD
发明人： UMENO HIDENORI , SAWAMOTO HIDEO , UKAI YOSHIO
IPC分类号： G06F13/10 , G06F9/46
摘要： PURPOSE:To reduce CPU overhead and to provide the titled system with high channel I/O schedule function by incorporating a register for storing the number of a virtual computer in travelling in a CPU. CONSTITUTION:The register 2 storing the virtual computer number is incorporated in the CPU1 and a data line 4 transmitting the number to a channel control part 5 is connected. In addition, a means storing the number of a virtual computer in use is incorporated in subchannel registers 16-1, 16-2. When the subchannels can not be used, an I/O request is queued and the virtual computer number is also queued. At the time monitoring check for each subchannel or its abnormal operation, the virtual computer number of the virtual computer using the subchannel is transmitted from the I/O device system to the CPU1 side.

46. 发明专利

JPS59229638A INPUT/OUTPUT DEVICE 失效
公开(公告)号：JPS59229638A
公开(公告)日：1984-12-24
申请号：JP10259383
申请日：1983-06-10
申请人： HITACHI LTD
发明人： UMENO HIDENORI , UKAI YOSHIO , SAWAMOTO HIDEO
IPC分类号： G06F13/10 , G06F3/00 , G06F9/46
摘要： PURPOSE:To reduce I/O simulation overheads of a virtual computer system (VMS) by attaining direct execution during the common use of an I/O request instruction channel in a virtual computer (VM) under the environment of the VMS. CONSTITUTION:A register 2 in a CPU 1 includes a value (i) meaning a VM number in current travelling. When an I/O instruction is outputted from the VMi, the instruction is sent from the CPU 1 to a control device (CHC) 80 through a line 4. the CHC 80 selects a channel concerned in accordance with the sent I/O address. The CHC 80 and the corresponding channel process the I/O instruction of the VMi. A hardware system area 100 stores interruption information related to a subchannel. A real memory 50 includes a prefix 51 or the like which is a state field of the hardware or each VM.

47. 发明专利

JP2002298598A SEMICONDUCTOR DEVICE, AND TEST METHOD FOR SEMICONDUCTOR DEVICE 失效
公开(公告)号：JP2002298598A
公开(公告)日：2002-10-11
申请号：JP2001099323
申请日：2001-03-30
申请人： HITACHI LTD , HITACHI ULSI SYS CO LTD
发明人： OKUMURA ATSUSHI , HASEGAWA MASATOSHI , KOBAYASHI TORU , NAKAYAMA MICHIAKI , SAKAKIBARA HIDEKI , KITAMURA NOBUAKI , YOKOYAMA YUJI , MIYAOKA SHUICHI , SAWAMOTO HIDEO , NISHIYAMA TAKASHI , KUME SHOJI
IPC分类号： G01R31/28 , G01R31/3183 , G11C29/00 , G11C29/02 , G11C29/12 , G11C29/56
摘要： PROBLEM TO BE SOLVED: To provide test technology of a semiconductor device which can output redundancy relieving information to a high speed SRAM in the outside of a LSI at high speed, and can read out redundancy relieving information stored in the SRAM at low speed with a low speed tester after finish of the test. SOLUTION: A test device of a semiconductor device is constituted of a LSI 1 including a BIST circuit and a circuit to be tested, a tester for testing a circuit to be tested of the LSI 1, a SRAM 3 for holding a test result of the circuit to be tested of the LSI 1, or the like. The device is provided with a pass/fail discrimination signal holding circuit 108 holding a pass/fail discrimination signal inside the BIST circuit 10, and a fail bit map data generating circuit 109 outputting fail bit map information at high speed. The device outputs fail bit map information of a DRAM 204 at high speed to the high speed SRAM 3 of the outside of the LSI 1, and reads out fail bit map information of this SRAM 3 with a low speed tester after finish of a test.

48. 发明专利

JP2581659B2 失效
公开(公告)号：JP2581659B2
公开(公告)日：1997-02-12
申请号：JP24628783
申请日：1983-12-28
申请人： HITACHI LTD
发明人： TANAKA TOSHIHARU , UMENO HIDENORI , SAWAMOTO HIDEO , KUBO TAKASHIGE
IPC分类号： G06F9/46 , G06F9/48 , G06F15/00

49. 发明专利

JP2551613B2 失效
公开(公告)号：JP2551613B2
公开(公告)日：1996-11-06
申请号：JP2743688
申请日：1988-02-10
申请人： HITACHI LTD
发明人： SAWAMOTO HIDEO
IPC分类号： G06F12/08 , G06F12/00 , G06F12/06

50. 发明专利

JP2507756B2 失效
公开(公告)号：JP2507756B2
公开(公告)日：1996-06-19
申请号：JP25091387
申请日：1987-10-05
申请人： HITACHI LTD
发明人： SAWAMOTO HIDEO
IPC分类号： G06F9/34 , G06F12/02 , G06F12/06 , G06F12/10

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