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41. 发明专利

JPS617903A Sequence control device 失效
标题翻译：序列控制设备
公开(公告)号：JPS617903A
公开(公告)日：1986-01-14
申请号：JP12742684
申请日：1984-06-22
申请人： Hitachi Ltd
发明人： FUJIWARA TATSUO , ABE RIYOUICHI , KUROKAWA NAOHIRO
IPC分类号： G05B19/02 , G05B19/05
CPC分类号： G05B19/054 , G05B2219/1169
摘要： PURPOSE: To obtain a control device which can use condition control and sequence control in common by processing a specified instruction of a sequence program, when executing the sequence control, and operating a latching circuit, when a stepping condition of the program has been formed.
CONSTITUTION: A CPU3 repeats periodically an operation for calling and processing a program from a user RAM4 in accordance with a processing procedure stored in a ROM5, and executes specified output processing, when an external input signal read through an input part 2 has satisfied a logical state set by the program concerned. Latching circuits 8-0W8-n hold an output state corresponding to each output 50Wn, respectively, of an output part 6, until a stepping condition of sequence control is formed. On the other hand, a result of an output processing of a condition control program is sent out as output data 13 and an address signal 14 from the CPU3, and the output data 13 is inputted to the output part 6 through OR circuits 9-0W9-n, and turns on and off the outputs 50Wn selected by an address decoder which is not in the figure.
COPYRIGHT: (C)1986,JPO&Japio
摘要翻译：目的：为了获得通过处理顺序程序的指定指令，执行顺序控制和操作锁存电路时，当已经形成程序的步进状态时，可以共同使用条件控制和序列控制的控制装置。构成：CPU3根据存储在ROM5中的处理程序周期性地重复地从用户RAM4中调用和处理程序的操作，并且当通过输入部分2读取的外部输入信号满足逻辑时执行指定的输出处理由有关方案确定的国家。锁存电路8-0-8-n分别保持与输出部分6的每个输出端50-n对应的输出状态，直到形成顺序控制的步进状态。另一方面，条件控制程序的输出处理的结果作为输出数据13和来自CPU3的地址信号14被输出，并且输出数据13通过OR电路9-0输入到输出部分6 -9-n，并且由不在图中的地址解码器选择的输出50-n导通和截止。

42. 发明专利

JPS58195902A Sequence controller 失效
标题翻译：序列控制器
公开(公告)号：JPS58195902A
公开(公告)日：1983-11-15
申请号：JP7828082
申请日：1982-05-12
申请人： Hitachi Ltd
发明人： KUROKAWA NAOHIRO , ABE RIYOUICHI , FUJIWARA TATSUO
IPC分类号： G05B19/02 , G05B19/05
CPC分类号： G05B19/054 , G05B2219/1125 , G05B2219/1172 , G05B2219/15105
摘要： PURPOSE: To execute the processing at a high speed, by providing a longical inverting circuit of an input signal, and specifying a storing method of user RAM so that a control signal of said circuit can be generated in an address line.
CONSTITUTION: A machine code ANDA is read, it is decoded as "execute AND with an address indicated by an operated". and thereafter, it is outputted to an address line is order to select an input signal 02, and a data is read. In this case, since an address line A
10 (an inverted code bit) corresponding to the tenth bit is "1", a gate 82 (inverting gate), the data is inverted (invert.NOT), is transferred to a CPU 3 of the post-stage through a gate 83, and subsequently, AND with the previous signal information is taken.
COPYRIGHT: (C)1983,JPO&Japio
摘要翻译：目的：通过提供输入信号的纵向反相电路，并指定用户RAM的存储方法，以便能够在地址线中产生所述电路的控制信号，以高速执行处理。构成：读取机器代码ANDA，将其解码为“与操作”指示的地址执行AND。此后，输出到地址线是为了选择输入信号02，并且读取数据。在这种情况下，由于与第10位相对应的地址线A10（反相码位）为“1”，所以将数据反转（反转门）（反转门）转移到CPU 3通过门83进行后级，并且随后与先前的信号信息进行AND。

43. 发明专利

JPS588316A SEQUENCE CONTROLLER 失效
公开(公告)号：JPS588316A
公开(公告)日：1983-01-18
申请号：JP10556581
申请日：1981-07-08
申请人： HITACHI LTD
发明人： TAKAHASHI NARUYOSHI , FUJIWARA TATSUO , KUROKAWA NAOHIRO
IPC分类号： G05B23/02 , G05B19/10
摘要： PURPOSE:To perform the rewrite of set data intentionally, by switching the mode to various modes easily with the operation of a functional switching key and selecting the propriety of rewrite of monitor display and set data. CONSTITUTION:When a functional switching key is switched to the mode such as test, execution and adjustment and a start key is depressed, the contents of display of the display section 7 are displayed on the line display during high speed refresh based on the information stored in a user's RAM11. When a TIM key (timer designation) is depressed at this state, the displays 7 are all distinguished and the number designation of the timer is waited. When the number of timer is designated, this number of the elapsed data are displayed on the display section 7 from an RAM16 of a CPU6 via a keyboard control section IC15. When an R/W key is depressed with the numerical key depression to be specified, the numericalkey data are read, a new set data is written in the specified area of the RAM11 and the data in the monitor is rewritten.

44. 发明专利

JPS57164307A PROGRAMMABLE CONTROLLER 失效
公开(公告)号：JPS57164307A
公开(公告)日：1982-10-08
申请号：JP2900982
申请日：1982-02-26
申请人： HITACHI LTD
发明人： ABE RIYOUICHI , KUROKAWA NAOHIRO , FUJIWARA TATSUO
IPC分类号： G05B23/02 , G05B19/10
摘要： PURPOSE:To make programming easy and to achieve confirmed operation, by arranging keys designating input and output terminals and a display corresponding to each key closely. CONSTITUTION:Input number setting keys 51 and displays 52 are provided for the number of input terminals in an input set display 5. Output number setting keys 61 and displays 62 are provided for the number of output terminals in an output set display 6. At program input, keys 41 indicating instructions, the input number set keys 51 and the output number set keys are used. One key corresponds to one step and job can be done while confirming the key input with the displays. At the execution of a program, since a display indicating a step during execution is operative, the operation can be confirmed.

45. 发明专利

JPS57121709A Sequence controller 失效
标题翻译：序列控制器
公开(公告)号：JPS57121709A
公开(公告)日：1982-07-29
申请号：JP640081
申请日：1981-01-21
申请人： Hitachi Ltd
发明人： KUROKAWA NAOHIRO , ABE RIYOUICHI
IPC分类号： G05B19/05
CPC分类号： G05B19/056 , G05B2219/1159 , G05B2219/1175 , G05B2219/13004 , G05B2219/13155
摘要： PURPOSE:To freely add a program by OR of a sequence circuit and to execute it by an optional step, by providing a temporary storage part. CONSTITUTION:An operation processing part 31 executes the processing in accordance with contents of an ROM32, in which a fundamental processing procedure has been stored in advance. A temporary storage part 33 consists of the first flip-flops (FF) F1-Fn corresponding to the respective output terminals of an output part 2, the second FFs f1-fn being same as above, OR gates 311-31n for taking OR of an output in the operation processing part and storage contents of the first FF, and output lines 211-21n for supplying a signal to the output part 2. In this temporary storage part 33, a result of 1 scanning portion is stored temporarily by OR as to the same output number. Accordingly, even if a program addition by OR is executed by an optional step, the contents held in the temporary storage part the not varied.
摘要翻译：目的：通过序列电路的OR自由添加程序，并通过可选步骤执行，通过提供临时存储部分。构成：运算处理部31根据预先存储有基本处理步骤的ROM32的内容进行处理。临时存储部分33由对应于输出部分2的各个输出端的第一触发器（FF）F1-Fn，与上述相同的第二FFs f1-fn组成，用于取得OR的OR门311-31n 操作处理部分中的输出和第一FF的存储内容以及用于向输出部分2提供信号的输出线211-21n。在该临时存储部分33中，将1个扫描部分的结果暂时存储为OR作为到相同的输出数。因此，即使通过可选步骤执行通过OR的程序添加，保存在临时存储部中的内容也不变化。

46. 发明专利

JPS56118109A SEQUENCE CONTROLLER 失效
公开(公告)号：JPS56118109A
公开(公告)日：1981-09-17
申请号：JP2168280
申请日：1980-02-25
申请人： HITACHI LTD
发明人： KUROKAWA NAOHIRO
IPC分类号： G05B19/05 , G05B19/10
摘要： PURPOSE:To make easy the operation, by displaying the selection of keys with a plurality of times as required, in selecting the logical operation type set keys. CONSTITUTION:When the process position to be objective of program processes provided plurally is set, the figure is displayed on a program process display section 423. If nothing is set with previous programming, specific preset types of logical operation is compulsively selected and the status code according to it is set to a status storage section 22. At the same time, a status counter 23 and a numeric counter 24 are cleared and the next key input is waited. Even if the logical operation type set key operation is changed, the input signal element group stored in the respective set location is selected with the judgement of content of the status memory section 22, and the head and set position one after another where the respective input signal elements are set with the status counter 23 are searched to display them on a display section 42.

47. 发明专利

JPS56118108A DISPLAY DEVICE FOR SEQUENCE CONTROLLER 失效
公开(公告)号：JPS56118108A
公开(公告)日：1981-09-17
申请号：JP2168180
申请日：1980-02-25
申请人： HITACHI LTD
发明人： KUROKAWA NAOHIRO , UEDA AKIHISA , ABE RIYOUICHI
IPC分类号： G05B19/05 , G05B19/04 , G05B19/048
摘要： PURPOSE:To realize the display for three states with ease simply, by classifying the state of illumination into a normal and special state of illumination. CONSTITUTION:The special state of illumination is taken as dark state and it is adopted for the set display section of a program type sequence controller. A dark state production circuit 5 consists of a signal generating circuit 50 producing a rectangular wave signal S with a given duty ratio in one period, latch circuit 421 representing the presence of input designation and illumination signal generating section consisting of logical circuits 51, 52 which operates logic between the signal from 422 holding the types of contacts and the signal produced from the signal generating circuit 50. From the signals from the latch circuits 421, 422 where the display elements are stored to display in advance at program setting, an LED411 is driven into three states; illumination, extinguishment and the said special state of illumination (dark illumination).

48. 发明专利

JPS5663606A SEQUENCE CONTROL UNIT 失效
公开(公告)号：JPS5663606A
公开(公告)日：1981-05-30
申请号：JP13760479
申请日：1979-10-26
申请人： HITACHI LTD
发明人： KUROKAWA NAOHIRO , FUJIWARA TATSUO
IPC分类号： G05B15/02 , G05B19/02 , G05B19/05
摘要： PURPOSE:To make it possible to not only elevate the utilization factor of the memory part but also perform a high speed execution processing, by storing in advance the head step of each program for search, before executing each program. CONSTITUTION:When the start switch 121 is pushed, the head step 0 of the setting element memory 1 is selected by the first pulse generated from the clock generating circuit 3. The part which has stored the control system is input to the control system decision circuit 8, and it is decided. In this case, ''0'' is output in accordance with the sequence control program. In the next place, in case when the step N1 has been selected, since it is a cyclic control, the result 1 which has been decided by the control system decision circuit 8 is output, the step N1 is stored in the register of the search part 11. In this way, each head step of the cyclic control programs which have been optionally arranged in stored in the register of the search part 11. When said operation has been finished, the start switch is turned off. When search of the cyclic control program has been finished, it is shifted to the regular processing operation.

49. 发明专利

JPS5434854A AUTOMATIC METER EXAMINATION APPARATURS 失效
公开(公告)号：JPS5434854A
公开(公告)日：1979-03-14
申请号：JP10042277
申请日：1977-08-24
申请人： HITACHI LTD
发明人： SANO KAZUO , SAKOU EIZABUROU , KUROKAWA NAOHIRO
IPC分类号： H04Q9/00 , G01D5/25 , G08C15/00 , G08C19/30 , H04Q9/14
摘要： PURPOSE:To enable address instruction to all meters even when it is impossible to examine part of meters by addressing next meter selection after printing the received meter indication or after detecting inability of reception.

50. 发明专利

JPH0677964A TRANSMISSION SYSTEM 失效
公开(公告)号：JPH0677964A
公开(公告)日：1994-03-18
申请号：JP22717092
申请日：1992-08-26
申请人： HITACHI LTD
发明人： GOTOU SATOKO , KUROKAWA NAOHIRO
IPC分类号： H04L12/40
摘要： PURPOSE:To control the connecting/disconnecting state of a terminating resistor at a slave station from a master station. CONSTITUTION:When a master station 100 in a monitor room A is moved to the vicinity of a terminal equipment 501, a terminating resistor ON instruction is sent from the master station 100 to a terminal equipment 500. When this instruction is received, a coil 112 is excited through a terminating resistor control part 11, a contact 113 is turned on, and a terminating resistor 43 is turned to the connecting state. A switch 44 of a converter 200 at the master station is manually turned off, and the terminating resistor is turned to the disconnecting state. The master station is connected adjacently to the terminal equipment 501. When the master station connected adjacently is returned to the terminal equipment 501 to the monitor room, a terminating resistor OFF instruction is sent from the master station to the terminal equipment 500. The terminal equipment 500 receives this instruction, the coil 112 is demagnetized through the terminating resistor control part 111, the contact 113 is turned off, and the terminating resistor is turned to the disconnecting state. The switch of the converter at the master station is manually turned on, and the terminating resistor is turned to the connecting state. The master station is installed at the monitor room.

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