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41. 发明专利

JP2009099576A Vertical wafer boat 有权
标题翻译：垂直轮船
公开(公告)号：JP2009099576A
公开(公告)日：2009-05-07
申请号：JP2007266479
申请日：2007-10-12
申请人： Covalent Materials Corp , コバレントマテリアル株式会社
发明人： AOKI TATSUHIKO , SENSAI KOJI , ARAKI KOJI , INABA TAKESHI , YAMAGUCHI TOSHIHIRO , TABEI TAKAHIRO , HANEDA TAKU , TANAKA TATSUYA , KAWAMURA TAKAFUMI , KANAMARU HIDEKAZU , SEKIGUCHI MASAYUKI
IPC分类号： H01L21/22 , H01L21/31 , H01L21/324 , H01L21/683
CPC分类号： H01L21/67309 , H01L21/68
摘要： PROBLEM TO BE SOLVED: To provide a vertical wafer boat which is improved in purification efficiency of purification processing and has a long-sized wafer support portion. SOLUTION: A top plate 7 has an opening portion 7a formed having its center at the center point of a wafer W to be mounted and a slit portion 7b formed on an insertion side of the wafer connecting with the opening portion 7. The width T of the slit 7 is 35 to 45% of the width ϕD of the top plate 7, top-surface corner portions 2a1, 3a1, 4a1, and 5a1 are beveled up to positions which are 40 to 60% of lengths of wafer support portions 2a, 3a, 4a, and 5a from tip portions of the wafer support portions 2a, 3a, 4a and 5a toward column portions 2b, 3b, 4b and 5b, and top-surface corner portions 2a2, 3a2, 4a2 and 5a2 from the beveling end positions to the column portions 2b, 3b, 4b and 5b are formed at angles of ≤90°. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种提高净化处理的净化效率的立式晶片舟皿，并具有长尺寸的晶片支撑部分。解决方案：顶板7具有形成在其中心位于要安装的晶片W的中心的开口部分7a和形成在与开口部分7连接的晶片的插入侧上的狭缝部分7b。狭缝7的宽度T为顶板7的宽度φD的35〜45％，顶面拐角部分2a1,3a1,4a1和5a1倾斜到晶片支承长度的40〜60％的位置部分2a，3a，4a和5a从晶片支撑部分2a，3a，4a和5a的尖端部分朝向柱部分2b，3b，4b和5b，以及顶表面角部分2a2,3a2,4a2和5a2从在柱部分2b，3b，4b和5b处的倾斜端部位置以≤90°的角度形成。版权所有（C）2009，JPO＆INPIT

42. 发明专利

JP2008171969A Manufacturing method of semiconductor substrate 审中-公开
标题翻译：半导体衬底的制造方法
公开(公告)号：JP2008171969A
公开(公告)日：2008-07-24
申请号：JP2007003029
申请日：2007-01-11
申请人： Covalent Materials Corp , コバレントマテリアル株式会社
发明人： SENSAI KOJI , ISOGAI HIROMICHI , SENDA TAKESHI , TOYODA EIJI , ARAKI KOJI
IPC分类号： H01L21/322 , H01L21/02 , H01L21/304
摘要： PROBLEM TO BE SOLVED: To provide the manufacturing method of a semiconductor substrate, which is high in productivity, by optimizing BMD (bulk micro defect) forming process inside of a wafer and interface oxide film removing process, in the manufacturing method of the semiconductor substrate consisting of two sheets of semiconductor wafers joined directly.
SOLUTION: The manufacturing method of the semiconductor substrate consisting of two sheets of semiconductor wafers joined directly comprises a process for preparing a first semiconductor wafer whose nitrogen concentration is not more than 1E12 atoms/cm
3 , a process for preparing a second semiconductor wafer whose nitrogen concentration is not less than 1E14 atoms/cm
3 , a process for bonding the first semiconductor wafer to the second semiconductor wafer and a process for applying heat treatment on the semiconductor substrate, formed in the bonding process, in the atmosphere containing hydrogen gas at a temperature not lower than 1,000°C and not higher than 1,350°C.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：解决的问题：为了提供生产率高的半导体基板的制造方法，通过优化晶片内部的BMD（体微观缺陷）形成工序和界面氧化膜除去工序，制造方法由两片半导体晶片组成的半导体衬底直接接合。解决方案：由直接接合的两片半导体晶片组成的半导体衬底的制造方法包括制备氮浓度不超过1E12原子/ cm 3的第一半导体晶片的工艺，制备其氮浓度不小于1E14原子/ cm 3的第二半导体晶片的方法，将第一半导体晶片接合到第二半导体晶片的工艺以及在第二半导体晶片上施加热处理的工艺半导体衬底，在接合工艺中形成，在含有氢气的气氛中，温度不低于1000℃且不高于1350℃。版权所有（C）2008，JPO＆INPIT

43. 发明专利

JP2008166647A Semiconductor substrate and its manufacturing method 有权
标题翻译：半导体基板及其制造方法
公开(公告)号：JP2008166647A
公开(公告)日：2008-07-17
申请号：JP2007000268
申请日：2007-01-04
申请人： Covalent Materials Corp , コバレントマテリアル株式会社
发明人： TOYODA EIJI , SENDA TAKESHI , NARITA AKIKO , ISOGAI HIROMICHI , SENSAI KOJI
IPC分类号： H01L21/02
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor substrate and its manufacturing method in which a yield of a semiconductor device to be formed on the semiconductor substrate can be improved by optimizing a rotation angle of two wafers to be bonded together, in the semiconductor substrate with a DSB (Direct Silicon Bonding) structure, and to provide its manufacturing method.
SOLUTION: The present invention relates to a semiconductor substrate formed by directly bonding a first semiconductor wafer 102 with {100} orientation and a second semiconductor wafer 104 with {110} orientation, wherein an angle (rotation angle) between a direction of a surface of the first semiconductor wafer 102 and a direction of a surface of the second semiconductor wafer 104 is equal with or more than 7° and less than or equal with 13°.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种半导体衬底及其制造方法，其中可以通过优化要结合在一起的两个晶片的旋转角度来改善要形成在半导体衬底上的半导体器件的产量，在具有DSB（直接硅键合）结构的半导体衬底，并提供其制造方法。解决方案：本发明涉及通过以ä110}取向直接接合第一半导体晶片102和具有ä110}取向的第二半导体晶片104形成的半导体基板，其中在方向<110>之间的角度（旋转角度）第一半导体晶片102的表面和第二半导体晶片104的表面的方向<110>等于或大于7°并且小于或等于13°。版权所有（C）2008，JPO＆INPIT

44. 发明专利

JP2008166517A Manufacturing method of semiconductor substrate 审中-公开
标题翻译：半导体衬底的制造方法
公开(公告)号：JP2008166517A
公开(公告)日：2008-07-17
申请号：JP2006354846
申请日：2006-12-28
申请人： Covalent Materials Corp , コバレントマテリアル株式会社
发明人： SENSAI KOJI , ISOGAI HIROMICHI , SENDA TAKESHI , TOYODA EIJI , ARAKI KOJI
IPC分类号： H01L21/324 , H01L21/26 , H01L21/268 , H01L21/322
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor substrate achieving a high yield in a semiconductor device by suppressing a decrease in the oxygen concentration of a semiconductor substrate surface layer and reducing a COP in the semiconductor substrate surface layer.
SOLUTION: The manufacturing method of the semiconductor substrate has: a process for slicing a semiconductor single crystal ingot; and a process for heat-treating a semiconductor wafer obtained in the slicing process at a temperature rise/fall rate of not lower than 100°C/sec and not higher than 1,000°C/sec and at a temperature range of not lower than 1,200°C and not higher than 1,400°C for not shorter than five seconds and not longer than five minutes in reducing gas, inert gas, or a mixed gas atmosphere of the reducing gas and insert gas under ordinary pressure.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：解决的问题：通过抑制半导体衬底表面层的氧浓度的降低和半导体衬底表面层中的COP的降低，提供半导体器件中获得高产率的半导体衬底的制造方法。解决方案：半导体衬底的制造方法具有：将半导体单晶锭切割的工序; 以及以不低于100℃/秒且不高于1000℃/秒的温度上升/下降速率和不低于1200℃的温度范围对切片过程中获得的半导体晶片进行热处理的方法在常压下还原气体和插入气体的还原气体，惰性气体或混合气体气氛中，不低于1400℃，不高于1400℃，不低于5秒钟，不超过5分钟。版权所有（C）2008，JPO＆INPIT

45. 发明专利

JP2008153404A Flattening method and flattening device of semiconductor wafer and manufacturing method of semiconductor wafer 有权
标题翻译：半导体波形的平坦化方法和平坦化装置及半导体波形的制造方法
公开(公告)号：JP2008153404A
公开(公告)日：2008-07-03
申请号：JP2006339248
申请日：2006-12-15
申请人： Covalent Materials Corp , Shibaura Mechatronics Corp , コバレントマテリアル株式会社 , 芝浦メカトロニクス株式会社
发明人： IWAMI MUNENORI , ISOGAI HIROMICHI , SENSAI KOJI , SENDA TAKESHI , TOYODA EIJI
IPC分类号： H01L21/3065
摘要： PROBLEM TO BE SOLVED: To provide a flattening method and a flattening device of a semiconductor wafer, with which a defect part is formed with flattening and impurity such as a heavy metal can be caught and fixed in the defect part, and to provide a manufacturing method of the semiconductor wafer.
SOLUTION: In the flattening method of the semiconductor wafer, etching gas is excited by plasma, a neutral active species and ions are formed, and the neutral active species and the ions are locally supplied to a rear face of the semiconductor wafer whose area is larger than an opening window through the opening window. Local etching and formation of the defect part are performed. The flattening device of the semiconductor wafer is provided with a plasma generating means exciting etching gas by plasma. The flattening device of the semiconductor wafer is provided with a plasma generating means installed to face the rear face of the semiconductor wafer and the opening window which is installed between the plasma generating means and the rear face of the semiconductor wafer and whose opening area is smaller than the semiconductor wafer.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了提供半导体晶片的平坦化方法和平坦化装置，通过该平坦化方法和平坦化装置，用扁平形成缺陷部分，并且可以将诸如重金属的杂质捕获并固定在缺陷部分中，并且提供半导体晶片的制造方法。解决方案：在半导体晶片的平坦化方法中，蚀刻气体被等离子体激发，形成中性活性物质和离子，并且将中性活性物质和离子局部供给到半导体晶片的背面，面积比通过开放窗口的开放窗口大。执行局部蚀刻和缺陷部分的形成。半导体晶片的平坦化装置设置有通过等离子体激发蚀刻气体的等离子体产生装置。半导体晶片的平坦化装置设置有等离子体产生装置，其安装成面对半导体晶片的背面和安装在等离子体产生装置和半导体晶片的背面之间并且开口面积较小的开放窗口比半导体晶片。版权所有（C）2008，JPO＆INPIT

46. 发明专利

JP2008187165A MANUFACTURING METHOD FOR SEMICONDUCTOR SUBSTRATE 审中-公开
公开(公告)号：JP2008187165A
公开(公告)日：2008-08-14
申请号：JP2007277183
申请日：2007-10-25
申请人： COVALENT MATERIALS CORP
发明人： SENDA TAKESHI , ISOGAI HIROMICHI , TOYODA EIJI , NARITA AKIKO , SENSAI KOJI
IPC分类号： H01L21/02
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor substrate capable of simplifying a manufacturing process and reducing manufacturing cost by optimizing total film thickness of oxide films on the surfaces of two wafers before laminated, in the method for manufacturing the semiconductor substrate having a DSB structure. SOLUTION: This method for manufacturing the semiconductor substrate includes a process for preparing a first semiconductor wafer and a second semiconductor wafer, a process for bonding the first semiconductor wafer and the second semiconductor wafer in the condition where the total film thickness of a film thickness of the oxide film on the surface of the first semiconductor wafer and a film thickness of the oxide film on the surface of the second semiconductor wafer is in a range of 0.4-1.0 nm, and a process for heat-treating the semiconductor substrate provided by bonding the first semiconductor wafer and the second semiconductor wafer in a reducing gas, an inert gas or a mixed gas atmosphere of the reducing gas and the inert gas, before a process for thinning the first semiconductor wafer or the second semiconductor wafer. COPYRIGHT: (C)2008,JPO&INPIT

47. 发明专利

JP2004363495A Semiconductor substrate 有权
公开(公告)号：JP2004363495A
公开(公告)日：2004-12-24
申请号：JP2003162784
申请日：2003-06-06
申请人： Toshiba Ceramics Co Ltd , Toshiba Corp , 東芝セラミックス株式会社 , 株式会社東芝
发明人： YOSHIMURA REIKO , TADA TSUKASA , SENSAI KOJI , KASHIMA KAZUHIKO
IPC分类号： H01L21/322 , H01L21/02 , H01L27/12
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor substrate of an SOI (silicon on insulator) structure which can perform effective capturing operation while not exerting influence upon a semiconductor layer (SOI layer) wherein impurity metals function as the active layer of the semiconductor device.
SOLUTION: The semiconductor device is provided with a carrier substrate 1 having a gettering site 10 for capturing impurity metals therein, a buried insulating film 2 provided on the carrier substrate 1 and containing an oxide of an element having a single bond energy with oxygen larger than with silicon, and a semiconductor layer (SOI layer) 3 provided on the buried insulating film 2.
COPYRIGHT: (C)2005,JPO&NCIPI

48. 发明专利

JP2004193534A Washing method of silicon wafer, and washed silicon wafer 有权
公开(公告)号：JP2004193534A
公开(公告)日：2004-07-08
申请号：JP2003005323
申请日：2003-01-14
申请人： Toshiba Ceramics Co Ltd , Toshiba Corp , 東芝セラミックス株式会社 , 株式会社東芝
发明人： KURITA HISATSUGU , HIRASAWA MANABU , NAGAHAMA HIROMI , SENSAI KOJI , INO TAKAO , YAMABE SUMISHIGE , HAYAMIZU NAOYA , SAKURAI NAOAKI
IPC分类号： H01L21/304 , B08B3/08 , C11D7/02 , C11D7/08 , C11D11/00 , H01L21/306
CPC分类号： H01L21/02052 , B08B3/08 , B08B2203/005 , C11D7/02 , C11D7/08 , C11D11/0047 , Y10S438/906
摘要： PROBLEM TO BE SOLVED: To provide a silicon wafer wherein surface adhering pollutants such as particles and metallic foreign matter can be removed while maintaining the surface of the silicon wafer flattened up to an atomic level by annealing, and a washed silicon wafer.
SOLUTION: The washing method of a silicon wafer has a process for carrying out an oxidation treatment without having dependence to crystalline orientation of a silicon single crystal constituting the wafer and a process for washing the oxidized silicon wafer with hydrofluoric acid which is subjected to the oxidation treatment. Consequently, a silicon wafer whose micro-roughness in the spatial frequency of 20/μm is 0.3 to 1.5 nm
3 in the power spectral density is obtained.
COPYRIGHT: (C)2004,JPO&NCIPI

49. 发明专利

JP2004228139A Silicon single crystal substrate 有权
公开(公告)号：JP2004228139A
公开(公告)日：2004-08-12
申请号：JP2003011177
申请日：2003-01-20
申请人： Toshiba Ceramics Co Ltd , Toshiba Corp , 東芝セラミックス株式会社 , 株式会社東芝
发明人： TADA TSUKASA , YOSHIMURA REIKO , SENSAI KOJI , KUROKAWA MASAHIKO , KAJIMA KAZUHIKO
IPC分类号： H01L21/322 , H01L21/02 , H01L27/12
摘要： PROBLEM TO BE SOLVED: To provide an improved silicon single crystal substrate possessing an IG (intrinsic gettering) capability very superior beyond the prior art silicon single crystal substrate and capable of satisfactorily dealing with the following generation and next to the following generation semiconductor device.
SOLUTION: The silicon single crystal substrate includes a crystal region having in-crystal holes from which one or more of silicon atoms are released from a crystal lattice point, in-crystal defects having an inner diameter of the size of ≤50 nm where at least ≥1 atoms among the group of elements involving O, N or C excepting silicon are separated in the in-crystal vacancy, or a composite of the foregoing defects and the holes, at density of ≥1×10
8 /cm
3 .
COPYRIGHT: (C)2004,JPO&NCIPI

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