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    • 32. 发明专利
    • LOGIC CIRCUIT
    • JPH0369211A
    • 1991-03-25
    • JP20619289
    • 1989-08-08
    • NIPPON ELECTRIC IC MICROCOMPUT
    • YAMADA HIDEAKI
    • H03K19/088H03K17/04H03K17/56H03K17/567H03K19/08
    • PURPOSE:To prevent delay of the transition time of an output signal by providing a field effect transistor whose source-drain path is connected between a second power supply terminal and the output terminal, to which gate terminal a logic signal with a phase reverse to the logic level of an output terminal is impressed. CONSTITUTION:The source of a P channel MOS field effect transistor Q5, is connected to the power supply terminal 3, the drain is connected to the output terminal 4, the back gate is connected to the power supply terminal 3 and the gate terminal is connected to a logic signal in a step preceding to a phase division transistor Q1 which logic phase is reverse to the output. When the level of the output terminal 4 is 'L', a level 'H' is impressed to the gate input terminal of the P-MOS transistor Q5. In such a state, when the signal of 'H' to 'L' is inputted to the base of the phase division transistor Q1, namely, to the input terminal, the level of the collector is changed from 'L' to 'H'. At such a time, even when the potential of the output terminal 4 is close to VOH, the output potential is increased to a power supply voltage VCC as shown by (b) by a P-MOS transistor Q3. Accordingly, a logic circuit can arrive at a potential close to the VOH earlier than a conventional circuit by delta (t).
    • 34. 发明专利
    • TTL LOGIC GATE
    • JPH0329417A
    • 1991-02-07
    • JP16351689
    • 1989-06-26
    • NEC CORP
    • AKIBA ICHIRO
    • H03K19/088H03K19/013
    • PURPOSE:To reduce the propagation delay time and to quicken the switching by connecting a 3rd bipolar transistor(TR) between a source of a 2nd bipolar TR and a 2nd power supply. CONSTITUTION:A 3rd bipolar TR 12 connects between a 2nd TR 10 and a 2nd power supply, the 3rd bipolar TR 12 is turned on when an input signal changes from a high level to a low level thereby discharging the charge charged in a mirror capacitance of the 2nd bipolar TR 10. Moreover, a Schottky barrier diode(SBD) 13 is provided between an emitter of a 1st stage bipolar TR and a collector of the 1st bipolar TR 2, and the charge charged in the mirror capacitance of the TRs of the next-stage in Darlington connection is discharged when the input changes from a high level to a low level. Thus, the propagation delay time is reduced and the switching is quickened.
    • 35. 发明专利
    • INTERFACE CIRCUIT
    • JPH02301217A
    • 1990-12-13
    • JP12220989
    • 1989-05-15
    • HITACHI LTD
    • SATO KOICHI
    • H03K19/088H03K19/0175
    • PURPOSE:To use two kinds of interface circuits with switching by forming an output circuit with a couple of switching elements connected in series between a power level and a reference level and bypassing a driving signal of the switching element at the power level side toward the reference level with an external signal. CONSTITUTION:A final stage output circuit 1 consists of a couple of transistors(TRs) Q1 and Q2 driven complementarily and connected in series between a power level and a reference level and a transmission control circuit 4 bypassing only an ON/OFF driving signal of the TR Q1 connecting to the power level side toward the reference level side selectively in response to the signal given externally is provided. Thus, two kinds of interface circuits are used switchingly for a current output type circuit applying current source and a switch output type circuit with only current sink by means of one kind of the circuit, then the degree of freedom of the constitution of the external load circuit is extended to enhance the general-purpose performance of the semiconductor integrated circuit device.
    • 36. 发明专利
    • COLLECTOR CLAMP CIRCUIT
    • JPH02298067A
    • 1990-12-10
    • JP11887989
    • 1989-05-12
    • NEC CORP
    • YAMADA KAZUMI
    • H01L29/73H01L21/331H01L21/8222H01L27/06H01L27/082H03K19/088
    • PURPOSE:To cut a process and to reduce a cost by forming a clamp circuit by combining a Shchottky barrier diode of a low forward voltage using titanium silicide with a P-N junction diode. CONSTITUTION:A cathode of a P-N junction diode Di is connected to a collector of an N-P-N bipolar transistor Q, and a cathode of a Schottky barrier diode Ds using a titanium silicide is connected to a base. Anodes of both diodes are mutually connected. In the circuit, a base current of a transistor Q is made to flow through the Ds. As this time, an anode potential of the Ds is a sum VBE+VS of a base-to-emitter forward voltage VBE and a forward voltage VS of the Ds. Meanwhile, a collector-to-emitter voltage VCE is provided by an equation I since it is lower than the anode potential by an forward voltage VF of the Di. Here, both VF and VBE are 0.7 to 0.8V, and VCE=VS. Since Ds is formed by titanium silicide, VS is 0.2 to 0.3V. Therefore, VCE is clamped to 0.2 to 0.3V. Thereby, it is possible to satisfy both saturation preventing conditions and voltage specification of a TTL circuit simultaneously.
    • 40. 发明专利
    • LOGIC CIRCUIT
    • JPH02171021A
    • 1990-07-02
    • JP32668188
    • 1988-12-23
    • FUJITSU LTD
    • YOSHIKAWA HIROSHI
    • H03K19/003H03K19/086H03K19/088H03K19/094H03K19/0952
    • PURPOSE:To avoid the deterioration in the yield of components by making a switching element being a cause to a software error and its peripheral element only redundant and applying wired-OR connection to outputs of drive elements being the result of making the drive element and its peripheral element redundant accordingly and obtaining an output. CONSTITUTION:An output common emitter amplifier including a switching element being a cause to a software error is made redundant by using two TRs 6a, 6b and resistors 6d, 6e. A drive stage 7 is made redundant by using parallel TRs 7a, 7b corresponding to the switching stage 6 made redundant and the emitter follower outputs are in wired-OR connection and the output is sent to the output terminal 5. Even when any of TRs 6a, 6b is turned on in a pseudo way, no software error is caused. Since only the TRs 6a, 6b, the resistors 6d, 6e and the TRs 7a, 7b are made redundant in the entire circuit, number of increase in the clements is less and the deterioration in the yield attended therewith is avoided.