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31. 发明专利

JP5874690B2 半導体装置の製造方法有权
公开(公告)号：JP5874690B2
公开(公告)日：2016-03-02
申请号：JP2013127545
申请日：2013-06-18
申请人：株式会社デンソー
发明人：勝間田卓 , 与倉久則
IPC分类号： H01L21/768 , H01L23/522 , H01L21/02 , H01L25/065 , H01L25/07 , H01L25/18 , B81C1/00 , H01L21/3205
CPC分类号： H01L21/76898 , B81C1/00095 , B81C1/00269 , H01L21/30604 , H01L21/308 , H01L21/31116 , H01L21/31144 , B81C2203/0118 , B81C2203/0792 , H01L2924/0002

32. 发明专利

JP2015177382A 素子電極が貫通配線と繋がったデバイス、及びその製造方法审中-公开
标题翻译：具有通过布线连接的元件电极的装置及其制造方法
公开(公告)号：JP2015177382A
公开(公告)日：2015-10-05
申请号：JP2014052845
申请日：2014-03-15
申请人：キヤノン株式会社
发明人：渡辺信一郎 , 王詩男
IPC分类号： H04R31/00 , A61B8/00 , H01L23/12 , H01L23/32 , H04R19/00
CPC分类号： G01N29/2406 , B81C1/00095 , G01N29/2418 , B81C2201/0195 , G01N2291/028 , G01N2291/101
摘要：【課題】素子と貫通配線部分を高密度でも配置することが可能なデバイスなどを提供する。【解決手段】素子3の電極が基板1内の貫通配線と電気的に接続されているデバイス12の製造方法で、貫通孔4が形成された第一の基板1上に素子3が配置された構造体を準備し、導電性のシード層が形成された第二の基板7を準備する。そして、第一の基板に、貫通孔と繋がる開口が形成されるよう壁部6を形成し、シード層と構造体の素子側の面とを接着層8を介して接合し、貫通孔と壁部の内部に入った接着層を除去してシード層を開口の内部において露出させる。シード層を用いて、壁部と貫通孔の内部に電解めっきにより導体9が充填される。【選択図】図1
摘要翻译：要解决的问题：提供即使以高密度设置元件和贯通布线部分的器件。解决方案：一种器件12的制造方法，其中元件3的电极与贯通布线电连接在基板1内包括：准备其中元件3设置在其上形成有通孔4的第一基板1上的结构; 以及制备形成有导电种子层的第二基板7。在第一基板上，形成壁部6，以形成与通孔连通的开口，种子层和元件侧的结构体的表面通过粘合层8粘合，粘合层进入通孔和壁部分被去除并且种子层暴露在开口内。通过使用种子层的电解电镀，将壁部和通孔填充有导体9。

33. 发明专利

JP5745597B2 配線の作製方法、記憶素子の作製方法有权
标题翻译：用于制造布线的方法，一种用于制造存储器元件的方法
公开(公告)号：JP5745597B2
公开(公告)日：2015-07-08
申请号：JP2013232137
申请日：2013-11-08
申请人：株式会社半導体エネルギー研究所
发明人：吉住健輔 , 針馬典子 , 山田智子
IPC分类号： H01L21/3205 , H01L21/768 , H01L27/10 , H01L29/786 , H01L21/336 , H01L21/288
CPC分类号： H05K3/1283 , B81C1/00095 , H05K3/125 , B81C2201/0184 , H01L21/288 , H01L21/76879 , H01L2924/0002 , H01L51/0022 , H05K2203/013 , H05K2203/087

34. 发明专利

JP5723876B2 多次元微細構造の製造有权
标题翻译：多维微结构的生产
公开(公告)号：JP5723876B2
公开(公告)日：2015-05-27
申请号：JP2012519712
申请日：2010-07-08
申请人：シーゲイトテクノロジーエルエルシー
发明人：スタッドニーチュック,ヘレナ , ハバーマス,アンドリュー
IPC分类号： B81C1/00 , B81B1/00 , H01F17/00 , G11B5/31
CPC分类号： G11B5/17 , B81C1/00095 , H01L28/10 , H01F41/041 , H01F41/046 , Y10T428/24612

35. 发明专利

JP5192088B2 Method for producing a mems device provided with integrated vias and spacer 有权
公开(公告)号：JP5192088B2
公开(公告)日：2013-05-08
申请号：JP2011551224
申请日：2010-02-18
申请人：カペラフォトニクスインコーポレイテッド
发明人：オストロム、ロバート
IPC分类号： B81C3/00 , B81B3/00
CPC分类号： G02B26/0841 , B81B2201/045 , B81B2203/058 , B81B2207/096 , B81C1/00095 , G02B26/0866 , Y10T29/49002

36. 发明专利

JP5049787B2 Cold welding sealing method and apparatus 有权
公开(公告)号：JP5049787B2
公开(公告)日：2012-10-17
申请号：JP2007540081
申请日：2005-11-04
申请人：マイクロチップス・インコーポレーテッド
发明人：ジョナサンアール．コッペタ、 , キャサリンエム．ビー．サンティニ、 , ノーマンエフ．ジュニア．シェパード、 , カートシェルトン、 , ダグラスビー．スネル、
IPC分类号： B23K20/00 , H01L23/02
CPC分类号： B81C1/00269 , A61K9/0097 , A61M5/14276 , A61M2205/0244 , A61M2207/00 , B23K20/02 , B33Y80/00 , B81B2201/06 , B81C1/00047 , B81C1/00095 , B81C2203/0109 , B81C2203/019 , B81C2203/038 , F16B4/004 , F16B5/08 , F16B11/004 , H01L23/10 , H01L23/3142 , H01L2224/05001 , H01L2224/05023 , H01L2224/051 , H01L2224/05568 , H01L2224/056 , H01L2224/16237 , H01L2224/81193 , H01L2924/01322 , H01L2924/10253 , H01L2924/1461 , Y10T403/477 , H01L2924/00 , H01L2924/00014
摘要： A method of forming an electrical via connection by compressing a first non-conductive substrate having an aperture comprising a layer of a first electrically conductive material with a second non-conductive substrate having a projecting member which is formed of or coated with a second electrically conductive material. The compression locally deforms and shears the first and/or second electrically conductive materials to form a bond and electrical connection between the first and second electrically conductive materials. An electrical via is made by the method.

37. 发明专利

JP2012114310A Method of forming metal wiring by transfer substrate for forming metal wiring 有权
标题翻译：通过转移基材形成金属接线形成金属接线的方法
公开(公告)号：JP2012114310A
公开(公告)日：2012-06-14
申请号：JP2010263135
申请日：2010-11-26
申请人： Tanaka Kikinzoku Kogyo Kk , 田中貴金属工業株式会社
发明人： KOGASHIWA TOSHINORI , KURITA MASAAKI , NISHIMORI TAKASHI , KANEHIRA YUKIO
IPC分类号： H01L21/60
CPC分类号： H01L21/4885 , B22F7/08 , B23K1/0016 , B23K35/0244 , B23K35/3006 , B23K35/3013 , B23K35/322 , B23K2201/40 , B81C1/00095 , B81C1/00373 , B81C2201/0188 , B81C2201/0194 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/94 , H01L2224/03003 , H01L2224/031 , H01L2224/0312 , H01L2224/03334 , H01L2224/0401 , H01L2224/0508 , H01L2224/05082 , H01L2224/05083 , H01L2224/05139 , H01L2224/05144 , H01L2224/05166 , H01L2224/05169 , H01L2224/05639 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/05666 , H01L2224/05669 , H01L2224/0567 , H01L2224/05671 , H01L2224/05673 , H01L2224/05676 , H01L2224/05678 , H01L2224/05681 , H01L2224/05684 , H01L2224/11003 , H01L2224/111 , H01L2224/1112 , H01L2224/11334 , H01L2224/13082 , H01L2224/13083 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13166 , H01L2224/13169 , H01L2224/1317 , H01L2224/13171 , H01L2224/13173 , H01L2224/13176 , H01L2224/13178 , H01L2224/13181 , H01L2224/13184 , H01L2224/94 , H01L2924/01006 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/0104 , H01L2924/01044 , H01L2924/01045 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/1461 , H01L2924/15788 , H01L2224/05644 , H01L2924/00014 , H01L2924/01046 , H01L2924/00012 , H01L2924/00 , H01L2224/11
摘要： PROBLEM TO BE SOLVED: To provide a transfer substrate for forming metal wiring on a transferred object by transfer method in which the heating temperature can be lowered on the transferred object side, and to provide a method of forming metal wiring.SOLUTION: The transfer substrate comprises: a substrate; at least one metal wiring material formed on the substrate; and an underlying metal film formed between the substrate and the metal wiring material, and transfers the metal wiring material to a transferred object. The metal wiring material is a molding produced by sintering gold powder, or the like, having a purity of 99.9 wt% or higher, and an average particle diameter of 0.01-1.0 μm, and the underlying metal film is composed of a metal such as gold or an alloy. The transfer substrate can transfer the metal wiring material to the transferred object even if the heating temperature of the transferred object is 80-300°C.
摘要翻译：要解决的问题：提供一种用于通过转印方法在转印对象上形成金属布线的转印基板，其中转印物体侧可以降低加热温度，并提供形成金属布线的方法。转移基板包括：基板; 形成在所述基板上的至少一个金属布线材料; 以及形成在基板和金属布线材料之间的底层金属膜，并将金属布线材料转印到转印对象物上。金属配线材料是通过烧结纯度为99.9重量％以上，平均粒径为0.01〜1.0微米的金粉等而制成的成型体，下面的金属膜由金属等构成金或合金。即使转印对象的加热温度为80〜300℃，转印基板也可以将金属配线材料转印到转印体上。版权所有（C）2012，JPO＆INPIT

38. 发明专利

JP4859996B1 A method of forming a metal wiring by the transfer substrate for forming a metal line 有权
公开(公告)号：JP4859996B1
公开(公告)日：2012-01-25
申请号：JP2010263135
申请日：2010-11-26
申请人：田中貴金属工業株式会社
发明人：幸男兼平 , 俊典小柏 , 昌昭栗田 , 尚西森
IPC分类号： H01L21/60
CPC分类号： H01L21/4885 , B22F7/08 , B23K1/0016 , B23K35/0244 , B23K35/3006 , B23K35/3013 , B23K35/322 , B23K2201/40 , B81C1/00095 , B81C1/00373 , B81C2201/0188 , B81C2201/0194 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/94 , H01L2224/03003 , H01L2224/031 , H01L2224/0312 , H01L2224/03334 , H01L2224/0401 , H01L2224/0508 , H01L2224/05082 , H01L2224/05083 , H01L2224/05139 , H01L2224/05144 , H01L2224/05166 , H01L2224/05169 , H01L2224/05639 , H01L2224/05647 , H01L2224/05655 , H01L2224/05664 , H01L2224/05666 , H01L2224/05669 , H01L2224/0567 , H01L2224/05671 , H01L2224/05673 , H01L2224/05676 , H01L2224/05678 , H01L2224/05681 , H01L2224/05684 , H01L2224/11003 , H01L2224/111 , H01L2224/1112 , H01L2224/11334 , H01L2224/13082 , H01L2224/13083 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13164 , H01L2224/13166 , H01L2224/13169 , H01L2224/1317 , H01L2224/13171 , H01L2224/13173 , H01L2224/13176 , H01L2224/13178 , H01L2224/13181 , H01L2224/13184 , H01L2224/94 , H01L2924/01006 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/0104 , H01L2924/01044 , H01L2924/01045 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/1461 , H01L2924/15788 , H01L2224/05644 , H01L2924/00014 , H01L2924/01046 , H01L2924/00012 , H01L2924/00 , H01L2224/11
摘要： The present invention provides a transfer substrate for transferring a metal wiring material to a transfer-receiving object, the transfer substrate comprising a substrate, at least one metal wiring material formed on the substrate and an underlying metal film formed between the substrate and the metal wiring material, wherein the metal wiring material is a molded article prepared by sintering, e.g., gold powder having a purity of 99.9% by weight or more and an average particle size of 0.01 µm to 1.0 µm and the underlying metal film is composed of a metal such as gold or an alloy. The transfer substrate is capable of transferring a metal wiring material to the transfer-receiving object even at a temperature for heating the transfer-receiving object of 80 to 300°C.

39. 发明专利

JP2008252072A Method for forming wiring and memory device 有权
标题翻译：形成接线和存储器件的方法
公开(公告)号：JP2008252072A
公开(公告)日：2008-10-16
申请号：JP2008040843
申请日：2008-02-22
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： YOSHIZUMI KENSUKE , HARIMA NORIKO , YAMADA TOMOKO
IPC分类号： H01L21/3205 , H01L21/288 , H01L23/52 , H01L27/10
CPC分类号： H05K3/1283 , B81C1/00095 , B81C2201/0184 , H01L21/288 , H01L21/76879 , H01L51/0022 , H01L2924/0002 , H05K3/125 , H05K2203/013 , H05K2203/087 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To reduce firing temperature at the time of forming a wiring and a conductive film, when a coating method, such as a droplet dicharge method that needs firing, is used. SOLUTION: Compositions, in which nanoparticles comprising conductive materials are dispersed, are discharged by using the coating method such as the droplet discharge method; then the solvent is evaporated by drying. Next, after pre-processing is performed using active oxygen, the wiring or conducting film is formed by firing. In this way, the firing temperature at fabrication can be reduced, by performing the pre-processing prior to firing using active oxygen. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了降低形成布线时的烧成温度和导电膜，可以使用如需要烧成的液滴加标法等涂布方法。解决方案：通过使用诸如液滴喷射法的涂布方法将包含导电材料的纳米颗粒分散在其中的组合物排出; 然后通过干燥蒸发溶剂。接下来，在使用活性氧进行预处理之后，通过烧结来形成布线或导电膜。以这种方式，可以通过在使用活性氧进行烧制之前进行预处理来降低制造时的烧制温度。版权所有（C）2009，JPO＆INPIT

40. 发明专利

JP3875240B2 Method of manufacturing electronic components 有权
标题翻译：空值
公开(公告)号：JP3875240B2
公开(公告)日：2007-01-31
申请号：JP2004106204
申请日：2004-03-31
申请人：株式会社東芝
发明人：美恵松尾
IPC分类号： H01L41/09 , B81B3/00 , B81B7/00 , G01L9/00 , G01P15/08 , G01P15/09 , H01L21/00 , H01L37/02 , H01L41/08 , H01L41/113 , H01L41/18 , H01L41/187 , H01L41/193 , H01L41/22 , H03H3/02 , H03H9/10 , H03H9/17
CPC分类号： B81C1/0023 , B81C1/00095 , G01L9/0019 , G01P15/0802 , G01P15/0922 , G01P15/18 , G01P2015/084 , H01L21/76898 , H01L37/02 , H01L41/1132 , H01L41/316 , H01L41/332 , H01L2224/16225 , H03H3/02 , H03H9/105 , H03H9/174
摘要： An electronic component includes a semiconductor substrate having a first surface and a second surface opposite to the first surface, a cavity that penetrates from the first surface to the second surface of the semiconductor substrate, and an electrical mechanical element that has a movable portion formed above the first surface of the semiconductor substrate so that the movable portion is arranged above the cavity. The electronic component further includes an electric conduction plug, which penetrates from the first surface to the second surface of the semiconductor substrate, and which is electrically connected to the electrical mechanical element.
摘要翻译：电子部件包括具有第一表面和与第一表面相反的第二表面的半导体衬底，从半导体衬底的第一表面到第二表面穿透的空腔，以及具有形成在上方的可动部分的电气机械元件半导体衬底的第一表面，使得可动部分布置在空腔的上方。电子部件还包括导电插塞，其从半导体衬底的第一表面穿透到第二表面，并且电连接到电气机械元件。

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