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31. 发明专利

JP2007161536A AlxGayIn1-x-yN CRYSTAL SUBSTRATE, SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD 审中-公开
标题翻译： AlxGayIn1-x-yN晶体衬底，半导体器件及其制造方法
公开(公告)号：JP2007161536A
公开(公告)日：2007-06-28
申请号：JP2005360621
申请日：2005-12-14
申请人： Sumitomo Electric Ind Ltd , 住友電気工業株式会社
发明人： FUJIWARA SHINSUKE , KAMIMURA TOMOYOSHI , OKAHISA TAKUJI , UEMATSU KOJI , OKUI MANABU , NISHIOKA SHIKO , HASHIMOTO MAKOTO
IPC分类号： C30B29/38 , H01L29/201 , H01L33/32
CPC分类号： H01L21/02658 , C30B25/02 , C30B29/403 , H01L21/02389 , H01L21/0254
摘要： PROBLEM TO BE SOLVED: To provide an Al x Ga y In 1-x-y N crystal substrate which is large and has a suitable dislocation density as a substrate for a semiconductor device, a semiconductor device containing the Al x Ga y In 1-x-y N crystal substrate, and its manufacturing method. SOLUTION: In the Al x Ga y In 1-x-y N crystal substrate 12, the area of the main face is 10 cm 2 or larger and the total dislocation density in the region excluding a region having a distance of 5 mm or smaller from the outer circumference 12v is 1×10 2 cm -2 to 1×10 6 cm -2 . COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种较大的并且具有合适的，具有合适性的作为半导体器件的衬底的位错密度，含有Al x SB x Y y S x S y N y S x S y N y S S x N y N y N y S x N y N y N z 制造方法。＆lt; P＆gt;解决方案：在Al SB SB1-xy / N晶体基板12中，主面的面积为10cm 2 以上，并且除了距离外周12v的距离为5mm以下的区域以外的区域中的总位错密度为1×10 2 -2 至1×10 6 cm -2 。版权所有（C）2007，JPO＆INPIT

32. 发明专利

JP2007161535A Method for manufacturing semiconductor crystal substrate 审中-公开
标题翻译：制造半导体晶体基板的方法
公开(公告)号：JP2007161535A
公开(公告)日：2007-06-28
申请号：JP2005360542
申请日：2005-12-14
申请人： Sumitomo Electric Ind Ltd , 住友電気工業株式会社
发明人： UEMATSU KOJI
IPC分类号： C30B25/18 , C23C16/01 , C23C16/34 , C23C16/56
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor crystal substrate, by which the warpage of crystal axis generated in a semiconductor crystal substrate, obtained by utilizing a process for vapor depositing a semiconductor crystal on a different kind of substrate, can be reduced.
SOLUTION: The method for manufacturing the semiconductor crystal substrate includes: a process for vapor depositing a first semiconductor crystal 4 on a different kind of substrate; a process for separating the first semiconductor crystal 4 from the different kind of substrate; a process for forming a processing-deteriorated layer 7 by grinding the surface of the separated side of the separated first semiconductor crystal 4 and growing a second semiconductor crystal 8 on the processing-deteriorated layer 7; and a process for slicing the stacked body containing the first semiconductor crystal 4 and the second semiconductor crystal 8. At this time, when the thickness of the first semiconductor crystal 4 is defined as h1 and the thickness of the second semiconductor crystal 8 is defined as h2, the ratio of h1 to h2 is preferably 0.01-100, more preferably 0.1-10.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种半导体晶体基板的制造方法，通过利用在不同种类的基板上蒸镀半导体晶体的工艺得到半导体晶体基板中产生的晶轴的翘曲，可以减少。解决方案：半导体晶体基板的制造方法包括：将第一半导体晶体4蒸镀在不同种类的基板上的工序; 将第一半导体晶体4与不同种类的基板分离的工序; 通过研磨分离的第一半导体晶体4的分离面的表面并在处理劣化层7上生长第二半导体晶体8来形成加工劣化层7的工艺; 以及包含第一半导体晶体4和第二半导体晶体8的层叠体的切片的处理。此时，将第一半导体晶体4的厚度定义为h1，将第二半导体晶体8的厚度定义为 h2，h1与h2的比优选为0.01〜100，更优选为0.1〜10。版权所有（C）2007，JPO＆INPIT

33. 发明专利

JP2006294697A Light emitting element and its fabrication process 有权
标题翻译：发光元件及其制造工艺
公开(公告)号：JP2006294697A
公开(公告)日：2006-10-26
申请号：JP2005110141
申请日：2005-04-06
申请人： Sumitomo Electric Ind Ltd , 住友電気工業株式会社
发明人： NAGAI YOICHI , KATAYAMA KOJI , KITABAYASHI HIROYUKI , UEMATSU KOJI
IPC分类号： H01L33/06 , H01L33/16 , H01L33/32 , H01L33/36 , H01L33/50
CPC分类号： H01L2224/48091 , H01L2224/49107 , H01L2224/73265 , H01L2224/8592 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To provide a light emitting element in which light emission quantity can be enhanced, and to provide its fabrication process. SOLUTION: An LED comprises a GaN substrate 1, an inversion layer 10, a GaN regrowth layer 11, a light emitting layer 14, a p-electrode 9b, a light emitting layer 4, a p-electrode 9a, and an n-electrode 9c. The GaN substrate 1 has one major surface 1a composed of an N face and the other major surface composed of an Ga face. The inversion layer 10 is formed on the one major surface 1a side or the other major surface 1a side of the GaN substrate 1. The GaN regrowth layer 11 is formed contiguously to the inversion layer 10 at a position separated therefrom when viewed from the GaN substrate 1 and has a surface composed of Ga face. The light emitting layer 14 is formed on the one major surface 1a side of the GaN substrate 1 at a position separated from the GaN regrowth layer 11 when viewed from the GaN substrate 1. The light emitting layer 4 is formed on the other major surface 1b side of the GaN substrate 1. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供可以提高发光量并提供其制造工艺的发光元件。解决方案：LED包括GaN衬底1，反转层10，GaN再生层11，发光层14，p电极9b，发光层4，p电极9a和 n电极9c。 GaN衬底1具有由N面构成的一个主表面1a和由Ga面组成的另一个主表面。反转层10形成在GaN衬底1的一个主表面1a侧或另一个主表面1a侧上。当从GaN衬底观察时，GaN再生长层11在与其分离的位置处与反转层10连续地形成 1，具有由Ga面组成的表面。当从GaN衬底1观察时，发光层14形成在与GaN再生长层11分离的位置处的GaN衬底1的一个主表面1a侧上。发光层4形成在另一个主表面1b上侧面的GaN衬底1.版权所有（C）2007，JPO＆INPIT

34. 发明专利

JP2005191530A Light emitting device 审中-公开
标题翻译：发光装置
公开(公告)号：JP2005191530A
公开(公告)日：2005-07-14
申请号：JP2004279980
申请日：2004-09-27
申请人： Sumitomo Electric Ind Ltd , 住友電気工業株式会社
发明人： NAGAI YOICHI , KIYAMA MAKOTO , NAKAMURA TAKAO , SAKURADA TAKASHI , AKITA KATSUSHI , UEMATSU KOJI , IKEDA AYAKO , KATAYAMA KOJI , YOSHIMOTO SUSUMU
IPC分类号： H01L33/12 , H01L33/32 , H01L33/42 , H01L33/50 , H01L33/56 , H01L33/60 , H01L33/62 , H01L33/00
CPC分类号： H01L33/02 , H01L33/0075 , H01L33/20 , H01L33/22 , H01L33/32 , H01L33/38 , H01L33/58 , H01L2224/32245 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/73265 , H01L2924/01004 , H01L2924/01012 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/12041 , H01L2924/19041 , H01L2924/00 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To provide a compact light emitting device which can be manufactured easily because of its simple structure, having stable and high light emission efficiency for a long period of time. SOLUTION: The light emitting device has a nitride semiconductor substrate 1 with specific resistance of 0.5 Ωcm or less, a n-type nitride semiconductor layer 2 on a first main surface side of the nitride semiconductor substrate, a p-type nitride semiconductor layer 6 which is positioned more far from the nitride semiconductor substrate than the n-type nitride semiconductor layer is positioned, and a light emitting layer 4 which is positioned between the n-type nitride semiconductor layer and the p-type nitride semiconductor layer. One of either the nitride semiconductor substrate 1 or p-type nitride semiconductor layer 6 is installed on a top side from which the light is emitted, the other is installed on the down side, and an electrode which is positioned on the top side is formed in one body. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：解决的问题：提供一种紧凑的发光装置，其由于结构简单而容易制造，长期稳定且高发光效率。解决方案：发光器件具有电阻率为0.5Ωcm以下的氮化物半导体衬底1，氮化物半导体衬底的第一主表面侧的n型氮化物半导体层2，p型氮化物半导体定位在比n型氮化物半导体层位于更远离氮化物半导体衬底的层6和位于n型氮化物半导体层和p型氮化物半导体层之间的发光层4。氮化物半导体衬底1或p型氮化物半导体层6中的一个安装在发射光的顶侧，另一个安装在下侧，并且形成位于顶侧的电极在一个身体。版权所有（C）2005，JPO＆NCIPI

35. 发明专利

JP2005097045A Method for manufacturing group iii nitride wafer 审中-公开
标题翻译：制造III类硝酸盐水溶液的方法
公开(公告)号：JP2005097045A
公开(公告)日：2005-04-14
申请号：JP2003333479
申请日：2003-09-25
申请人： Sumitomo Electric Ind Ltd , 住友電気工業株式会社
发明人： UEMATSU KOJI , ISHIBASHI KEIJI
IPC分类号： C30B29/38 , H01L21/306
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a group III nitride wafer by which a substrate part and the group III nitride wafer can be uniformly separated.
SOLUTION: The method for manufacturing the group III nitride wafer 20 comprises separating the wafer 1000 having the substrate part 10 in which an electroconductive group III nitride layer 30 is formed between the substrate part 10 and the group III nitride wafer 20 comprising at least one group III nitride layer, into the substrate part 10 and the group III nitride wafer 20 by decomposing the electroconductive group III nitride layer 30 by passing an electric current through the electroconductive group III nitride layer 30 in an electrolytic solution.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种用于制造III族氮化物晶片的方法，通过该方法可以均匀地分离衬底部分和III族氮化物晶片。解决方案：用于制造III族氮化物晶片20的方法包括在衬底部分10和III族氮化物晶片20之间分离具有其中形成导电III族氮化物层30的衬底部分10的晶片1000，通过使电流通过导电性III族氮化物层30，在电解液中分解导电性III族氮化物层30而进入基板部10和III族氮化物晶片20。版权所有（C）2005，JPO＆NCIPI

36. 发明专利

JP2004331453A Group iii-v compound crystal and its producing method 有权
标题翻译： III-V族化合物及其制备方法
公开(公告)号：JP2004331453A
公开(公告)日：2004-11-25
申请号：JP2003129829
申请日：2003-05-08
申请人： Sumitomo Electric Ind Ltd , 住友電気工業株式会社
发明人： NAKAHATA SEIJI , UEMATSU KOJI , HIROTA TATSU
IPC分类号： C30B29/40 , C30B25/02 , C30B25/18 , C30B29/38 , H01L21/20 , H01L21/205 , H01L33/12 , H01L33/32 , H01L33/34 , H01S5/323 , H01L33/00
CPC分类号： H01L21/02378 , C30B25/02 , C30B25/18 , C30B29/40 , C30B29/403 , C30B29/406 , H01L21/02381 , H01L21/0242 , H01L21/02538 , H01L21/02642 , H01S5/323 , Y10T428/12674 , Y10T428/12681
摘要： PROBLEM TO BE SOLVED: To provide a simple and an inexpensive method for producing a group III-V compound crystal by which the good group III-V compound crystal without cracks is obtained even if various substrates are used. SOLUTION: The method for producing the group III-V compound crystal is comprised of a step to deposit a metal film 2 on a substrate 1, a step to heat-treat the metal film 2 at an atmosphere where a patterning compound exists and a step to grow the group III-V compound crystal 4 on the heat-treated metal film 2. Another method has a step to grow a group III-V compound buffer film on the above heat-treated metal film and a step to grow the group III-V compound crystal on the group III-V compound buffer film after the heat-treating step. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了提供一种用于制备III-V族化合物晶体的简单和便宜的方法，即使使用各种基板，也可以获得没有裂纹的良好III-V族化合物晶体。解决方案：III-V族化合物晶体的制造方法包括在基板1上沉积金属膜2的步骤，在图案化合物存在的气氛下对金属膜2进行热处理的步骤以及在热处理金属膜2上生长III-V族化合物晶体4的步骤。另一种方法具有在上述热处理金属膜上生长III-V族化合物缓冲膜的步骤和生长步骤在热处理步骤之后的III-V族化合物缓冲膜上的III-V族化合物晶体。版权所有（C）2005，JPO＆NCIPI

37. 发明专利

JP2004140304A Cleaning method for semiconductor manufacturing apparatus 有权
公开(公告)号：JP2004140304A
公开(公告)日：2004-05-13
申请号：JP2002305964
申请日：2002-10-21
申请人： Sumitomo Electric Ind Ltd , 住友電気工業株式会社
发明人： AKITA KATSUSHI , UENO MASANORI , UEMATSU KOJI
IPC分类号： C23C16/44 , H01L21/205 , H01L21/3065
摘要： PROBLEM TO BE SOLVED: To provide a cleaning method for a semiconductor manufacturing apparatus, capable of removing reaction products adhered to a constituent member thereof, which is not heated to a high temperature at crystal growing.
SOLUTION: this cleaning method for the semiconductor manufacturing apparatus is a method in which the semiconductor manufacturing apparatus 10 for growing a GaN compound semiconductor crystal is cleaned, is characterized in that the semiconductor manufacturing apparatus 10 has constituent members 24, and one of the members 24, to which the reaction products formed at the growing of the GaN compound semiconductor crystal adhered, is removed from the semiconductor fabricating apparatus 10, and this constituent member 24 is subjected to an etching treatment by hot phosphoric acid. In this cleaning method for the semiconductor manufacturing apparatus, the constituent members 24, to which the reaction products adhered, are removed from the semiconductor manufacturing apparatus 10, and this constituent member 24 is subjected to the etching treatment by hot phosphoric acid, so that the reaction products can be removed by the etching, even if the constituent member 24 is not heated to a high temperature during the operation of the semiconductor manufacturing apparatus 10.
COPYRIGHT: (C)2004,JPO

38. 发明专利

JP2014086665A Group-iii nitride donor composite substrate and manufacturing method thereof, and group-iii nitride composite substrate and manufacturing method thereof 审中-公开
标题翻译：第III族硝基复合材料基板及其制造方法及其III族氮化物复合基板及其制造方法
公开(公告)号：JP2014086665A
公开(公告)日：2014-05-12
申请号：JP2012236652
申请日：2012-10-26
申请人： Sumitomo Electric Ind Ltd , 住友電気工業株式会社
发明人： UEMATSU KOJI , YANAGISAWA TAKUYA , YAMAMOTO YOSHIYUKI
IPC分类号： H01L21/02 , H01L21/20 , H01L27/12
摘要： PROBLEM TO BE SOLVED: To provide a group-III nitride donor composite substrate of which the warpage is reduced and variation in surface azimuth on a principal surface of a group-III nitride semiconductor layer is reduced, and a manufacturing method thereof.SOLUTION: The manufacturing method of the group-III nitride donor composite substrate includes: flattening a principal surface of a group-III nitride film 20 on an A1-st laminate sheet A1 growing the group-III nitride film 20 on a base substrate 10 while keeping the A1-st laminate sheet A1 flat by affixing the A1-st laminate sheet A1 to an A1-st holder 31; forming an A3-rd laminate sheet A3 by removing the base substrate 10 from an A2-nd laminate sheet A2 resulting from affixing the group-III nitride film 20 of the A1-st laminate sheet A1 and an A1-st temporary support substrate 41 with an A1-st temporary bind film 51 interposed therebetween; and forming a first group-III nitride donor composite substrate D1 which is kept flat by affixing the A1-st temporary support substrate 41 and the group-III nitride film 20 with the A1-st temporary bind film 51 interposed therebetween.
摘要翻译：要解决的问题：提供降低III族氮化物半导体层的主表面的翘曲减小和表面方位角的变化的III族氮化物供体复合基板及其制造方法。 III族氮化物给体复合衬底的制造方法包括：在保持A1的基底基板10上生长III族氮化物膜20的A1层叠片材A1上的III族氮化物膜20的主面平坦化通过将A1层叠片材A1固定在A1-st保持架31上而平坦化; 通过从A1层叠片材A1和A1-st临时支撑基板41固定III族氮化物膜20而将A2基层基板10从基底基板10上除去而形成A3层叠片材A3，夹在其间的A1-st临时粘合膜51; 并且通过将A1-st临时支撑基板41和III族氮化物膜20与A1-st临时结合膜51固定在一起而形成保持平坦的第一III族氮化物给体复合基板D1。

39. 发明专利

JP2014001138A GaN SINGLE CRYSTAL SUBSTRATE AND METHOD OF MANUFACTURING THE SAME, AND GaN-BASED SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译： GaN单晶衬底及其制造方法和GaN基半导体器件及其制造方法
公开(公告)号：JP2014001138A
公开(公告)日：2014-01-09
申请号：JP2013198602
申请日：2013-09-25
申请人： Sumitomo Electric Ind Ltd , 住友電気工業株式会社
发明人： FUJIWARA SHINSUKE , UEMATSU KOJI , OSADA HIDEKI , NAKAHATA SEIJI
IPC分类号： C30B29/38 , H01L21/205
摘要： PROBLEM TO BE SOLVED: To provide a GaN single crystal substrate which has a large diameter and in which surface orientation of a principal surface has a value other than (0001) and (000-1) and distribution of carrier concentration within the principal surface is substantially uniform, and a method of manufacturing the substrate.SOLUTION: In the GaN single crystal substrate 20p, an area of a principal surface 20pm is 10 cmor more, surface orientation of the principal surface 20pm is inclined by 65° or more and 85° or less to a (0001) surface or a (000-1) surface 20c, and distribution of carrier concentration within the principal surface 20pm is substantially uniform, that is, dispersion of carrier concentration to average carrier concentration within the principal surface 20pm is within ±50%, for example.
摘要翻译：要解决的问题：为了提供一种具有大直径并且主表面的表面取向具有除（0001）和（000-1）以外的值并且主表面内的载流子浓度分布的GaN单晶基板是基本均匀的方法以及制造基板的方法。解决方案：在GaN单晶基板20p中，主表面20μm的面积为10cm以上，主表面20μm的表面取向倾斜65°以上85° 或更小的（0001）表面或（000-1）表面20c，并且主表面20pm内的载流子浓度的分布基本上是均匀的，即载体浓度在主表面内的平均载流子浓度的分散在20pm内 ±50％。

40. 发明专利

JP2014001137A GaN SINGLE CRYSTAL SUBSTRATE AND METHOD OF MANUFACTURING THE SAME, AND GaN-BASED SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译： GaN单晶衬底及其制造方法和GaN基半导体器件及其制造方法
公开(公告)号：JP2014001137A
公开(公告)日：2014-01-09
申请号：JP2013198583
申请日：2013-09-25
申请人： Sumitomo Electric Ind Ltd , 住友電気工業株式会社
发明人： FUJIWARA SHINSUKE , UEMATSU KOJI , OSADA HIDEKI , NAKAHATA SEIJI
IPC分类号： C30B29/38 , C30B25/20 , H01L21/205
摘要： PROBLEM TO BE SOLVED: To provide a GaN single crystal substrate which has a large diameter and in which surface orientation of a principal surface has a value other than (0001) and (000-1) and dislocation density within the principal surface is substantially uniform, and a method of manufacturing the substrate.SOLUTION: In the GaN single crystal substrate 20p, an area of a principal surface 20pm is 10 cmor more, surface orientation of the principal surface 20pm is inclined by 65° or more and 85° or less to a (0001) surface or a (000-1) surface 20c, and distribution of dislocation density within the principal surface 20pm is substantially uniform, that is, dispersion of dislocation density to average dislocation density within the principal surface 20pm is within ±100%, for example.
摘要翻译：要解决的问题：为了提供具有大直径并且主表面的表面取向具有不同于（0001）和（000-1）以外的值的GaN单晶衬底，并且主表面内的位错密度基本均匀以及制造基板的方法。解决方案：在GaN单晶衬底20p中，主表面20μm的面积为10cm以上，主表面20μm的表面取向倾斜65°以上85°以下到（0001）表面或（000-1）表面20c，并且主表面20pm内的位错密度分布基本上是均匀的，即位错密度在主表面20pm内的平均位错密度的分散在±100 ％，例如。

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