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31. 发明专利

JP2006302116A Authentication system, authentication server, terminal device, authentication method and program 审中-公开
标题翻译：认证系统，认证服务器，终端设备，认证方法和程序
公开(公告)号：JP2006302116A
公开(公告)日：2006-11-02
申请号：JP2005125286
申请日：2005-04-22
申请人： Nec Corp , 日本電気株式会社
发明人： SUZUKI FUMIO
IPC分类号： G06F21/20 , H04L9/32
摘要： PROBLEM TO BE SOLVED: To provide an authentication system, an authentication server, a terminal device, an authentication method and a program, preventing that a third party peeps at a password to illegally know the password when directly inputting the password, in authentication using the password or the like. SOLUTION: In this authentication system, the authentication server 20 generates random data and sends them to the terminal device 10, the terminal device 10 sends arithmetic data resulting from arithmetic processing based on arithmetic key information to the random data, and the password or the like, to the authentication server 10, and the authentication server 10 decides whether data extracted on the basis of the arithmetic data, the random data, and the arithmetic key information accord with the password stored in a database 21 or not. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了提供认证系统，认证服务器，终端设备，认证方法和程序，防止在直接输入密码时第三方窥视密码以非法地知道密码，使用密码等进行身份验证。解决方案：在该认证系统中，认证服务器20生成随机数据并将其发送到终端装置10，终端装置10将根据算术关键信息的算术处理得到的算术数据发送到随机数据，密码认证服务器10判断是否根据存储在数据库21中的算术数据，随机数据和算术密钥信息提取的数据是否一致。版权所有（C）2007，JPO＆INPIT

32. 发明专利

JPH01256806A DIFFERENTIAL AMPLIFIER CIRCUIT 失效
公开(公告)号：JPH01256806A
公开(公告)日：1989-10-13
申请号：JP8561288
申请日：1988-04-07
申请人： NEC CORP , NIPPON ELECTRIC ENG
发明人： SUZUKI FUMIO , KURIOKA KAZUTATSU
IPC分类号： H03F3/45
摘要： PURPOSE:To prevent an input DC offset voltage from appearing at the output while DC voltage gain is eliminated by connecting emitters of two transistors(TRs) being component of a differential amplifier circuit by a capacitor and providing a constant current source corresponding to each of the two TRs. CONSTITUTION:A capacitor 7 is used for a constant current source and the capacitor 7 couples of both the TRs 1, 2 in terms of AC. Then constant current sources 10, 11 are provided respectively to the TRs 1, 2 individually. Through the constitution above, the voltage gain G is expressed in the following equation; G=R/{(kT/qI+1/(4pifC)}, where R is the resistance of resistors 5, 6, C is a capacitance of the capacitor 7, I is the current of the current sources 10, 11, (k) is the Boltzmann's constant, Q is the electric charge of an electron, T is the absolute temperature and (f) is a frequency. Then the gain G is illustrated as a curve shown in the frequency characteristic 2 and the G approaches zero as the frequency (f) is close to zero and then the gain is G=0 at the DC. In this case, the input DC offset voltage is not sent to the output.

33. 发明专利

JPH01117407A AMPLITUDE LIMIT CIRCUIT 失效
公开(公告)号：JPH01117407A
公开(公告)日：1989-05-10
申请号：JP27520587
申请日：1987-10-29
申请人： NEC CORP , NIPPON ELECTRIC ENG
发明人： IKEUCHI TAKAO , SUZUKI FUMIO
IPC分类号： H03G3/30
摘要： PURPOSE:To generate a limit waveform with less waveform distortion and without the effect of a DA offset eliminated by varying the impedance of a passing path of a forward current of a diode in response to a difference between the highest value and the minimum value of the waveform of an input signal. CONSTITUTION:The maximum value VH of the peak of the input signal via an input terminal 6 and the minimum value VL of the bottom are detected by a peak detection circuit 1, and when the (VH-VL) exceeds the set limit amplitude VR by a current control circuit 2, a current control circuit 2 is conductive, and when the relation of VR

34. 发明专利

JPS63256872A TWO-POINT MEASUREMENT TYPE CONTINUITY TESTER 失效
公开(公告)号：JPS63256872A
公开(公告)日：1988-10-24
申请号：JP9235787
申请日：1987-04-15
申请人： NEC CORP
发明人： SUZUKI FUMIO
IPC分类号： G01R31/02
摘要： PURPOSE:To facilitate testing operation by providing a continuity detector for inspecting the continuity of a pattern or wiring and a voltage source for continuity detection and further providing a voltage power source for bridge detection and an ammeter for bridge detection. CONSTITUTION:When a continuity tester inspects the continuity of a package 1 to be tested, observation pins 3 are stood at both ends of the pattern or wiring 2 to be inspected. Then the continuity detection voltage source 6 is connected to the observation pins 3 through a current limiting resistor 5 and the continuity detector 4 checks its continuity. For bridge detection, on the other hand, the constant voltage source 8 for bridge detection applies a constant voltage between the power source +V of the package 1 to be tested and an earth E. Then current variation due to bridge trouble is read on the ammeter 7 for bridge detection. If trouble is caused by a faulty bridge 10, the sum of a loop current 11 for continuity detection and a loop current 12 for bridge detection is observed on the ammeter 7 and the bridge trouble is detected from the current at this time.

35. 发明专利

JPS63189009A FULL-WAVE RECTIFICATION CIRCUIT 失效
公开(公告)号：JPS63189009A
公开(公告)日：1988-08-04
申请号：JP2134487
申请日：1987-01-31
申请人： NEC CORP , NIPPON ELECTRIC ENG
发明人： OKAMURA TOSHIYUKI , SUZUKI FUMIO
IPC分类号： H03K5/00 , H04L7/02 , H04L7/027
摘要： PURPOSE:To reduce the unevenness of amplitude, by increasing/decreasing a threshold value symmetrically to a bias center by the voltage change of the adjusting terminal of a current source. CONSTITUTION:An input signal, after a DC bias being added on by a bias circuit 6, is inputted to the base of a transistor Q1. The output signal of the transistor Q1 is inputted to the input terminal of positive phase of a first operational amplifier 1, and is inputted to the input terminal of negative phase of a second operational amplifier 2. And the output of positive phase of the first operational amplifier and the output of negative phase of the second operational amplifier are inputted to an OR circuit 8, and a full-wave rectified output can be obtained at an output terminal 5. The adjustment of the threshold value can be performed by changing the voltage of the adjusting terminal 7 and increasing/decreasing the current values of the current sources 11 and 12.

36. 发明专利

JPH0541654A PULSE OUTPUT CIRCUIT 失效
公开(公告)号：JPH0541654A
公开(公告)日：1993-02-19
申请号：JP21809691
申请日：1991-08-05
申请人： NEC CORP , NIPPON ELECTRIC ENG
发明人： TAMURA TAKAFUMI , HATAKEYAMA MAKOTO , SUZUKI FUMIO
IPC分类号： H03K17/66 , H03K19/013 , H03K19/086
摘要： PURPOSE:To obtain the pulse output circuit increasing the current only with an input signal, especially, at the trailing edge of a signal voltage waveform and not increasing the current with non-signal and at the leading edge of a signal voltage waveform, that is, with less current consumption. CONSTITUTION:The base of a transistor 1 is connected to an input terminal 8, a collector is connected to a power supply 11, an emitter is connected to an output terminal 10 and the collector of a transistor 2, and the base of the transistor 2 is connected to an input terminal 9 through a capacitor 7 and also connected to the collector of a transistor 3 through a resistor 4. The emitter of the transistor 2 is connected to the earth, further the collector of the transistor 3 is connected to the power supply 11 through a resistor 6, and the emitter of the transistor 3 is connected to the earth.

37. 发明专利

JPH02301209A AUTOMATIC GAIN CONTROL AMPLIFIER 失效
公开(公告)号：JPH02301209A
公开(公告)日：1990-12-13
申请号：JP12065789
申请日：1989-05-15
申请人： NEC CORP , NIPPON ELECTRIC ENG
发明人： SUZUKI FUMIO , SENBA TAKASHI
IPC分类号： H03G3/30
摘要： PURPOSE:To expand an input dynamic range by connecting a resistor between an input terminal and an amplifier circuit, connecting an output section of a gain control amplifier circuit to a base of a transistor(TR) via a hysteresis circuit and connecting its collector to an input section of the amplifier circuit. CONSTITUTION:An input terminal 1 connects to an input section of an amplifier circuit 3 via a resistor 2 and an output of a gain control amplifier circuit 6 connects to a base of a TR 8 via a hysteresis circuit 7 and its collector connects to the input section of the amplifier circuit 3. When the input voltage of the hysteresis circuit 7 is low, its output is a low voltage and the TR 8 is at a high impedance, then an input signal is not attenuated via the resistor 2. When the input voltage of the hysteresis circuit 7 is high, the TR 8 goes to a low impedance and the input signal is attenuated. That is, the input signal of the amplifier circuit 3 is once attenuated before the signal is larger than the input dynamic range VDA1 of the amplifier circuit 3. Thus, a wide dynamic range is obtained.

38. 发明专利

JPH02301207A AMPLIFIER 失效
公开(公告)号：JPH02301207A
公开(公告)日：1990-12-13
申请号：JP12077389
申请日：1989-05-15
申请人： NEC CORP , NIPPON ELECTRIC ENG
发明人： TAKEUCHI HIROSHI , SUZUKI FUMIO
IPC分类号： H03G3/10
摘要： PURPOSE:To change a voltage amplification factor of an output terminal with respect to an input terminal freely by connecting an emitter of a transistor(TR) to an adjustment terminal via a capacitor and varying the signal amplitude given to the adjustment terminal. CONSTITUTION:A TR 4 whose base connects to an input terminal 1 and whose collector connects to an output terminal 3, a load 5 connected between a collector of the TR 4 and a high level power terminal, a resistor 6 connected between the emitter of the TR 4 and a low level power terminal and a capacitor 7 whose one terminal connects to the emitter of the TR 4 and whose other terminal connects to the adjustment terminal 2 are provided to the amplifier. Through the constitution above, the base-emitter voltage of the TR is adjusted by supplying an adjustment signal in phase or opposite phase with the input signal and with an optional amplitude to the adjustment terminal 2. Thus, the voltage amplification factor of the amplifier is adjusted.

39. 发明专利

JPH02272811A TRANSFORMER IMPEDANCE TYPE AMPLIFIER 失效
公开(公告)号：JPH02272811A
公开(公告)日：1990-11-07
申请号：JP9334289
申请日：1989-04-13
申请人： NEC CORP , NIPPON ELECTRIC ENG
发明人： FUJIMURA HIROSHI , SUZUKI FUMIO
IPC分类号： H03F1/42
摘要： PURPOSE:To adjust phase delay in a feedback loop and to stabilize a frequency characteristic by using a variable impedance element as an impedance element in an input stage. CONSTITUTION:A variable impedance circuit consisting of a resistance 11, a variable resistance 12 and a capacitor 13 is connected between the collector of a transistor 1 in the input means and power source 3. When the resistant value of the variable resistance 12 is changed, a current value flowing in the transistor 1 changes, and the input impedance of the transistor 1 changes. The phase delay of a feedback amount by a resistance 9 and the transistor 1 changes by the change of the input impedance. Thus, the resistant value of the variable resistance 12 is adjusted in accordance with a frequency band to be used and phase delay in the feedback loop is adjusted, whereby the frequency characteristic can be stabilized.

40. 发明专利

JPH01103008A PEAK DETECTING CIRCUIT 失效
公开(公告)号：JPH01103008A
公开(公告)日：1989-04-20
申请号：JP26011587
申请日：1987-10-15
申请人： NEC CORP , NIPPON ELECTRIC ENG
发明人： OKAMURA TOSHIYUKI , HOTSUTA NORIYA , SUZUKI FUMIO
IPC分类号： H03F3/343 , H03F3/34
摘要： PURPOSE:To detect a peak of a low potential side of a signal by using two pieces of amplifies and one piece of capacitor so that a voltage of an output terminal becomes a voltage which has followed a level variation of the low potential side of an input signal. CONSTITUTION:When the lowest potential of an AC signal which has been inputted to an input terminal 3 is lower than the potential of an output terminal 4, it is amplified by an amplifier 1, a capacitor 5 is charged with an output of the amplifier 1, and the input voltage of an amplifier 2 rises. When the forward turn output of the amplifier 2 drops and becomes equal to the lowest potential of the input signal, the voltage to be charged of the capacitor 5 is saturated and becomes a prescribed value, and the voltage of the forward turn output stops its drop. When the lowest potential of the AC signal of the terminal 3 is higher than the voltage of the terminal 4, the voltage of the forward turn output of the amplifier 1 decreases, the voltage to be charged of the capacitor 5 decreases, and the voltage of the terminal 4 rises. Therefore, the voltage of the terminal 4 becomes a voltage which has followed a level variation of the low potential side of the input signal. In such a way, the peak of the low potential side of the signal is detected.

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