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31. 发明专利

JP2001244304A SUBSTRATE FOR MOUNTING SEMICONDUCTOR AND MANUFACTURING METHOD THEREFOR 失效
公开(公告)号：JP2001244304A
公开(公告)日：2001-09-07
申请号：JP2000054419
申请日：2000-02-25
申请人： HITACHI CHEMICAL CO LTD
发明人： INOUE FUMIO , YAMAGUCHI REIKO , TSUBOMATSU YOSHIAKI , OHATA HIROTO , AWANO YASUHIKO , IWASAKI YORIO
IPC分类号： H05K1/03 , H01L21/52 , H01L21/60 , H01L23/14
摘要： PROBLEM TO BE SOLVED: To provide a substrate for mounting a semiconductor suitable for a small semiconductor package which is superior in miniaturization, densification, and reliability by preventing the package from cracking, and to provide an efficient method for manufacturing the substrate for mounting the semiconductor. SOLUTION: A substrate for mounting a semiconductor consisting of a flexible isolation base material and a wiring conductor, is characterized by that the base material has low moisture permeability.

32. 发明专利

JP2000315851A METHOD FOR MANUFACTURING WIRING BOARD WITH BUMP AND WIRING BOARD WITH BUMP 失效
公开(公告)号：JP2000315851A
公开(公告)日：2000-11-14
申请号：JP12454999
申请日：1999-04-30
申请人： HITACHI CHEMICAL CO LTD
发明人： ENOMOTO TETSUYA , OHATA HIROTO , NAKAMURA HIDEHIRO , TSUBOMATSU YOSHIAKI
IPC分类号： H01L21/60 , H05K1/02 , H05K3/34
摘要： PROBLEM TO BE SOLVED: To prevent effect of variations in the height of a device electrode by thinning one surface of an insulation substrate, forming a metal layer on the other surface of the thinned surface, and then forming a bump containing specific pattern wiring by half etching. SOLUTION: Electrolytic or rolling copper foil is formed as a metal layer 1 on one surface of a polyimide layer 2 that is an insulation substrate, one surface of the substrate is thinned, and then exposure and development are made for forming a resist 3. After that, by using an etching liquid with a sulfuric acid and hydrogen peroxide as main constituents, the metal layer 1 is half- etched, the resist 3 is released by a potassium hydroxide solution, and a bump 4 is formed on the metal layer 1. Then, by using a photo mask for wiring, exposure and development are made for forming a resist 5 and then the bump 4 is included, and then the resist 5 is released by the potassium hydroxide solution, thus forming wiring 6 with a given pattern including the bump 4.

33. 发明专利

JP2000311968A CHIP-SUPPORT SUBSTRATE FOR SEMICONDUCTOR PACKAGE 失效
公开(公告)号：JP2000311968A
公开(公告)日：2000-11-07
申请号：JP2000115857
申请日：2000-04-12
申请人： SHARP KK , HITACHI CHEMICAL CO LTD
发明人： SODA YOSHIKI , MIYATA KOJI , YAMAZAKI AKIO , INOUE FUMIO , TSUBOMATSU YOSHIAKI , NAKAMURA HIDEHIRO , AWANO YASUHIKO , ICHIMURA SHIGEKI , YUSA MASAMI , IWASAKI YORIO
IPC分类号： H01L23/28 , H01L21/52 , H01L23/12
摘要： PROBLEM TO BE SOLVED: To prevent a package crack and to manufacturing a reliable compact semiconductor package by forming at least one metal pattern for maintaining the flat plate property of an insulation, film-shaped adhesive material being formed later at a part where a semiconductor chip is mounted. SOLUTION: A support substrate is prepared, where a plurality of sets of inner connection parts, development wiring, and outer connection parts are formed by punching into a frame shape using a punching mold. Then, after a die bond film 8 is tentatively glued to the semiconductor chip-mounting region of the support substrate, a semiconductor chip 9 is glued to the specific position of the support substrate. Further, a semiconductor chip electrode and an inner connection part 5 are electrically connected by bonding a gold wire 10, which is loaded into a transfer mold die for sealing each by an epoxy resin 11 for sealing semiconductors. After that, a solder ball 12 is arranged at the outer connection part for melting before finally separating into each package by punching.

34. 发明专利

JPH11111765A MANUFACTURE OF CHIP-SUPPORTING SUBSTRATE FOR SEMICONDUCTOR PACKAGE 失效
公开(公告)号：JPH11111765A
公开(公告)日：1999-04-23
申请号：JP26474997
申请日：1997-09-30
申请人： HITACHI CHEMICAL CO LTD
发明人： AWANO YASUHIKO , TSUBOMATSU YOSHIAKI , NAKAMURA HIDEHIRO , INOUE FUMIO
IPC分类号： H01L21/60 , H01L23/12
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a chip-supporting substrate for a semiconductor package by which a small-sized and highly integrated semiconductor package which exhibits a high reliability can be manufactured by preventing cracks on the package. SOLUTION: A film of insulating adhesive is formed on points for mounting semiconductor chips of an insulating supporting substrate, which is provided with multiple groups of wiring having semiconductor chip inner connecting parts, outer connecting parts and vent holes. The film of insulating adhesive is provided with holes, which are opposed to the vent holes and are not overlaid on the points for mounting semiconductor chips. The film is supplied in the form of a tape, perforated with holes, cut into areas corresponding to multiple groups of wiring, and stuck to the points for mounting semiconductor chips. A chip-supporting substrate is manufactured as described above.

35. 发明专利

JPH1177721A PRODUCTION OF WIRING BOARD 失效
公开(公告)号：JPH1177721A
公开(公告)日：1999-03-23
申请号：JP20439097
申请日：1997-07-30
申请人： HITACHI CHEMICAL CO LTD
发明人： IWASAKI YORIO , SHIMIZU AKIRA , YAMAKAWA MASAE , TSUBOMATSU YOSHIAKI , OTSUKA OSAMU
IPC分类号： B29C43/18 , B29C43/32 , B29K105/06 , B29L31/34 , H01L23/12 , H05K3/00
摘要： PROBLEM TO BE SOLVED: To suppress the shift between a copper foil and an adhesive by making holes in a flexible base material coated with a B-stage adhesive and superposing a material having dummy holes therein and the copper foil one upon another so that the adhesive comes into contact with the copper foil to press and heat them through a cushioning material. SOLUTION: For example, a polyimide film is used as a flexible base material 2 and a polyimide type adhesive is applied to the surface thereof as an adhesive and heated and dried, for example, at 180 deg.C for 130 min to be brought to a B-stage state and holes 11 for solder ball bonding are made in a wiring area and, for example, holes 11 with a diameter of 1.5 mm are made outside the wiring area. After four Teflon films are arranged on a stainless steel plate being a mirror plate as cushioning materials and the perforated flexible base material 2 is superposed on them and copper foil is further superposed thereon and, further, a stainless steel plate is superposed thereon as a mirror plate and all of them are pressed and heated to be integrally laminated.

36. 发明专利

JPH09237852A CHIP SUPPORT SUBSTRATE FOR SEMICONDUCTOR PACKAGE 失效
公开(公告)号：JPH09237852A
公开(公告)日：1997-09-09
申请号：JP4182796
申请日：1996-02-28
申请人： HITACHI CHEMICAL CO LTD
发明人： INOUE FUMIO , TSUBOMATSU YOSHIAKI , YAMAZAKI AKIO , OHATA HIROTO , TAKEDA SHINJI , IWASAKI YORIO
IPC分类号： C09J179/08 , H01L23/12
摘要： PROBLEM TO BE SOLVED: To provide a chip support substrate used for manufacturing a small semiconductor package. SOLUTION: A hole is bored in a part of a polyimide film which serves as an outer connecting part 3. After a copper foil is bonded, an expansion wiring 2 is provided extending to an inner connecting part and the outer connecting part 3. The polyimide film provided with a copper foil is blanked into a frame by a blanking die, and a support substrate where a set or more of inner connecting parts, expansion wirings 2, and outer connecting parts are provided is prepared (a). A die bond film 4 is tentatively bonded to the semiconductor chip mounting region of the support substrate (b). A semiconductor chip 6 is bonded to the support substrate at a prescribed position by the use of the tentatively bonded die bond film 4. A gold wire is electrically connected between the electrode of the semiconductor chip 6 and the inner connecting part by bonding (c). The support substrate mounted with semiconductor chip 6 is loaded in a transfer molding die and sealed up with sealing epoxy resin 7 (d). A solder ball 8 is disposed on the outer connecting part 3 and melted (e), and lastly the support substrate mounted with the semiconductor chips 6 is separated into unit packages by a punch. By this setup, a semiconductor package small in size, free from package cracking, and excellent in reliability can be manufactured.

37. 发明专利

JPH09148475A SEMICONDUCTOR PACKAGE 失效
公开(公告)号：JPH09148475A
公开(公告)日：1997-06-06
申请号：JP30900195
申请日：1995-11-28
申请人： HITACHI CHEMICAL CO LTD
发明人： TSUBOMATSU YOSHIAKI , INOUE FUMIO , YAMAZAKI AKIO , OHATA HIROTO , ICHIMURA SHIGEKI , TAGUCHI NORIYUKI
IPC分类号： H01L23/12
摘要： PROBLEM TO BE SOLVED: To provide a package which can reduce the occurrence of insufficient electrical connection caused by the swelling or separation of solder in a solder reflowing process. SOLUTION: A semiconductor package is composed of a semiconductor chip mounting substrate in which a wiring pattern 2 is formed on one surface of an insulating base substrate 1 and outside connecting terminals 6 are formed on the other surface of the substrate 1, a semiconductor chip 4 stuck to the semiconductor chip mounting substrate with an adhesive 3, and a sealing resin 7 which seals the chip 4. At the time of forming the package, the insulating base substrate 1 and adhesive 3 are removed in advance from the central area of the package and a recessed section 8 which reaches the chip 4 is formed through the substrate 1 and adhesive 3.

38. 发明专利

JP2571782B2 失效
公开(公告)号：JP2571782B2
公开(公告)日：1997-01-16
申请号：JP7813487
申请日：1987-03-31
申请人： HITACHI CHEMICAL CO LTD
发明人： TSUBOMATSU YOSHIAKI , FUKUTOMI NAOKI , KIDA AKINARI , YASUOKA TAKUYA
IPC分类号： H05K3/46

39. 发明专利

JP2536095B2 失效
公开(公告)号：JP2536095B2
公开(公告)日：1996-09-18
申请号：JP26491988
申请日：1988-10-20
申请人： HITACHI CHEMICAL CO LTD
发明人： TSUBOMATSU YOSHIAKI , FUKUTOMI NAOKI , TSURU YOSHUKI , TAKAHASHI YOSHIHIRO
IPC分类号： H05K3/46 , H05K3/44

40. 发明专利

JPH07302665A MANUFACTURE OF CONNECTING MEMBER 失效
公开(公告)号：JPH07302665A
公开(公告)日：1995-11-14
申请号：JP9634194
申请日：1994-05-10
申请人： HITACHI CHEMICAL CO LTD
发明人： TSUBOMATSU YOSHIAKI , FUKUTOMI NAOKI , YAMAZAKI AKIO , OHATA HIROTO
IPC分类号： H01R43/00
摘要： PURPOSE:To remarkably enhance machining accuracy of a connection portion and provide a method for stably manufacturing the same by forming a first insulative layer on a temporary board having conductivity, forming a second insulative layer on the board, and plating the temporary board so as to provide an electrode. CONSTITUTION:A dry film resist 2 is laminated at a roughened surface of an electrolyte copper foil 1. A dry film solder resist 3 is laminated on the dry film resist 2, thus forming recesses 4 reaching the copper foil by exposure and development. Subsequently, a metal connection portion 5 projected from the surface of the dry film solder resist 2 is formed from a potassium cyanoaurate bath by an electric plating method. Thereafter, the copper foil 1 is chemically etched with a dupric chloride solution, followed by peeling the dry film resist 2 with a 3.0wt.% potassium hydroxide solution, thereby obtaining an insulating sheet having the metal connection portion.

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