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    • 31. 发明专利
    • Surface-mount air-core coil
    • 表面安装空心线圈
    • JP2010278348A
    • 2010-12-09
    • JP2009131018
    • 2009-05-29
    • Alps Electric Co Ltdアルプス電気株式会社
    • SAKUMA YUJIYAMADA TOSHIYUKIFURUTA TOSHIROAOKI KAZUHARU
    • H01F27/06H01F17/02H01F27/29
    • H01F27/292H01F17/02
    • PROBLEM TO BE SOLVED: To provide a surface-mount air-core coil that is mounted by an automatic mounter with high position precision and superior absorbent by self-alignment effects, which is high in mechanical strength in a mounting state.
      SOLUTION: An air-core coil 1 is configured of a cylindrical coil winding part 2 molded in such a shape that the upper face side is flat, and that the lower face side is curved and a pair of terminals 3 continuously formed at both the ends of the coil winding part 2. The coil winding part 2 is formed by winding a conductive wire 1b covered with an insulating coating 1a like a spiral, and the conductive wire 1b extended from both the ends of the coil winding part 2 is bent at an almost right angle, and extended in a horizontal direction so that a terminal 3 can be formed. This air-core coil 1 is face-mounted on a circuit board 10 by soldering each terminal 3 to a corresponding electrode land 11 in such a state that a low face side curved section 2b of the coil winding part 2 is loaded on the circuit board 10.
      COPYRIGHT: (C)2011,JPO&INPIT
    • 要解决的问题:提供一种表面安装的空芯线圈,其由具有高位置精度的自动安装机安装,并且在安装状态下机械强度高的自对准效应具有优异的吸收性。 解决方案:空心线圈1由圆筒形线圈绕组部分2构成,该圆柱形线圈绕组部分2以上表面侧为平坦的形状,并且下表面侧弯曲,并且一对端子3连续地形成在 线圈绕组部分2是通过缠绕一层覆盖有如螺旋形的绝缘涂层1a的导线1b而形成的,并且从线圈绕组部分2的两端伸出的导线1b是 弯曲成几乎直角,并且在水平方向上延伸,从而可以形成端子3。 通过将线圈绕组部2的低面侧弯曲部2b装载在电路基板上的状态,将各端子3焊接到对应的电极焊盘11,将该空芯线圈1面对安装在电路基板10上 10.版权所有(C)2011,JPO&INPIT
    • 32. 发明专利
    • Step attenuator
    • 踏步器
    • JP2010192943A
    • 2010-09-02
    • JP2009031969
    • 2009-02-13
    • Alps Electric Co Ltdアルプス電気株式会社
    • AOKI KAZUHARU
    • H03H7/25
    • PROBLEM TO BE SOLVED: To simplify a circuit configuration by eliminating switching elements before and behind an attenuation circuit, and to prevent the occurrence of a momentary break during the switching of the attenuation circuit.
      SOLUTION: A plurality of attenuation circuits 5A to 5D are connected in parallel between input/output terminals Ti and To of a step attenuator, and PIN diodes 6A to 6D are connected between ground ends of the respective attenuation circuits 5A to 5D and the ground, and the PIN diodes 6A to 6D are complementarily turned on or off to change necessary attenuation amounts in steps. Furthermore, one necessary attenuation amount is set by two attenuation circuits which are partially combined in common with two attenuation circuits for setting an attenuation amount of an adjacent step; and attenuation circuits which become unnecessary are opened after all of the attenuation circuits corresponding to the attenuation amount of the adjacent step are short-circuited during a change to the attenuation amount of the adjacent step.
      COPYRIGHT: (C)2010,JPO&INPIT
    • 要解决的问题:为了简化通过消除衰减电路之前和之后的开关元件的电路配置,并且防止在衰减电路的切换期间发生瞬时中断。 解决方案:多个衰减电路5A至5D并联连接在阶梯衰减器的输入/输出端子Ti和To之间,并且PIN二极管6A至6D连接在各个衰减电路5A至5D的接地端和 接地和PIN二极管6A至6D互补地导通或关断以逐步改变必要的衰减量。 此外,一个必要的衰减量由两个衰减电路设置,两个衰减电路与两个衰减电路共同部分组合,用于设置相邻步长的衰减量; 在与相邻步骤的衰减量变化相对应的与相邻步骤的衰减量相对应的所有衰减电路都短路之后,打开变得不必要的衰减电路。 版权所有(C)2010,JPO&INPIT
    • 33. 发明专利
    • Electronic circuit module
    • 电子电路模块
    • JP2008166525A
    • 2008-07-17
    • JP2006355022
    • 2006-12-28
    • Alps Electric Co Ltdアルプス電気株式会社
    • AOKI KAZUHARUSHIBAYAMA TAKAMITSU
    • H05K1/14H01L23/12H01L25/00
    • H01L2224/16225H01L2924/19105
    • PROBLEM TO BE SOLVED: To provide an electronic circuit module that diversifies layout of a multilayer wiring board without wasting an arrangement space even if chip components and semiconductor devices are mounted inside a cavity part. SOLUTION: The electronic circuit module 1 is composed by clamping an insulating holding plate 4 for holding chip components 5 by two multilayer wiring boards 2, 3. The holding plate 4 has each chip-component gripping hole 7 for gripping the side faces of the chip component 5 while exposing each electrode 5a of the chip component by being inserted with the chip component 5. The two multilayer wiring boards 2, 3 are overlapped so as to form a cavity part 10 for housing the holding plate 4. The holding plate 4 is supported by support parts 2c, 3c inside the cavity part. The multilayer wiring boards 2, 3 and each chip component 5 are electrically connected to each other via each contact 12 provided in the cavity part 10. COPYRIGHT: (C)2008,JPO&INPIT
    • 要解决的问题:提供一种电子电路模块,其即使将芯片部件和半导体器件安装在空腔部内,也能够在不浪费布置空间的情况下使多层布线板的布局多样化。 解决方案:电子电路模块1通过夹持用于通过两个多层布线板2,3保持芯片部件5的绝缘保持板4构成。保持板4具有用于夹持侧面的每个芯片部件夹紧孔7 同时通过插入芯片部件5而将芯片部件的每个电极5a暴露在一起。两个多层布线板2,3重叠以形成用于容纳保持板4的空腔部分10.保持 板4由空腔部分内的支撑部分2c,3c支撑。 多层布线基板2,3以及各芯片部件5通过设置在空腔部10的各触头12彼此电连接。(C)2008,JPO&INPIT
    • 34. 发明专利
    • Laminated filter circuit
    • 层压滤波电路
    • JP2007336046A
    • 2007-12-27
    • JP2006163321
    • 2006-06-13
    • Alps Electric Co Ltdアルプス電気株式会社
    • AOKI KAZUHARU
    • H03H7/09H01G4/40
    • PROBLEM TO BE SOLVED: To provide a laminated filter circuit from which a greater attenuation gradient can be obtained.
      SOLUTION: The laminated filter circuit 1A includes a resonance inductance 2A, DC block capacitors 6A, 6C, resonance capacitors 6B, 6D, and a trap capacitor 6F. In the resonance capacitor 6B, the input terminal side 3Ah of a first conductor line 3A and the ground side 4Ag of a second conductor line 4A are close to each other and the ground side 3Ag of the first conductor line 3A and the output terminal side 4Ah of the second conductor line 4A are close to each other. The trap capacitor 6F is obtained by connecting an input terminal 7 and an output terminal 8 in series with each other. Since an attenuation pole is formed at each of frequencies in a low frequency side attenuation band and a high frequency side attenuation band and around a pass band in this way, the attenuation gradient is increased.
      COPYRIGHT: (C)2008,JPO&INPIT
    • 要解决的问题:提供可以从其获得更大的衰减梯度的层叠滤波器电路。 解决方案:层叠滤波器电路1A包括谐振电感2A,直流块电容器6A,6C,谐振电容器6B,6D和陷波电容器6F。 在谐振电容器6B中,第一导线3A的输入端侧3Ah和第二导体线4A的接地侧4Ag彼此靠近,第一导体线3A的接地侧3Ag和输出端侧4Ah 的第二导体线4A彼此接近。 陷波电容器6F通过将输入端子7和输出端子8串联连接而获得。 由于在低频侧衰减频带和高频侧衰减频带以及通带周围的各频率处形成衰减极,所以衰减梯度增大。 版权所有(C)2008,JPO&INPIT
    • 35. 发明专利
    • Mutual inductance element, and balance/unbalance transducer
    • 互感元件,平衡/不平衡传感器
    • JP2007305861A
    • 2007-11-22
    • JP2006133975
    • 2006-05-12
    • Alps Electric Co Ltdアルプス電気株式会社
    • AOKI KAZUHARU
    • H01F17/00H01F19/06H01P5/10
    • PROBLEM TO BE SOLVED: To provide a mutual inductance element in which the coupling characteristics can be stabilized even if the arrangement position of the inductance element is shifted from a desired position. SOLUTION: In the mutual inductance element 1A, second opposite sides 22Aa and 22Ab and fourth opposite sides 24Aa and 24Ab of a second conductor line 4A are laminated on the first opposite sides 21Aa and 21Ab or the third opposite sides 23Aa and 23Ab without overlapping in the direction of lamination. The second opposite sides 22Aa and 22Ab and the fourth opposite sides 24Aa and 24Ab are arranged on the inside of the first opposite sides 21Aa and 21Ab and the outside of the third opposite sides 23Aa and 23Ab while being shifted, respectively. Even if a first dielectric plate 15A or a second dielectric plate 14A is compressed and thereby expanded or contracted in the in-plane direction, the coupling characteristics can be stabilized. COPYRIGHT: (C)2008,JPO&INPIT
    • 要解决的问题:为了提供一种互感元件,其中即使电感元件的布置位置从期望位置偏移,耦合特性也可以稳定。 解决方案:在互感元件1A中,第二导体线4A的第二相对侧22Aa和22Ab以及第二相对侧面24Aa和24Ab层叠在第一相对侧21Aa和21Ab或第三相对侧面23Aa和23Ab上,而没有 在层叠方向上重叠。 第二相对侧22Aa和22Ab以及第四相对侧面24Aa和24Ab分别布置在第一相对侧21Aa和21Ab的内侧以及第三相对侧面23Aa和23Ab的外侧。 即使第一电介质板15A或第二电介质板14A被压缩,从而在面内方向上膨胀或收缩,可以使耦合特性稳定。 版权所有(C)2008,JPO&INPIT
    • 36. 发明专利
    • Nonreciprocal circuit element
    • 非电路电路元件
    • JP2005277708A
    • 2005-10-06
    • JP2004087147
    • 2004-03-24
    • Alps Electric Co Ltdアルプス電気株式会社
    • AOKI KAZUHARU
    • H01P1/36H01P1/383
    • PROBLEM TO BE SOLVED: To provide a nonreciprocal circuit element with a low profile at low cost and having excellent assembling performance.
      SOLUTION: The nonreciprocal circuit element is provided with: a first yoke 1; a magnet 3 located to a lower side of an upper plate 1a; a second yoke 4 for configuring a magnetic closed circuit together with the first yoke 1; a ferrite flat plate member 8 arranged between a bottom plate 4a and the magnet 3; first, second, and third center conductors 10, 11, 12 formed on the ferrite member 8 and arranged in a way that parts of which are in crossing via a dielectric 9 in vertical directions; capacitors C1, C2, C3 connected to the center conductors 10, 11, 12 and formed on the ferrite member 8, and since the thin film or thick film capacitors C1, C2, C3 are formed on the upper face of the ferrite member 8, chip capacitors unlike prior arts are not required, the assembling man-hours can be decreased, the assembling performance can be improved, and the nonreciprocal circuit element can be formed at low cost.
      COPYRIGHT: (C)2006,JPO&NCIPI
    • 要解决的问题:以低成本提供具有低轮廓的非可逆电路元件并且具有优异的组装性能。 解决方案:非可逆电路元件设有:第一磁轭1; 位于上板1a的下侧的磁铁3; 用于与第一磁轭1一起配置磁闭合电路的第二磁轭4; 布置在底板4a和磁体3之间的铁氧体平板构件8; 第一,第二和第三中心导体10,11,12形成在铁氧体部件8上,并且被布置成使得它们的一部分通过电介质9在垂直方向上交叉; 连接到中心导体10,11,12并形成在铁氧体部件8上的电容器C1,C2,C3,并且由于薄膜或厚膜电容器C1,C2,C3形成在铁氧体部件8的上表面上, 不需要现有技术的片式电容器,可以减少组装工时,可以提高组装性能,并且可以以低成本形成不可逆电路元件。 版权所有(C)2006,JPO&NCIPI
    • 37. 发明专利
    • Thin film capacitor
    • 薄膜电容器
    • JP2005109410A
    • 2005-04-21
    • JP2003344473
    • 2003-10-02
    • Alps Electric Co Ltdアルプス電気株式会社
    • AOKI KAZUHARUYOSHISATO AKIYUKI
    • H01G4/33
    • PROBLEM TO BE SOLVED: To provide a thin film capacitor whose breakdown voltage between a lower electrode and an upper electrode is high and does not produce a short circuit therebetween.
      SOLUTION: The thin film capacitor includes a lower electrode 2 located on a substrate 1, a first dielectric thin film 3 which is formed extending over the upper surface 2a and at least one edge surface 2b of the lower electrode 2, a second dielectric film 4 which is formed on the first dielectric thin film 3 so as to cover a step portion of the first dielectric thin film 3, and an upper electrode 6 which is formed on the first dielectric thin film 3 and the second dielectric film 4 facing the lower electrode 2. The dielectric constant of the second dielectric film 4 is higher than that of the first dielectric thin film 3.
      COPYRIGHT: (C)2005,JPO&NCIPI
    • 要解决的问题:提供一种薄膜电容器,其下电极和上电极之间的击穿电压高,并且不会在其间产生短路。 解决方案:薄膜电容器包括位于基板1上的下电极2,形成在上电极2的上表面2a和至少一个边缘表面2b上延伸的第一电介质薄膜3,第二电极 形成在第一电介质薄膜3上以覆盖第一电介质薄膜3的台阶部分的电介质膜4和形成在第一电介质薄膜3和第二电介质膜4上的上电极6 下电极2.第二电介质膜4的介电常数高于第一电介质薄膜3的介电常数。(C)2005,JPO&NCIPI
    • 39. 发明专利
    • FREQUENCY SYNTHESIZER
    • JP2002084139A
    • 2002-03-22
    • JP2000276623
    • 2000-09-07
    • ALPS ELECTRIC CO LTD
    • AOKI KAZUHARU
    • H03D7/18H03B21/00H03B21/02H03L7/08H03L7/099H03L7/16H03L7/22H04B1/40
    • PROBLEM TO BE SOLVED: To acquire signals in three-frequency bands by reducing the number of oscillators, and to freely set the frequencies. SOLUTION: This frequency synthesizer is provided with oscillators 1 and 6 for outputting first and second oscillation signals, phase shifters 2 and 9 for outputting two sets of first and second signals, whose phases are different by 90 deg. each from the first and second oscillation signals, a mixer 4 to which one off the first and second signals are respectively inputted from the two sets of signals, a mixer 5 to which the other signals are inputted, and an adder 10 for adding the respective mixed signals outputted from the mixer 4 and the mixer 5. Also, this frequency synthesizer is provided with a phase-switching means 3 for switching the phase relation of the signals, to be inputted to the mixer 4 and the mixer 5, and an input validity/invalidity-switching means 8 for validating/invalidating the input of the second signals to the mixer 4 and the mixer 5. Then, the signal, having the same frequencies as those of the first oscillation signal or the signal with the sum or difference of the frequencies of the first oscillation signal and the frequencies of the second oscillation signal, is outputted from the adder 10.